€•.T      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ&/translations/zh_CN/accel/introduction”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ&/translations/zh_TW/accel/introduction”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ&/translations/it_IT/accel/introduction”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ&/translations/ja_JP/accel/introduction”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ&/translations/ko_KR/accel/introduction”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ&/translations/sp_SP/accel/introduction”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh£sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1h¡hhhžhhŸŒ@/var/lib/git/docbuild/linux/Documentation/accel/introduction.rst”h KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒIntroduction”h]”hŒIntroduction”…””}”(hh»hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hh¶hžhhŸh³h KubhŒ	paragraph”“”)”}”(hŒœThe Linux compute accelerators subsystem is designed to expose compute
accelerators in a common way to user-space and provide a common set of
functionality.”h]”hŒœThe Linux compute accelerators subsystem is designed to expose compute
accelerators in a common way to user-space and provide a common set of
functionality.”…””}”(hhËhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hX  These devices can be either stand-alone ASICs or IP blocks inside an SoC/GPU.
Although these devices are typically designed to accelerate
Machine-Learning (ML) and/or Deep-Learning (DL) computations, the accel layer
is not limited to handling these types of accelerators.”h]”hX  These devices can be either stand-alone ASICs or IP blocks inside an SoC/GPU.
Although these devices are typically designed to accelerate
Machine-Learning (ML) and/or Deep-Learning (DL) computations, the accel layer
is not limited to handling these types of accelerators.”…””}”(hhÙhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hŒPTypically, a compute accelerator will belong to one of the following
categories:”h]”hŒPTypically, a compute accelerator will belong to one of the following
categories:”…””}”(hhçhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhŒbullet_list”“”)”}”(hhh]”(hŒ	list_item”“”)”}”(hŒ×Edge AI - doing inference at an edge device. It can be an embedded ASIC/FPGA,
or an IP inside a SoC (e.g. laptop web camera). These devices
are typically configured using registers and can work with or without DMA.
”h]”hÊ)”}”(hŒÖEdge AI - doing inference at an edge device. It can be an embedded ASIC/FPGA,
or an IP inside a SoC (e.g. laptop web camera). These devices
are typically configured using registers and can work with or without DMA.”h]”hŒÖEdge AI - doing inference at an edge device. It can be an embedded ASIC/FPGA,
or an IP inside a SoC (e.g. laptop web camera). These devices
are typically configured using registers and can work with or without DMA.”…””}”(hj   hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khhüubah}”(h]”h ]”h"]”h$]”h&]”uh1húhh÷hžhhŸh³h Nubhû)”}”(hX÷  Inference data-center - single/multi user devices in a large server. This
type of device can be stand-alone or an IP inside a SoC or a GPU. It will
have on-board DRAM (to hold the DL topology), DMA engines and
command submission queues (either kernel or user-space queues).
It might also have an MMU to manage multiple users and might also enable
virtualization (SR-IOV) to support multiple VMs on the same device. In
addition, these devices will usually have some tools, such as profiler and
debugger.
”h]”hÊ)”}”(hXö  Inference data-center - single/multi user devices in a large server. This
type of device can be stand-alone or an IP inside a SoC or a GPU. It will
have on-board DRAM (to hold the DL topology), DMA engines and
command submission queues (either kernel or user-space queues).
It might also have an MMU to manage multiple users and might also enable
virtualization (SR-IOV) to support multiple VMs on the same device. In
addition, these devices will usually have some tools, such as profiler and
debugger.”h]”hXö  Inference data-center - single/multi user devices in a large server. This
type of device can be stand-alone or an IP inside a SoC or a GPU. It will
have on-board DRAM (to hold the DL topology), DMA engines and
command submission queues (either kernel or user-space queues).
It might also have an MMU to manage multiple users and might also enable
virtualization (SR-IOV) to support multiple VMs on the same device. In
addition, these devices will usually have some tools, such as profiler and
debugger.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1húhh÷hžhhŸh³h Nubhû)”}”(hX  Training data-center - Similar to Inference data-center cards, but typically
have more computational power and memory b/w (e.g. HBM) and will likely have
a method of scaling-up/out, i.e. connecting to other training cards inside
the server or in other servers, respectively.
”h]”hÊ)”}”(hX  Training data-center - Similar to Inference data-center cards, but typically
have more computational power and memory b/w (e.g. HBM) and will likely have
a method of scaling-up/out, i.e. connecting to other training cards inside
the server or in other servers, respectively.”h]”hX  Training data-center - Similar to Inference data-center cards, but typically
have more computational power and memory b/w (e.g. HBM) and will likely have
a method of scaling-up/out, i.e. connecting to other training cards inside
the server or in other servers, respectively.”…””}”(hj0  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K hj,  ubah}”(h]”h ]”h"]”h$]”h&]”uh1húhh÷hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1hõhŸh³h Khh¶hžhubhÊ)”}”(hXQ  All these devices typically have different runtime user-space software stacks,
that are tailored-made to their h/w. In addition, they will also probably
include a compiler to generate programs to their custom-made computational
engines. Typically, the common layer in user-space will be the DL frameworks,
such as PyTorch and TensorFlow.”h]”hXQ  All these devices typically have different runtime user-space software stacks,
that are tailored-made to their h/w. In addition, they will also probably
include a compiler to generate programs to their custom-made computational
engines. Typically, the common layer in user-space will be the DL frameworks,
such as PyTorch and TensorFlow.”…””}”(hjL  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K%hh¶hžhubhµ)”}”(hhh]”(hº)”}”(hŒSharing code with DRM”h]”hŒSharing code with DRM”…””}”(hj]  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjZ  hžhhŸh³h K,ubhÊ)”}”(hX!  Because this type of devices can be an IP inside GPUs or have similar
characteristics as those of GPUs, the accel subsystem will use the
DRM subsystem's code and functionality. i.e. the accel core code will
be part of the DRM subsystem and an accel device will be a new type of DRM
device.”h]”hX#  Because this type of devices can be an IP inside GPUs or have similar
characteristics as those of GPUs, the accel subsystem will use the
DRM subsystemâ€™s code and functionality. i.e. the accel core code will
be part of the DRM subsystem and an accel device will be a new type of DRM
device.”…””}”(hjk  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K.hjZ  hžhubhÊ)”}”(hŒýThis will allow us to leverage the extensive DRM code-base and
collaborate with DRM developers that have experience with this type of
devices. In addition, new features that will be added for the accelerator
drivers can be of use to GPU drivers as well.”h]”hŒýThis will allow us to leverage the extensive DRM code-base and
collaborate with DRM developers that have experience with this type of
devices. In addition, new features that will be added for the accelerator
drivers can be of use to GPU drivers as well.”…””}”(hjy  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K4hjZ  hžhubeh}”(h]”Œsharing-code-with-drm”ah ]”h"]”Œsharing code with drm”ah$]”h&]”uh1h´hh¶hžhhŸh³h K,ubhµ)”}”(hhh]”(hº)”}”(hŒDifferentiation from GPUs”h]”hŒDifferentiation from GPUs”…””}”(hj’  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj  hžhhŸh³h K:ubhÊ)”}”(hŒçBecause we want to prevent the extensive user-space graphic software stack
from trying to use an accelerator as a GPU, the compute accelerators will be
differentiated from GPUs by using a new major number and new device char files.”h]”hŒçBecause we want to prevent the extensive user-space graphic software stack
from trying to use an accelerator as a GPU, the compute accelerators will be
differentiated from GPUs by using a new major number and new device char files.”…””}”(hj   hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K<hj  hžhubhÊ)”}”(hŒaFurthermore, the drivers will be located in a separate place in the kernel
tree - drivers/accel/.”h]”hŒaFurthermore, the drivers will be located in a separate place in the kernel
tree - drivers/accel/.”…””}”(hj®  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K@hj  hžhubhÊ)”}”(hŒ…The accelerator devices will be exposed to the user space with the dedicated
261 major number and will have the following convention:”h]”hŒ…The accelerator devices will be exposed to the user space with the dedicated
261 major number and will have the following convention:”…””}”(hj¼  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KChj  hžhubhö)”}”(hhh]”(hû)”}”(hŒ&device char files - /dev/accel/accel\*”h]”hÊ)”}”(hjÏ  h]”hŒ&device char files - /dev/accel/accel *”…””}”(hjÑ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KFhjÍ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1húhjÊ  hžhhŸh³h Nubhû)”}”(hŒ-sysfs             - /sys/class/accel/accel\*/”h]”hÊ)”}”(hjæ  h]”hŒ-sysfs             - /sys/class/accel/accel */”…””}”(hjè  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KGhjä  ubah}”(h]”h ]”h"]”h$]”h&]”uh1húhjÊ  hžhhŸh³h Nubhû)”}”(hŒ0debugfs           - /sys/kernel/debug/accel/\*/
”h]”hÊ)”}”(hŒ/debugfs           - /sys/kernel/debug/accel/\*/”h]”hŒ/debugfs           - /sys/kernel/debug/accel/ */”…””}”(hjÿ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KHhjû  ubah}”(h]”h ]”h"]”h$]”h&]”uh1húhjÊ  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”jJ  jK  uh1hõhŸh³h KFhj  hžhubeh}”(h]”Œdifferentiation-from-gpus”ah ]”h"]”Œdifferentiation from gpus”ah$]”h&]”uh1h´hh¶hžhhŸh³h K:ubhµ)”}”(hhh]”(hº)”}”(hŒGetting Started”h]”hŒGetting Started”…””}”(hj$  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj!  hžhhŸh³h KKubhÊ)”}”(hX,  First, read the DRM documentation at Documentation/gpu/index.rst.
Not only it will explain how to write a new DRM driver but it will also
contain all the information on how to contribute, the Code Of Conduct and
what is the coding style/documentation. All of that is the same for the
accel subsystem.”h]”hX,  First, read the DRM documentation at Documentation/gpu/index.rst.
Not only it will explain how to write a new DRM driver but it will also
contain all the information on how to contribute, the Code Of Conduct and
what is the coding style/documentation. All of that is the same for the
accel subsystem.”…””}”(hj2  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KMhj!  hžhubhÊ)”}”(hŒASecond, make sure the kernel is configured with CONFIG_DRM_ACCEL.”h]”hŒASecond, make sure the kernel is configured with CONFIG_DRM_ACCEL.”…””}”(hj@  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KShj!  hžhubhÊ)”}”(hŒ€To expose your device as an accelerator, two changes are needed to
be done in your driver (as opposed to a standard DRM driver):”h]”hŒ€To expose your device as an accelerator, two changes are needed to
be done in your driver (as opposed to a standard DRM driver):”…””}”(hjN  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KUhj!  hžhubhö)”}”(hhh]”(hû)”}”(hXc  Add the DRIVER_COMPUTE_ACCEL feature flag in your drm_driver's
driver_features field. It is important to note that this driver feature is
mutually exclusive with DRIVER_RENDER and DRIVER_MODESET. Devices that want
to expose both graphics and compute device char files should be handled by
two drivers that are connected using the auxiliary bus framework.
”h]”hÊ)”}”(hXb  Add the DRIVER_COMPUTE_ACCEL feature flag in your drm_driver's
driver_features field. It is important to note that this driver feature is
mutually exclusive with DRIVER_RENDER and DRIVER_MODESET. Devices that want
to expose both graphics and compute device char files should be handled by
two drivers that are connected using the auxiliary bus framework.”h]”hXd  Add the DRIVER_COMPUTE_ACCEL feature flag in your drm_driverâ€™s
driver_features field. It is important to note that this driver feature is
mutually exclusive with DRIVER_RENDER and DRIVER_MODESET. Devices that want
to expose both graphics and compute device char files should be handled by
two drivers that are connected using the auxiliary bus framework.”…””}”(hjc  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KXhj_  ubah}”(h]”h ]”h"]”h$]”h&]”uh1húhj\  hžhhŸh³h Nubhû)”}”(hŒÉChange the open callback in your driver fops structure to accel_open().
Alternatively, your driver can use DEFINE_DRM_ACCEL_FOPS macro to easily
set the correct function operations pointers structure.
”h]”hÊ)”}”(hŒÈChange the open callback in your driver fops structure to accel_open().
Alternatively, your driver can use DEFINE_DRM_ACCEL_FOPS macro to easily
set the correct function operations pointers structure.”h]”hŒÈChange the open callback in your driver fops structure to accel_open().
Alternatively, your driver can use DEFINE_DRM_ACCEL_FOPS macro to easily
set the correct function operations pointers structure.”…””}”(hj{  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K^hjw  ubah}”(h]”h ]”h"]”h$]”h&]”uh1húhj\  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”jJ  jK  uh1hõhŸh³h KXhj!  hžhubeh}”(h]”Œgetting-started”ah ]”h"]”Œgetting started”ah$]”h&]”uh1h´hh¶hžhhŸh³h KKubhµ)”}”(hhh]”(hº)”}”(hŒExternal References”h]”hŒExternal References”…””}”(hj   hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj  hžhhŸh³h Kcubhµ)”}”(hhh]”(hº)”}”(hŒemail threads”h]”hŒemail threads”…””}”(hj±  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj®  hžhhŸh³h Kfubhö)”}”(hhh]”(hû)”}”(hŒ»`Initial discussion on the New subsystem for acceleration devices <https://lore.kernel.org/lkml/CAFCwf11=9qpNAepL7NL+YAV_QO=Wv6pnWPhKHKAepK3fNn+2Dg@mail.gmail.com/>`_ - Oded Gabbay (2022)”h]”hÊ)”}”(hjÄ  h]”(hŒ	reference”“”)”}”(hŒ¦`Initial discussion on the New subsystem for acceleration devices <https://lore.kernel.org/lkml/CAFCwf11=9qpNAepL7NL+YAV_QO=Wv6pnWPhKHKAepK3fNn+2Dg@mail.gmail.com/>`_”h]”hŒ@Initial discussion on the New subsystem for acceleration devices”…””}”(hjË  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œname”Œ@Initial discussion on the New subsystem for acceleration devices”Œrefuri”Œ`https://lore.kernel.org/lkml/CAFCwf11=9qpNAepL7NL+YAV_QO=Wv6pnWPhKHKAepK3fNn+2Dg@mail.gmail.com/”uh1jÉ  hjÆ  ubhŒtarget”“”)”}”(hŒc <https://lore.kernel.org/lkml/CAFCwf11=9qpNAepL7NL+YAV_QO=Wv6pnWPhKHKAepK3fNn+2Dg@mail.gmail.com/>”h]”h}”(h]”Œ@initial-discussion-on-the-new-subsystem-for-acceleration-devices”ah ]”h"]”Œ@initial discussion on the new subsystem for acceleration devices”ah$]”h&]”Œrefuri”jÜ  uh1jÝ  Œ
referenced”KhjÆ  ubhŒ - Oded Gabbay (2022)”…””}”(hjÆ  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhhjÂ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1húhj¿  hžhhŸh³h Nubhû)”}”(hŒ…`patch-set to add the new subsystem <https://lore.kernel.org/lkml/20221022214622.18042-1-ogabbay@kernel.org/>`_ - Oded Gabbay (2022)
”h]”hÊ)”}”(hŒ„`patch-set to add the new subsystem <https://lore.kernel.org/lkml/20221022214622.18042-1-ogabbay@kernel.org/>`_ - Oded Gabbay (2022)”h]”(jÊ  )”}”(hŒo`patch-set to add the new subsystem <https://lore.kernel.org/lkml/20221022214622.18042-1-ogabbay@kernel.org/>`_”h]”hŒ"patch-set to add the new subsystem”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œname”Œ"patch-set to add the new subsystem”jÛ  ŒGhttps://lore.kernel.org/lkml/20221022214622.18042-1-ogabbay@kernel.org/”uh1jÉ  hj  ubjÞ  )”}”(hŒJ <https://lore.kernel.org/lkml/20221022214622.18042-1-ogabbay@kernel.org/>”h]”h}”(h]”Œ"patch-set-to-add-the-new-subsystem”ah ]”h"]”Œ"patch-set to add the new subsystem”ah$]”h&]”Œrefuri”j  uh1jÝ  jì  Khj  ubhŒ - Oded Gabbay (2022)”…””}”(hj  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kihjý  ubah}”(h]”h ]”h"]”h$]”h&]”uh1húhj¿  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”jJ  Œ*”uh1hõhŸh³h Khhj®  hžhubeh}”(h]”Œemail-threads”ah ]”h"]”Œemail threads”ah$]”h&]”uh1h´hj  hžhhŸh³h Kfubhµ)”}”(hhh]”(hº)”}”(hŒConference talks”h]”hŒConference talks”…””}”(hjE  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjB  hžhhŸh³h Klubhö)”}”(hhh]”hû)”}”(hŒ`LPC 2022 Accelerators BOF outcomes summary <https://airlied.blogspot.com/2022/09/accelerators-bof-outcomes-summary.html>`_ - Dave Airlie (2022)”h]”hÊ)”}”(hjX  h]”(jÊ  )”}”(hŒ{`LPC 2022 Accelerators BOF outcomes summary <https://airlied.blogspot.com/2022/09/accelerators-bof-outcomes-summary.html>`_”h]”hŒ*LPC 2022 Accelerators BOF outcomes summary”…””}”(hj]  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œname”Œ*LPC 2022 Accelerators BOF outcomes summary”jÛ  ŒKhttps://airlied.blogspot.com/2022/09/accelerators-bof-outcomes-summary.html”uh1jÉ  hjZ  ubjÞ  )”}”(hŒN <https://airlied.blogspot.com/2022/09/accelerators-bof-outcomes-summary.html>”h]”h}”(h]”Œ*lpc-2022-accelerators-bof-outcomes-summary”ah ]”h"]”Œ*lpc 2022 accelerators bof outcomes summary”ah$]”h&]”Œrefuri”jm  uh1jÝ  jì  KhjZ  ubhŒ - Dave Airlie (2022)”…””}”(hjZ  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KnhjV  ubah}”(h]”h ]”h"]”h$]”h&]”uh1húhjS  hžhhŸh³h Nubah}”(h]”h ]”h"]”h$]”h&]”jJ  j9  uh1hõhŸh³h KnhjB  hžhubeh}”(h]”Œconference-talks”ah ]”h"]”Œconference talks”ah$]”h&]”uh1h´hj  hžhhŸh³h Klubeh}”(h]”Œexternal-references”ah ]”h"]”Œexternal references”ah$]”h&]”uh1h´hh¶hžhhŸh³h Kcubeh}”(h]”Œintroduction”ah ]”h"]”Œintroduction”ah$]”h&]”uh1h´hhhžhhŸh³h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h³uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¹NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
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