€•#QŒsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ/translations/zh_CN/PCI/tph”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/zh_TW/PCI/tph”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/it_IT/PCI/tph”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/ja_JP/PCI/tph”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/ko_KR/PCI/tph”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒPortuguese (Brazilian)”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/pt_BR/PCI/tph”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/sp_SP/PCI/tph”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh·sbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1hµhhh²hh³Œ5/var/lib/git/docbuild/linux/Documentation/PCI/tph.rst”h´KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ TPH Support”h]”hŒ TPH Support”…””}”(hhÏh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhÊh²hh³hÇh´KubhŒ field_list”“”)”}”(hhh]”(hŒfield”“”)”}”(hhh]”(hŒ field_name”“”)”}”(hŒ Copyright”h]”hŒ Copyright”…””}”(hhéh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hçhhäh³hÇh´KubhŒ field_body”“”)”}”(hŒ!2024 Advanced Micro Devices, Inc.”h]”hŒ paragraph”“”)”}”(hhûh]”hŒ!2024 Advanced Micro Devices, Inc.”…””}”(hhÿh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Khhùubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hhäubeh}”(h]”h ]”h"]”h$]”h&]”uh1hâh³hÇh´Khhßh²hubhã)”}”(hhh]”(hè)”}”(hŒAuthors”h]”hŒAuthors”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hçhjh³hÇh´Kubhø)”}”(hŒO- Eric van Tassell - Wei Huang ”h]”hŒ bullet_list”“”)”}”(hhh]”(hŒ list_item”“”)”}”(hŒ*Eric van Tassell ”h]”hþ)”}”(hj6h]”(hŒEric van Tassell <”…””}”(hj8h²hh³Nh´NubhŒ reference”“”)”}”(hŒeric.vantassell@amd.com”h]”hŒeric.vantassell@amd.com”…””}”(hjAh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”Œmailto:eric.vantassell@amd.com”uh1j?hj8ubhŒ>”…””}”(hj8h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K hj4ubah}”(h]”h ]”h"]”h$]”h&]”uh1j2hj/ubj3)”}”(hŒ Wei Huang ”h]”hþ)”}”(hŒWei Huang ”h]”(hŒ Wei Huang <”…””}”(hjeh²hh³Nh´Nubj@)”}”(hŒwei.huang2@amd.com”h]”hŒwei.huang2@amd.com”…””}”(hjmh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”Œmailto:wei.huang2@amd.com”uh1j?hjeubhŒ>”…””}”(hjeh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K hjaubah}”(h]”h ]”h"]”h$]”h&]”uh1j2hj/ubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1j-h³hÇh´K hj)ubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjubeh}”(h]”h ]”h"]”h$]”h&]”uh1hâh³hÇh´K hhßh²hubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÝhhÊh²hh³hÇh´KubhÉ)”}”(hhh]”(hÎ)”}”(hŒOverview”h]”hŒOverview”…””}”(hjªh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj§h²hh³hÇh´Kubhþ)”}”(hX`TPH (TLP Processing Hints) is a PCIe feature that allows endpoint devices to provide optimization hints for requests that target memory space. These hints, in a format called Steering Tags (STs), are embedded in the requester's TLP headers, enabling the system hardware, such as the Root Complex, to better manage platform resources for these requests.”h]”hXbTPH (TLP Processing Hints) is a PCIe feature that allows endpoint devices to provide optimization hints for requests that target memory space. These hints, in a format called Steering Tags (STs), are embedded in the requester’s TLP headers, enabling the system hardware, such as the Root Complex, to better manage platform resources for these requests.”…””}”(hj¸h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Khj§h²hubhþ)”}”(hXbFor example, on platforms with TPH-based direct data cache injection support, an endpoint device can include appropriate STs in its DMA traffic to specify which cache the data should be written to. This allows the CPU core to have a higher probability of getting data from cache, potentially improving performance and reducing latency in data processing.”h]”hXbFor example, on platforms with TPH-based direct data cache injection support, an endpoint device can include appropriate STs in its DMA traffic to specify which cache the data should be written to. This allows the CPU core to have a higher probability of getting data from cache, potentially improving performance and reducing latency in data processing.”…””}”(hjÆh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Khj§h²hubeh}”(h]”Œoverview”ah ]”h"]”Œoverview”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´KubhÉ)”}”(hhh]”(hÎ)”}”(hŒHow to Use TPH”h]”hŒHow to Use TPH”…””}”(hjßh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjÜh²hh³hÇh´Kubhþ)”}”(hXWTPH is presented as an optional extended capability in PCIe. The Linux kernel handles TPH discovery during boot, but it is up to the device driver to request TPH enablement if it is to be utilized. Once enabled, the driver uses the provided API to obtain the Steering Tag for the target memory and to program the ST into the device's ST table.”h]”hXYTPH is presented as an optional extended capability in PCIe. The Linux kernel handles TPH discovery during boot, but it is up to the device driver to request TPH enablement if it is to be utilized. Once enabled, the driver uses the provided API to obtain the Steering Tag for the target memory and to program the ST into the device’s ST table.”…””}”(hjíh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K!hjÜh²hubhÉ)”}”(hhh]”(hÎ)”}”(hŒEnable TPH support in Linux”h]”hŒEnable TPH support in Linux”…””}”(hjþh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjûh²hh³hÇh´K(ubhþ)”}”(hŒQTo support TPH, the kernel must be built with the CONFIG_PCIE_TPH option enabled.”h]”hŒQTo support TPH, the kernel must be built with the CONFIG_PCIE_TPH option enabled.”…””}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K*hjûh²hubeh}”(h]”Œenable-tph-support-in-linux”ah ]”h"]”Œenable tph support in linux”ah$]”h&]”uh1hÈhjÜh²hh³hÇh´K(ubhÉ)”}”(hhh]”(hÎ)”}”(hŒ Manage TPH”h]”hŒ Manage TPH”…””}”(hj%h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj"h²hh³hÇh´K.ubhþ)”}”(hŒ8To enable TPH for a device, use the following function::”h]”hŒ7To enable TPH for a device, use the following function:”…””}”(hj3h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K0hj"h²hubhŒ literal_block”“”)”}”(hŒ4int pcie_enable_tph(struct pci_dev *pdev, int mode);”h]”hŒ4int pcie_enable_tph(struct pci_dev *pdev, int mode);”…””}”hjCsbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1jAh³hÇh´K2hj"h²hubhþ)”}”(hŒfThis function enables TPH support for device with a specific ST mode. Current supported modes include:”h]”hŒfThis function enables TPH support for device with a specific ST mode. Current supported modes include:”…””}”(hjQh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K4hj"h²hubhŒ block_quote”“”)”}”(hŒ{* PCI_TPH_ST_NS_MODE - NO ST Mode * PCI_TPH_ST_IV_MODE - Interrupt Vector Mode * PCI_TPH_ST_DS_MODE - Device Specific Mode ”h]”j.)”}”(hhh]”(j3)”}”(hŒPCI_TPH_ST_NS_MODE - NO ST Mode”h]”hþ)”}”(hjjh]”hŒPCI_TPH_ST_NS_MODE - NO ST Mode”…””}”(hjlh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K7hjhubah}”(h]”h ]”h"]”h$]”h&]”uh1j2hjeubj3)”}”(hŒ*PCI_TPH_ST_IV_MODE - Interrupt Vector Mode”h]”hþ)”}”(hjh]”hŒ*PCI_TPH_ST_IV_MODE - Interrupt Vector Mode”…””}”(hjƒh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K8hjubah}”(h]”h ]”h"]”h$]”h&]”uh1j2hjeubj3)”}”(hŒ*PCI_TPH_ST_DS_MODE - Device Specific Mode ”h]”hþ)”}”(hŒ)PCI_TPH_ST_DS_MODE - Device Specific Mode”h]”hŒ)PCI_TPH_ST_DS_MODE - Device Specific Mode”…””}”(hjšh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K9hj–ubah}”(h]”h ]”h"]”h$]”h&]”uh1j2hjeubeh}”(h]”h ]”h"]”h$]”h&]”j“Œ*”uh1j-h³hÇh´K7hjaubah}”(h]”h ]”h"]”h$]”h&]”uh1j_h³hÇh´K7hj"h²hubhþ)”}”(hŒõ`pcie_enable_tph()` checks whether the requested mode is actually supported by the device before enabling. The device driver can figure out which TPH mode is supported and can be properly enabled based on the return value of `pcie_enable_tph()`.”h]”(hŒtitle_reference”“”)”}”(hŒ`pcie_enable_tph()`”h]”hŒpcie_enable_tph()”…””}”(hjÁh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j¿hj»ubhŒÎ checks whether the requested mode is actually supported by the device before enabling. The device driver can figure out which TPH mode is supported and can be properly enabled based on the return value of ”…””}”(hj»h²hh³Nh´NubjÀ)”}”(hŒ`pcie_enable_tph()`”h]”hŒpcie_enable_tph()”…””}”(hjÓh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j¿hj»ubhŒ.”…””}”(hj»h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K;hj"h²hubhþ)”}”(hŒ,To disable TPH, use the following function::”h]”hŒ+To disable TPH, use the following function:”…””}”(hjëh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K@hj"h²hubjB)”}”(hŒ,void pcie_disable_tph(struct pci_dev *pdev);”h]”hŒ,void pcie_disable_tph(struct pci_dev *pdev);”…””}”hjùsbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1jAh³hÇh´KBhj"h²hubeh}”(h]”Œ manage-tph”ah ]”h"]”Œ manage tph”ah$]”h&]”uh1hÈhjÜh²hh³hÇh´K.ubhÉ)”}”(hhh]”(hÎ)”}”(hŒ Manage ST”h]”hŒ Manage ST”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjh²hh³hÇh´KEubhþ)”}”(hX~Steering Tags are platform specific. PCIe spec does not specify where STs are from. Instead PCI Firmware Specification defines an ACPI _DSM method (see the `Revised _DSM for Cache Locality TPH Features ECN `_) for retrieving STs for a target memory of various properties. This method is what is supported in this implementation.”h]”(hŒœSteering Tags are platform specific. PCIe spec does not specify where STs are from. Instead PCI Firmware Specification defines an ACPI _DSM method (see the ”…””}”(hj h²hh³Nh´Nubj@)”}”(hŒj`Revised _DSM for Cache Locality TPH Features ECN `_”h]”hŒ0Revised _DSM for Cache Locality TPH Features ECN”…””}”(hj(h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œname”Œ0Revised _DSM for Cache Locality TPH Features ECN”Œrefuri”Œ4https://members.pcisig.com/wg/PCI-SIG/document/15470”uh1j?hj ubhŒtarget”“”)”}”(hŒ7 ”h]”h}”(h]”Œ/revised-dsm-for-cache-locality-tph-features-ecn”ah ]”h"]”Œ0revised _dsm for cache locality tph features ecn”ah$]”h&]”Œrefuri”j9uh1j:Œ referenced”Khj ubhŒx) for retrieving STs for a target memory of various properties. This method is what is supported in this implementation.”…””}”(hj h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KGhjh²hubhþ)”}”(hŒkTo retrieve a Steering Tag for a target memory associated with a specific CPU, use the following function::”h]”hŒjTo retrieve a Steering Tag for a target memory associated with a specific CPU, use the following function:”…””}”(hjTh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KNhjh²hubjB)”}”(hŒzint pcie_tph_get_cpu_st(struct pci_dev *pdev, enum tph_mem_type type, unsigned int cpu, u16 *tag);”h]”hŒzint pcie_tph_get_cpu_st(struct pci_dev *pdev, enum tph_mem_type type, unsigned int cpu, u16 *tag);”…””}”hjbsbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1jAh³hÇh´KQhjh²hubhþ)”}”(hŒ´The `type` argument is used to specify the memory type, either volatile or persistent, of the target memory. The `cpu` argument specifies the CPU where the memory is associated to.”h]”(hŒThe ”…””}”(hjph²hh³Nh´NubjÀ)”}”(hŒ`type`”h]”hŒtype”…””}”(hjxh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j¿hjpubhŒg argument is used to specify the memory type, either volatile or persistent, of the target memory. The ”…””}”(hjph²hh³Nh´NubjÀ)”}”(hŒ`cpu`”h]”hŒcpu”…””}”(hjŠh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j¿hjpubhŒ> argument specifies the CPU where the memory is associated to.”…””}”(hjph²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KThjh²hubhþ)”}”(hŒsAfter the ST value is retrieved, the device driver can use the following function to write the ST into the device::”h]”hŒrAfter the ST value is retrieved, the device driver can use the following function to write the ST into the device:”…””}”(hj¢h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KXhjh²hubjB)”}”(hŒgint pcie_tph_set_st_entry(struct pci_dev *pdev, unsigned int index, u16 tag);”h]”hŒgint pcie_tph_set_st_entry(struct pci_dev *pdev, unsigned int index, u16 tag);”…””}”hj°sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1jAh³hÇh´K[hjh²hubhþ)”}”(hX-The `index` argument is the ST table entry index the ST tag will be written into. `pcie_tph_set_st_entry()` will figure out the proper location of ST table, either in the MSI-X table or in the TPH Extended Capability space, and write the Steering Tag into the ST entry pointed by the `index` argument.”h]”(hŒThe ”…””}”(hj¾h²hh³Nh´NubjÀ)”}”(hŒ`index`”h]”hŒindex”…””}”(hjÆh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j¿hj¾ubhŒG argument is the ST table entry index the ST tag will be written into. ”…””}”(hj¾h²hh³Nh´NubjÀ)”}”(hŒ`pcie_tph_set_st_entry()`”h]”hŒpcie_tph_set_st_entry()”…””}”(hjØh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j¿hj¾ubhŒ± will figure out the proper location of ST table, either in the MSI-X table or in the TPH Extended Capability space, and write the Steering Tag into the ST entry pointed by the ”…””}”(hj¾h²hh³Nh´NubjÀ)”}”(hŒ`index`”h]”hŒindex”…””}”(hjêh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j¿hj¾ubhŒ argument.”…””}”(hj¾h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K^hjh²hubhþ)”}”(hXIt is completely up to the driver to decide how to use these TPH functions. For example a network device driver can use the TPH APIs above to update the Steering Tag when interrupt affinity of a RX/TX queue has been changed. Here is a sample code for IRQ affinity notifier:”h]”hXIt is completely up to the driver to decide how to use these TPH functions. For example a network device driver can use the TPH APIs above to update the Steering Tag when interrupt affinity of a RX/TX queue has been changed. Here is a sample code for IRQ affinity notifier:”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kdhjh²hubjB)”}”(hXgstatic void irq_affinity_notified(struct irq_affinity_notify *notify, const cpumask_t *mask) { struct drv_irq *irq; unsigned int cpu_id; u16 tag; irq = container_of(notify, struct drv_irq, affinity_notify); cpumask_copy(irq->cpu_mask, mask); /* Pick a right CPU as the target - here is just an example */ cpu_id = cpumask_first(irq->cpu_mask); if (pcie_tph_get_cpu_st(irq->pdev, TPH_MEM_TYPE_VM, cpu_id, &tag)) return; if (pcie_tph_set_st_entry(irq->pdev, irq->msix_nr, tag)) return; }”h]”hXgstatic void irq_affinity_notified(struct irq_affinity_notify *notify, const cpumask_t *mask) { struct drv_irq *irq; unsigned int cpu_id; u16 tag; irq = container_of(notify, struct drv_irq, affinity_notify); cpumask_copy(irq->cpu_mask, mask); /* Pick a right CPU as the target - here is just an example */ cpu_id = cpumask_first(irq->cpu_mask); if (pcie_tph_get_cpu_st(irq->pdev, TPH_MEM_TYPE_VM, cpu_id, &tag)) return; if (pcie_tph_set_st_entry(irq->pdev, irq->msix_nr, tag)) return; }”…””}”hjsbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆŒforce”‰Œlanguage”Œc”Œhighlight_args”}”uh1jAh³hÇh´Kihjh²hubeh}”(h]”Œ manage-st”ah ]”h"]”Œ manage st”ah$]”h&]”uh1hÈhjÜh²hh³hÇh´KEubhÉ)”}”(hhh]”(hÎ)”}”(hŒDisable TPH system-wide”h]”hŒDisable TPH system-wide”…””}”(hj.h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj+h²hh³hÇh´KubhŒdefinition_list”“”)”}”(hhh]”hŒdefinition_list_item”“”)”}”(hŒThere is a kernel command line option available to control TPH feature: * "notph": TPH will be disabled for all endpoint devices.”h]”(hŒterm”“”)”}”(hŒGThere is a kernel command line option available to control TPH feature:”h]”hŒGThere is a kernel command line option available to control TPH feature:”…””}”(hjIh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGh³hÇh´KƒhjCubhŒ definition”“”)”}”(hhh]”j.)”}”(hhh]”j3)”}”(hŒ7"notph": TPH will be disabled for all endpoint devices.”h]”hþ)”}”(hjah]”hŒ;“notphâ€: TPH will be disabled for all endpoint devices.”…””}”(hjch²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K„hj_ubah}”(h]”h ]”h"]”h$]”h&]”uh1j2hj\ubah}”(h]”h ]”h"]”h$]”h&]”j“j´uh1j-h³hÇh´K„hjYubah}”(h]”h ]”h"]”h$]”h&]”uh1jWhjCubeh}”(h]”h ]”h"]”h$]”h&]”uh1jAh³hÇh´Kƒhj>ubah}”(h]”h ]”h"]”h$]”h&]”uh1j<hj+h²hh³Nh´Nubeh}”(h]”Œdisable-tph-system-wide”ah ]”h"]”Œdisable tph system-wide”ah$]”h&]”uh1hÈhjÜh²hh³hÇh´Kubeh}”(h]”Œhow-to-use-tph”ah ]”h"]”Œhow to use tph”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´Kubeh}”(h]”Œ tph-support”ah ]”h"]”Œ tph support”ah$]”h&]”uh1hÈhhh²hh³hÇh´Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”hÇuh1hŒcurrent_source”NŒ current_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(hÍNŒ generator”NŒ datestamp”NŒ source_link”NŒ source_url”NŒ toc_backlinks”Œentry”Œfootnote_backlinks”KŒ sectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒ strip_classes”NŒ report_level”KŒ halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ traceback”ˆŒinput_encoding”Œ utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jÉŒerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œ language_code”Œen”Œrecord_dependencies”NŒconfig”NŒ id_prefix”hŒauto_id_prefix”Œid”Œ dump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”hÇŒ _destination”NŒ _config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒ raw_enabled”KŒline_length_limit”M'Œpep_references”NŒ pep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒ rfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œ smart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œ docinfo_xform”KŒsectsubtitle_xform”‰Œ image_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(j£j jÙjÖj›j˜jjj j j(j%jEjBj“juŒ nametypes”}”(j£‰jÙ‰j›‰j‰j ‰j(‰jEˆj“‰uh}”(j hÊjÖj§j˜jÜjjûj j"j%jjBj<jj+uŒ footnote_refs”}”Œ citation_refs”}”Œ autofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ footnotes”]”Œ citations”]”Œautofootnote_start”KŒsymbol_footnote_start”KŒ id_counter”Œ collections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œ transformer”NŒ include_log”]”Œ decoration”Nh²hub.