asphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget!/translations/zh_CN/PCI/sysfs-pcimodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/zh_TW/PCI/sysfs-pcimodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/it_IT/PCI/sysfs-pcimodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/ja_JP/PCI/sysfs-pcimodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/ko_KR/PCI/sysfs-pcimodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/sp_SP/PCI/sysfs-pcimodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h SPDX-License-Identifier: GPL-2.0h]h SPDX-License-Identifier: GPL-2.0}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhh;/var/lib/git/docbuild/linux/Documentation/PCI/sysfs-pci.rsthKubhsection)}(hhh](htitle)}(h,Accessing PCI device resources through sysfsh]h,Accessing PCI device resources through sysfs}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hsysfs, usually mounted at /sys, provides access to PCI resources on platforms that support it. For example, a given bus might look like this::h]hsysfs, usually mounted at /sys, provides access to PCI resources on platforms that support it. For example, a given bus might look like this:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh literal_block)}(hX>/sys/devices/pci0000:17 |-- 0000:17:00.0 | |-- class | |-- config | |-- device | |-- enable | |-- irq | |-- local_cpus | |-- remove | |-- resource | |-- resource0 | |-- resource1 | |-- resource2 | |-- revision | |-- rom | |-- subsystem_device | |-- subsystem_vendor | `-- vendor `-- ...h]hX>/sys/devices/pci0000:17 |-- 0000:17:00.0 | |-- class | |-- config | |-- device | |-- enable | |-- irq | |-- local_cpus | |-- remove | |-- resource | |-- resource0 | |-- resource1 | |-- resource2 | |-- revision | |-- rom | |-- subsystem_device | |-- subsystem_vendor | `-- vendor `-- ...}hhsbah}(h]h ]h"]h$]h&]hhuh1hhhhK hhhhubh)}(hXWThe topmost element describes the PCI domain and bus number. In this case, the domain number is 0000 and the bus number is 17 (both values are in hex). This bus contains a single function device in slot 0. The domain and bus numbers are reproduced for convenience. Under the device directory are several files, each with their own function.h]hXWThe topmost element describes the PCI domain and bus number. In this case, the domain number is 0000 and the bus number is 17 (both values are in hex). This bus contains a single function device in slot 0. The domain and bus numbers are reproduced for convenience. Under the device directory are several files, each with their own function.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh block_quote)}(hX,=================== ===================================================== file function =================== ===================================================== class PCI class (ascii, ro) config PCI config space (binary, rw) device PCI device (ascii, ro) enable Whether the device is enabled (ascii, rw) irq IRQ number (ascii, ro) local_cpus nearby CPU mask (cpumask, ro) remove remove device from kernel's list (ascii, wo) resource PCI resource host addresses (ascii, ro) resource0..N PCI resource N, if present (binary, mmap, rw\ [1]_) resource0_wc..N_wc PCI WC map resource N, if prefetchable (binary, mmap) revision PCI revision (ascii, ro) rom PCI ROM resource, if present (binary, ro) subsystem_device PCI subsystem device (ascii, ro) subsystem_vendor PCI subsystem vendor (ascii, ro) vendor PCI vendor (ascii, ro) =================== ===================================================== h]htable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK5uh1jhjubhthead)}(hhh]hrow)}(hhh](hentry)}(hhh]h)}(hfileh]hfile}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK%hj)ubah}(h]h ]h"]h$]h&]uh1j'hj$ubj()}(hhh]h)}(hfunctionh]hfunction}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK%hj@ubah}(h]h ]h"]h$]h&]uh1j'hj$ubeh}(h]h ]h"]h$]h&]uh1j"hjubah}(h]h ]h"]h$]h&]uh1jhjubhtbody)}(hhh](j#)}(hhh](j()}(hhh]h)}(hclassh]hclass}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK'hjkubah}(h]h ]h"]h$]h&]uh1j'hjhubj()}(hhh]h)}(hPCI class (ascii, ro)h]hPCI class (ascii, ro)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK'hjubah}(h]h ]h"]h$]h&]uh1j'hjhubeh}(h]h ]h"]h$]h&]uh1j"hjeubj#)}(hhh](j()}(hhh]h)}(hconfigh]hconfig}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK(hjubah}(h]h ]h"]h$]h&]uh1j'hjubj()}(hhh]h)}(hPCI config space (binary, rw)h]hPCI config space (binary, rw)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK(hjubah}(h]h ]h"]h$]h&]uh1j'hjubeh}(h]h ]h"]h$]h&]uh1j"hjeubj#)}(hhh](j()}(hhh]h)}(hdeviceh]hdevice}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hjubah}(h]h ]h"]h$]h&]uh1j'hjubj()}(hhh]h)}(hPCI device (ascii, ro)h]hPCI device (ascii, ro)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hjubah}(h]h ]h"]h$]h&]uh1j'hjubeh}(h]h ]h"]h$]h&]uh1j"hjeubj#)}(hhh](j()}(hhh]h)}(henableh]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK*hjubah}(h]h ]h"]h$]h&]uh1j'hj ubj()}(hhh]h)}(h)Whether the device is enabled (ascii, rw)h]h)Whether the device is enabled (ascii, rw)}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK*hj'ubah}(h]h ]h"]h$]h&]uh1j'hj ubeh}(h]h ]h"]h$]h&]uh1j"hjeubj#)}(hhh](j()}(hhh]h)}(hirqh]hirq}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK+hjGubah}(h]h ]h"]h$]h&]uh1j'hjDubj()}(hhh]h)}(hIRQ number (ascii, ro)h]hIRQ number (ascii, ro)}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK+hj^ubah}(h]h ]h"]h$]h&]uh1j'hjDubeh}(h]h ]h"]h$]h&]uh1j"hjeubj#)}(hhh](j()}(hhh]h)}(h local_cpush]h local_cpus}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK,hj~ubah}(h]h ]h"]h$]h&]uh1j'hj{ubj()}(hhh]h)}(hnearby CPU mask (cpumask, ro)h]hnearby CPU mask (cpumask, ro)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK,hjubah}(h]h ]h"]h$]h&]uh1j'hj{ubeh}(h]h ]h"]h$]h&]uh1j"hjeubj#)}(hhh](j()}(hhh]h)}(hremoveh]hremove}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK-hjubah}(h]h ]h"]h$]h&]uh1j'hjubj()}(hhh]h)}(h,remove device from kernel's list (ascii, wo)h]h.remove device from kernel’s list (ascii, wo)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK-hjubah}(h]h ]h"]h$]h&]uh1j'hjubeh}(h]h ]h"]h$]h&]uh1j"hjeubj#)}(hhh](j()}(hhh]h)}(hresourceh]hresource}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK.hjubah}(h]h ]h"]h$]h&]uh1j'hjubj()}(hhh]h)}(h'PCI resource host addresses (ascii, ro)h]h'PCI resource host addresses (ascii, ro)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK.hjubah}(h]h ]h"]h$]h&]uh1j'hjubeh}(h]h ]h"]h$]h&]uh1j"hjeubj#)}(hhh](j()}(hhh]h)}(h resource0..Nh]h resource0..N}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK/hj#ubah}(h]h ]h"]h$]h&]uh1j'hj ubj()}(hhh]h)}(h3PCI resource N, if present (binary, mmap, rw\ [1]_)h](h.PCI resource N, if present (binary, mmap, rw }(hj=hhhNhNubhfootnote_reference)}(h[1]_h]h1}(hjGhhhNhNubah}(h]id1ah ]h"]h$]h&]refidid2docname PCI/sysfs-pciuh1jEhj=resolvedKubh)}(hj=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhK/hj:ubah}(h]h ]h"]h$]h&]uh1j'hj ubeh}(h]h ]h"]h$]h&]uh1j"hjeubj#)}(hhh](j()}(hhh]h)}(hresource0_wc..N_wch]hresource0_wc..N_wc}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK0hjtubah}(h]h ]h"]h$]h&]uh1j'hjqubj()}(hhh]h)}(h5PCI WC map resource N, if prefetchable (binary, mmap)h]h5PCI WC map resource N, if prefetchable (binary, mmap)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK0hjubah}(h]h ]h"]h$]h&]uh1j'hjqubeh}(h]h ]h"]h$]h&]uh1j"hjeubj#)}(hhh](j()}(hhh]h)}(hrevisionh]hrevision}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK1hjubah}(h]h ]h"]h$]h&]uh1j'hjubj()}(hhh]h)}(hPCI revision (ascii, ro)h]hPCI revision (ascii, ro)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK1hjubah}(h]h ]h"]h$]h&]uh1j'hjubeh}(h]h ]h"]h$]h&]uh1j"hjeubj#)}(hhh](j()}(hhh]h)}(hromh]hrom}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hjubah}(h]h ]h"]h$]h&]uh1j'hjubj()}(hhh]h)}(h)PCI ROM resource, if present (binary, ro)h]h)PCI ROM resource, if present (binary, ro)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hjubah}(h]h ]h"]h$]h&]uh1j'hjubeh}(h]h ]h"]h$]h&]uh1j"hjeubj#)}(hhh](j()}(hhh]h)}(hsubsystem_deviceh]hsubsystem_device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK3hjubah}(h]h ]h"]h$]h&]uh1j'hjubj()}(hhh]h)}(h PCI subsystem device (ascii, ro)h]h PCI subsystem device (ascii, ro)}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK3hj0ubah}(h]h ]h"]h$]h&]uh1j'hjubeh}(h]h ]h"]h$]h&]uh1j"hjeubj#)}(hhh](j()}(hhh]h)}(hsubsystem_vendorh]hsubsystem_vendor}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hjPubah}(h]h ]h"]h$]h&]uh1j'hjMubj()}(hhh]h)}(h PCI subsystem vendor (ascii, ro)h]h PCI subsystem vendor (ascii, ro)}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hjgubah}(h]h ]h"]h$]h&]uh1j'hjMubeh}(h]h ]h"]h$]h&]uh1j"hjeubj#)}(hhh](j()}(hhh]h)}(hvendorh]hvendor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK5hjubah}(h]h ]h"]h$]h&]uh1j'hjubj()}(hhh]h)}(hPCI vendor (ascii, ro)h]hPCI vendor (ascii, ro)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK5hjubah}(h]h ]h"]h$]h&]uh1j'hjubeh}(h]h ]h"]h$]h&]uh1j"hjeubeh}(h]h ]h"]h$]h&]uh1jchjubeh}(h]h ]h"]h$]h&]colsKuh1jhhubah}(h]h ]h"]h$]h&]uh1hhhubah}(h]h ]h"]h$]h&]uh1hhhhK$hhhhubh)}(hro - read only file rw - file is readable and writable wo - write only file mmap - file is mmapable ascii - file contains ascii text binary - file contains binary data cpumask - file contains a cpumask typeh]hro - read only file rw - file is readable and writable wo - write only file mmap - file is mmapable ascii - file contains ascii text binary - file contains binary data cpumask - file contains a cpumask type}hjsbah}(h]h ]h"]h$]h&]hhuh1hhhhK:hhhhubhfootnote)}(h-rw for IORESOURCE_IO (I/O port) regions only h](hlabel)}(h1h]h1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h,rw for IORESOURCE_IO (I/O port) regions onlyh]h,rw for IORESOURCE_IO (I/O port) regions only}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKBhjubeh}(h]jWah ]h"]1ah$]h&]jQajXjYuh1jhhhKBhhhhjZKubh)}(hX:The read only files are informational, writes to them will be ignored, with the exception of the 'rom' file. Writable files can be used to perform actions on the device (e.g. changing config space, detaching a device). mmapable files are available via an mmap of the file at offset 0 and can be used to do actual device programming from userspace. Note that some platforms don't support mmapping of certain resources, so be sure to check the return value from any attempted mmap. The most notable of these are I/O port resources, which also provide read/write access.h]hX@The read only files are informational, writes to them will be ignored, with the exception of the ‘rom’ file. Writable files can be used to perform actions on the device (e.g. changing config space, detaching a device). mmapable files are available via an mmap of the file at offset 0 and can be used to do actual device programming from userspace. Note that some platforms don’t support mmapping of certain resources, so be sure to check the return value from any attempted mmap. The most notable of these are I/O port resources, which also provide read/write access.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKDhhhhubh)}(hXFThe 'enable' file provides a counter that indicates how many times the device has been enabled. If the 'enable' file currently returns '4', and a '1' is echoed into it, it will then return '5'. Echoing a '0' into it will decrease the count. Even when it returns to 0, though, some of the initialisation may not be reversed.h]hX^The ‘enable’ file provides a counter that indicates how many times the device has been enabled. If the ‘enable’ file currently returns ‘4’, and a ‘1’ is echoed into it, it will then return ‘5’. Echoing a ‘0’ into it will decrease the count. Even when it returns to 0, though, some of the initialisation may not be reversed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKMhhhhubh)}(hXThe 'rom' file is special in that it provides read-only access to the device's ROM file, if available. It's disabled by default, however, so applications should write the string "1" to the file to enable it before attempting a read call, and disable it following the access by writing "0" to the file. Note that the device must be enabled for a rom read to return data successfully. In the event a driver is not bound to the device, it can be enabled using the 'enable' file, documented above.h]hXThe ‘rom’ file is special in that it provides read-only access to the device’s ROM file, if available. It’s disabled by default, however, so applications should write the string “1” to the file to enable it before attempting a read call, and disable it following the access by writing “0” to the file. Note that the device must be enabled for a rom read to return data successfully. In the event a driver is not bound to the device, it can be enabled using the ‘enable’ file, documented above.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKShhhhubh)}(hXThe 'remove' file is used to remove the PCI device, by writing a non-zero integer to the file. This does not involve any kind of hot-plug functionality, e.g. powering off the device. The device is removed from the kernel's list of PCI devices, the sysfs directory for it is removed, and the device will be removed from any drivers attached to it. Removal of PCI root buses is disallowed.h]hXThe ‘remove’ file is used to remove the PCI device, by writing a non-zero integer to the file. This does not involve any kind of hot-plug functionality, e.g. powering off the device. The device is removed from the kernel’s list of PCI devices, the sysfs directory for it is removed, and the device will be removed from any drivers attached to it. Removal of PCI root buses is disallowed.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK[hhhhubh)}(hhh](h)}(h(Accessing legacy resources through sysfsh]h(Accessing legacy resources through sysfs}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhhhhhKcubh)}(hLegacy I/O port and ISA memory resources are also provided in sysfs if the underlying platform supports them. They're located in the PCI class hierarchy, e.g.::h]hLegacy I/O port and ISA memory resources are also provided in sysfs if the underlying platform supports them. They’re located in the PCI class hierarchy, e.g.:}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKehjEhhubh)}(hr/sys/class/pci_bus/0000:17/ |-- bridge -> ../../../devices/pci0000:17 |-- cpuaffinity |-- legacy_io `-- legacy_memh]hr/sys/class/pci_bus/0000:17/ |-- bridge -> ../../../devices/pci0000:17 |-- cpuaffinity |-- legacy_io `-- legacy_mem}hjdsbah}(h]h ]h"]h$]h&]hhuh1hhhhKihjEhhubh)}(hXThe legacy_io file is a read/write file that can be used by applications to do legacy port I/O. The application should open the file, seek to the desired port (e.g. 0x3e8) and do a read or a write of 1, 2 or 4 bytes. The legacy_mem file should be mmapped with an offset corresponding to the memory offset desired, e.g. 0xa0000 for the VGA frame buffer. The application can then simply dereference the returned pointer (after checking for errors of course) to access legacy memory space.h]hXThe legacy_io file is a read/write file that can be used by applications to do legacy port I/O. The application should open the file, seek to the desired port (e.g. 0x3e8) and do a read or a write of 1, 2 or 4 bytes. The legacy_mem file should be mmapped with an offset corresponding to the memory offset desired, e.g. 0xa0000 for the VGA frame buffer. The application can then simply dereference the returned pointer (after checking for errors of course) to access legacy memory space.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKohjEhhubeh}(h](accessing-legacy-resources-through-sysfsah ]h"](accessing legacy resources through sysfsah$]h&]uh1hhhhhhhhKcubh)}(hhh](h)}(h&Supporting PCI access on new platformsh]h&Supporting PCI access on new platforms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKxubh)}(hX3In order to support PCI resource mapping as described above, Linux platform code should ideally define ARCH_GENERIC_PCI_MMAP_RESOURCE and use the generic implementation of that functionality. To support the historical interface of mmap() through files in /proc/bus/pci, platforms may also set HAVE_PCI_MMAP.h]hX3In order to support PCI resource mapping as described above, Linux platform code should ideally define ARCH_GENERIC_PCI_MMAP_RESOURCE and use the generic implementation of that functionality. To support the historical interface of mmap() through files in /proc/bus/pci, platforms may also set HAVE_PCI_MMAP.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKzhjhhubh)}(hAlternatively, platforms which set HAVE_PCI_MMAP may provide their own implementation of pci_mmap_resource_range() instead of defining ARCH_GENERIC_PCI_MMAP_RESOURCE.h]hAlternatively, platforms which set HAVE_PCI_MMAP may provide their own implementation of pci_mmap_resource_range() instead of defining ARCH_GENERIC_PCI_MMAP_RESOURCE.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hXPlatforms which support write-combining maps of PCI resources must define arch_can_pci_mmap_wc() which shall evaluate to non-zero at runtime when write-combining is permitted. Platforms which support maps of I/O resources define arch_can_pci_mmap_io() similarly.h]hXPlatforms which support write-combining maps of PCI resources must define arch_can_pci_mmap_wc() which shall evaluate to non-zero at runtime when write-combining is permitted. Platforms which support maps of I/O resources define arch_can_pci_mmap_io() similarly.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hLegacy resources are protected by the HAVE_PCI_LEGACY define. Platforms wishing to support legacy functionality should define it and provide pci_legacy_read, pci_legacy_write and pci_mmap_legacy_page_range functions.h]hLegacy resources are protected by the HAVE_PCI_LEGACY define. Platforms wishing to support legacy functionality should define it and provide pci_legacy_read, pci_legacy_write and pci_mmap_legacy_page_range functions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]&supporting-pci-access-on-new-platformsah ]h"]&supporting pci access on new platformsah$]h&]uh1hhhhhhhhKxubeh}(h],accessing-pci-device-resources-through-sysfsah ]h"],accessing pci device resources through sysfsah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksj'footnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerjerror_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourceh _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}1]jGasrefids}nameids}(jjj jWjjjju nametypes}(jj jjuh}(jhjQjGjWjjjEjju footnote_refs}jC]jGas citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes]ja citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}jKsRparse_messages]transform_messages] transformerN include_log] decorationNhhub.