sphinx.addnodesdocument)}( rawsource children]( translations
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attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget!/translations/zh_CN/PCI/msi-howtomodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah }(h ]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/zh_TW/PCI/msi-howtomodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah }(h ]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/it_IT/PCI/msi-howtomodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah }(h ]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/ja_JP/PCI/msi-howtomodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah }(h ]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/ko_KR/PCI/msi-howtomodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah }(h ]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/pt_BR/PCI/msi-howtomodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah }(h ]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/sp_SP/PCI/msi-howtomodnameN classnameN refexplicituh1hhh ubeh }(h ]h ]h"]h$]h&]current_languageEnglishuh1h
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.h]hDerived from the Unicode character mappings available from
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MULTIPLICATION SIGNh]h×}hj sbah }(h ]h ]h"]timesah$]h&]uh1hhhhKNhhhhubh)}(h0.. |trade| unicode:: U+02122 .. TRADE MARK SIGNh]h™}hj sbah }(h ]h ]h"]tradeah$]h&]uh1hhhhKOhhhhubh)}(h... |uarr| unicode:: U+02191 .. UPWARDS ARROWh]h↑}hj. sbah }(h ]h ]h"]uarrah$]h&]uh1hhhhKPhhhhubh)}(h... |verbar| unicode:: U+0007C .. VERTICAL LINEh]h|}hj= sbah }(h ]h ]h"]verbarah$]h&]uh1hhhhKQhhhhubh)}(h*.. |yen| unicode:: U+000A5 .. YEN SIGN
h]h¥}hjL sbah }(h ]h ]h"]yenah$]h&]uh1hhhhKRhhhhubhsection)}(hhh](htitle)}(hThe MSI Driver Guide HOWTOh]hThe MSI Driver Guide HOWTO}(hjb hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj] hhhhhKubh
field_list)}(hhh](hfield)}(hhh](h
field_name)}(hAuthorsh]hAuthors}(hj| hhhNhNubah }(h ]h ]h"]h$]h&]uh1jz hjw hhhK ubh
field_body)}(h1Tom L Nguyen; Martine Silbermann; Matthew Wilcox
h]h paragraph)}(h0Tom L Nguyen; Martine Silbermann; Matthew Wilcoxh]h0Tom L Nguyen; Martine Silbermann; Matthew Wilcox}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hjw ubeh }(h ]h ]h"]h$]h&]uh1ju hhhKhjr hhubjv )}(hhh](j{ )}(h Copyrighth]h Copyright}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1jz hj hhhK ubj )}(h 2003, 2008 Intel Corporation
h]j )}(h 2003, 2008 Intel Corporationh]h 2003, 2008 Intel Corporation}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhK
hj ubah }(h ]h ]h"]h$]h&]uh1j hj ubeh }(h ]h ]h"]h$]h&]uh1ju hhhK
hjr hhubeh }(h ]h ]h"]h$]h&]uh1jp hj] hhhhhKubj\ )}(hhh](ja )}(hAbout this guideh]hAbout this guide}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj hhhhhK
ubj )}(hThis guide describes the basics of Message Signaled Interrupts (MSIs),
the advantages of using MSI over traditional interrupt mechanisms, how
to change your driver to use MSI or MSI-X and some basic diagnostics to
try if a device doesn't support MSIs.h]hThis guide describes the basics of Message Signaled Interrupts (MSIs),
the advantages of using MSI over traditional interrupt mechanisms, how
to change your driver to use MSI or MSI-X and some basic diagnostics to
try if a device doesn’t support MSIs.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubeh }(h ]about-this-guideah ]h"]about this guideah$]h&]uh1j[ hj] hhhhhK
ubj\ )}(hhh](ja )}(hWhat are MSIs?h]hWhat are MSIs?}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj hhhhhKubj )}(hA Message Signaled Interrupt is a write from the device to a special
address which causes an interrupt to be received by the CPU.h]hA Message Signaled Interrupt is a write from the device to a special
address which causes an interrupt to be received by the CPU.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubj )}(hX% The MSI capability was first specified in PCI 2.2 and was later enhanced
in PCI 3.0 to allow each interrupt to be masked individually. The MSI-X
capability was also introduced with PCI 3.0. It supports more interrupts
per device than MSI and allows interrupts to be independently configured.h]hX% The MSI capability was first specified in PCI 2.2 and was later enhanced
in PCI 3.0 to allow each interrupt to be masked individually. The MSI-X
capability was also introduced with PCI 3.0. It supports more interrupts
per device than MSI and allows interrupts to be independently configured.}(hj' hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubj )}(hNDevices may support both MSI and MSI-X, but only one can be enabled at
a time.h]hNDevices may support both MSI and MSI-X, but only one can be enabled at
a time.}(hj5 hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhK hj hhubeh }(h ]
what-are-msisah ]h"]what are msis?ah$]h&]uh1j[ hj] hhhhhKubj\ )}(hhh](ja )}(h
Why use MSIs?h]h
Why use MSIs?}(hjN hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hjK hhhhhK%ubj )}(hcThere are three reasons why using MSIs can give an advantage over
traditional pin-based interrupts.h]hcThere are three reasons why using MSIs can give an advantage over
traditional pin-based interrupts.}(hj\ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhK'hjK hhubj )}(hX Pin-based PCI interrupts are often shared amongst several devices.
To support this, the kernel must call each interrupt handler associated
with an interrupt, which leads to reduced performance for the system as
a whole. MSIs are never shared, so this problem cannot arise.h]hX Pin-based PCI interrupts are often shared amongst several devices.
To support this, the kernel must call each interrupt handler associated
with an interrupt, which leads to reduced performance for the system as
a whole. MSIs are never shared, so this problem cannot arise.}(hjj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhK*hjK hhubj )}(hX When a device writes data to memory, then raises a pin-based interrupt,
it is possible that the interrupt may arrive before all the data has
arrived in memory (this becomes more likely with devices behind PCI-PCI
bridges). In order to ensure that all the data has arrived in memory,
the interrupt handler must read a register on the device which raised
the interrupt. PCI transaction ordering rules require that all the data
arrive in memory before the value may be returned from the register.
Using MSIs avoids this problem as the interrupt-generating write cannot
pass the data writes, so by the time the interrupt is raised, the driver
knows that all the data has arrived in memory.h]hX When a device writes data to memory, then raises a pin-based interrupt,
it is possible that the interrupt may arrive before all the data has
arrived in memory (this becomes more likely with devices behind PCI-PCI
bridges). In order to ensure that all the data has arrived in memory,
the interrupt handler must read a register on the device which raised
the interrupt. PCI transaction ordering rules require that all the data
arrive in memory before the value may be returned from the register.
Using MSIs avoids this problem as the interrupt-generating write cannot
pass the data writes, so by the time the interrupt is raised, the driver
knows that all the data has arrived in memory.}(hjx hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhK/hjK hhubj )}(hXj PCI devices can only support a single pin-based interrupt per function.
Often drivers have to query the device to find out what event has
occurred, slowing down interrupt handling for the common case. With
MSIs, a device can support more interrupts, allowing each interrupt
to be specialised to a different purpose. One possible design gives
infrequent conditions (such as errors) their own interrupt which allows
the driver to handle the normal interrupt handling path more efficiently.
Other possible designs include giving one interrupt to each packet queue
in a network card or each port in a storage controller.h]hXj PCI devices can only support a single pin-based interrupt per function.
Often drivers have to query the device to find out what event has
occurred, slowing down interrupt handling for the common case. With
MSIs, a device can support more interrupts, allowing each interrupt
to be specialised to a different purpose. One possible design gives
infrequent conditions (such as errors) their own interrupt which allows
the driver to handle the normal interrupt handling path more efficiently.
Other possible designs include giving one interrupt to each packet queue
in a network card or each port in a storage controller.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhK:hjK hhubeh }(h ] why-use-msisah ]h"]
why use msis?ah$]h&]uh1j[ hj] hhhhhK%ubj\ )}(hhh](ja )}(hHow to use MSIsh]hHow to use MSIs}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj hhhhhKFubj )}(hX PCI devices are initialised to use pin-based interrupts. The device
driver has to set up the device to use MSI or MSI-X. Not all machines
support MSIs correctly, and for those machines, the APIs described below
will simply fail and the device will continue to use pin-based interrupts.h]hX PCI devices are initialised to use pin-based interrupts. The device
driver has to set up the device to use MSI or MSI-X. Not all machines
support MSIs correctly, and for those machines, the APIs described below
will simply fail and the device will continue to use pin-based interrupts.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKHhj hhubj\ )}(hhh](ja )}(h Include kernel support for MSIsh]h Include kernel support for MSIs}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj hhhhhKNubj )}(hX0 To support MSI or MSI-X, the kernel must be built with the CONFIG_PCI_MSI
option enabled. This option is only available on some architectures,
and it may depend on some other options also being set. For example,
on x86, you must also enable X86_UP_APIC or SMP in order to see the
CONFIG_PCI_MSI option.h]hX0 To support MSI or MSI-X, the kernel must be built with the CONFIG_PCI_MSI
option enabled. This option is only available on some architectures,
and it may depend on some other options also being set. For example,
on x86, you must also enable X86_UP_APIC or SMP in order to see the
CONFIG_PCI_MSI option.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKPhj hhubeh }(h ] include-kernel-support-for-msisah ]h"] include kernel support for msisah$]h&]uh1j[ hj hhhhhKNubj\ )}(hhh](ja )}(h Using MSIh]h Using MSI}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj hhhhhKWubj )}(hMost of the hard work is done for the driver in the PCI layer. The driver
simply has to request that the PCI layer set up the MSI capability for this
device.h]hMost of the hard work is done for the driver in the PCI layer. The driver
simply has to request that the PCI layer set up the MSI capability for this
device.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKYhj hhubj )}(hQTo automatically use MSI or MSI-X interrupt vectors, use the following
function::h]hPTo automatically use MSI or MSI-X interrupt vectors, use the following
function:}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhK]hj hhubh
literal_block)}(hint pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
unsigned int max_vecs, unsigned int flags);h]hint pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
unsigned int max_vecs, unsigned int flags);}hj sbah }(h ]h ]h"]h$]h&]hhuh1j hhhK`hj hhubj )}(hXT which allocates up to max_vecs interrupt vectors for a PCI device. It
returns the number of vectors allocated or a negative error. If the device
has a requirement for a minimum number of vectors the driver can pass a
min_vecs argument set to this limit, and the PCI core will return -ENOSPC
if it can't meet the minimum number of vectors.h]hXV which allocates up to max_vecs interrupt vectors for a PCI device. It
returns the number of vectors allocated or a negative error. If the device
has a requirement for a minimum number of vectors the driver can pass a
min_vecs argument set to this limit, and the PCI core will return -ENOSPC
if it can’t meet the minimum number of vectors.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKchj hhubj )}(hXn The flags argument is used to specify which type of interrupt can be used
by the device and the driver (PCI_IRQ_INTX, PCI_IRQ_MSI, PCI_IRQ_MSIX).
A convenient short-hand (PCI_IRQ_ALL_TYPES) is also available to ask for
any possible kind of interrupt. If the PCI_IRQ_AFFINITY flag is set,
pci_alloc_irq_vectors() will spread the interrupts around the available CPUs.h]hXn The flags argument is used to specify which type of interrupt can be used
by the device and the driver (PCI_IRQ_INTX, PCI_IRQ_MSI, PCI_IRQ_MSIX).
A convenient short-hand (PCI_IRQ_ALL_TYPES) is also available to ask for
any possible kind of interrupt. If the PCI_IRQ_AFFINITY flag is set,
pci_alloc_irq_vectors() will spread the interrupts around the available CPUs.}(hj- hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKihj hhubj )}(hqTo get the Linux IRQ numbers passed to request_irq() and free_irq() and the
vectors, use the following function::h]hpTo get the Linux IRQ numbers passed to request_irq() and free_irq() and the
vectors, use the following function:}(hj; hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKohj hhubj )}(h9int pci_irq_vector(struct pci_dev *dev, unsigned int nr);h]h9int pci_irq_vector(struct pci_dev *dev, unsigned int nr);}hjI sbah }(h ]h ]h"]h$]h&]hhuh1j hhhKrhj hhubj )}(hX0 If the driver enables the device using pcim_enable_device(), the driver
shouldn't call pci_free_irq_vectors() because pcim_enable_device()
activates automatic management for IRQ vectors. Otherwise, the driver should
free any allocated IRQ vectors before removing the device using the following
function::h]hX1 If the driver enables the device using pcim_enable_device(), the driver
shouldn’t call pci_free_irq_vectors() because pcim_enable_device()
activates automatic management for IRQ vectors. Otherwise, the driver should
free any allocated IRQ vectors before removing the device using the following
function:}(hjW hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKthj hhubj )}(h/void pci_free_irq_vectors(struct pci_dev *dev);h]h/void pci_free_irq_vectors(struct pci_dev *dev);}hje sbah }(h ]h ]h"]h$]h&]hhuh1j hhhKzhj hhubj )}(hXN If a device supports both MSI-X and MSI capabilities, this API will use the
MSI-X facilities in preference to the MSI facilities. MSI-X supports any
number of interrupts between 1 and 2048. In contrast, MSI is restricted to
a maximum of 32 interrupts (and must be a power of two). In addition, the
MSI interrupt vectors must be allocated consecutively, so the system might
not be able to allocate as many vectors for MSI as it could for MSI-X. On
some platforms, MSI interrupts must all be targeted at the same set of CPUs
whereas MSI-X interrupts can all be targeted at different CPUs.h]hXN If a device supports both MSI-X and MSI capabilities, this API will use the
MSI-X facilities in preference to the MSI facilities. MSI-X supports any
number of interrupts between 1 and 2048. In contrast, MSI is restricted to
a maximum of 32 interrupts (and must be a power of two). In addition, the
MSI interrupt vectors must be allocated consecutively, so the system might
not be able to allocate as many vectors for MSI as it could for MSI-X. On
some platforms, MSI interrupts must all be targeted at the same set of CPUs
whereas MSI-X interrupts can all be targeted at different CPUs.}(hjs hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhK|hj hhubj )}(h[If a device supports neither MSI-X nor MSI it will fall back to a single
legacy IRQ vector.h]h[If a device supports neither MSI-X nor MSI it will fall back to a single
legacy IRQ vector.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubj )}(hXE The typical usage of MSI or MSI-X interrupts is to allocate as many vectors
as possible, likely up to the limit supported by the device. If nvec is
larger than the number supported by the device it will automatically be
capped to the supported limit, so there is no need to query the number of
vectors supported beforehand::h]hXD The typical usage of MSI or MSI-X interrupts is to allocate as many vectors
as possible, likely up to the limit supported by the device. If nvec is
larger than the number supported by the device it will automatically be
capped to the supported limit, so there is no need to query the number of
vectors supported beforehand:}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubj )}(hbnvec = pci_alloc_irq_vectors(pdev, 1, nvec, PCI_IRQ_ALL_TYPES)
if (nvec < 0)
goto out_err;h]hbnvec = pci_alloc_irq_vectors(pdev, 1, nvec, PCI_IRQ_ALL_TYPES)
if (nvec < 0)
goto out_err;}hj sbah }(h ]h ]h"]h$]h&]hhuh1j hhhKhj hhubj )}(hIf a driver is unable or unwilling to deal with a variable number of MSI
interrupts it can request a particular number of interrupts by passing that
number to pci_alloc_irq_vectors() function as both 'min_vecs' and
'max_vecs' parameters::h]hIf a driver is unable or unwilling to deal with a variable number of MSI
interrupts it can request a particular number of interrupts by passing that
number to pci_alloc_irq_vectors() function as both ‘min_vecs’ and
‘max_vecs’ parameters:}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubj )}(hdret = pci_alloc_irq_vectors(pdev, nvec, nvec, PCI_IRQ_ALL_TYPES);
if (ret < 0)
goto out_err;h]hdret = pci_alloc_irq_vectors(pdev, nvec, nvec, PCI_IRQ_ALL_TYPES);
if (ret < 0)
goto out_err;}hj sbah }(h ]h ]h"]h$]h&]hhuh1j hhhKhj hhubj )}(hThe most notorious example of the request type described above is enabling
the single MSI mode for a device. It could be done by passing two 1s as
'min_vecs' and 'max_vecs'::h]hThe most notorious example of the request type described above is enabling
the single MSI mode for a device. It could be done by passing two 1s as
‘min_vecs’ and ‘max_vecs’:}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubj )}(h^ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
if (ret < 0)
goto out_err;h]h^ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
if (ret < 0)
goto out_err;}hj sbah }(h ]h ]h"]h$]h&]hhuh1j hhhKhj hhubj )}(hSome devices might not support using legacy line interrupts, in which case
the driver can specify that only MSI or MSI-X is acceptable::h]hSome devices might not support using legacy line interrupts, in which case
the driver can specify that only MSI or MSI-X is acceptable:}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubj )}(hlnvec = pci_alloc_irq_vectors(pdev, 1, nvec, PCI_IRQ_MSI | PCI_IRQ_MSIX);
if (nvec < 0)
goto out_err;h]hlnvec = pci_alloc_irq_vectors(pdev, 1, nvec, PCI_IRQ_MSI | PCI_IRQ_MSIX);
if (nvec < 0)
goto out_err;}hj sbah }(h ]h ]h"]h$]h&]hhuh1j hhhKhj hhubeh }(h ] using-msiah ]h"] using msiah$]h&]uh1j[ hj hhhhhKWubj\ )}(hhh](ja )}(h Legacy APIsh]h Legacy APIs}(hj
hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj hhhhhKubj )}(heThe following old APIs to enable and disable MSI or MSI-X interrupts should
not be used in new code::h]hdThe following old APIs to enable and disable MSI or MSI-X interrupts should
not be used in new code:}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubj )}(hpci_enable_msi() /* deprecated */
pci_disable_msi() /* deprecated */
pci_enable_msix_range() /* deprecated */
pci_enable_msix_exact() /* deprecated */
pci_disable_msix() /* deprecated */h]hpci_enable_msi() /* deprecated */
pci_disable_msi() /* deprecated */
pci_enable_msix_range() /* deprecated */
pci_enable_msix_exact() /* deprecated */
pci_disable_msix() /* deprecated */}hj& sbah }(h ]h ]h"]h$]h&]hhuh1j hhhKhj hhubj )}(hX Additionally there are APIs to provide the number of supported MSI or MSI-X
vectors: pci_msi_vec_count() and pci_msix_vec_count(). In general these
should be avoided in favor of letting pci_alloc_irq_vectors() cap the
number of vectors. If you have a legitimate special use case for the count
of vectors we might have to revisit that decision and add a
pci_nr_irq_vectors() helper that handles MSI and MSI-X transparently.h]hX Additionally there are APIs to provide the number of supported MSI or MSI-X
vectors: pci_msi_vec_count() and pci_msix_vec_count(). In general these
should be avoided in favor of letting pci_alloc_irq_vectors() cap the
number of vectors. If you have a legitimate special use case for the count
of vectors we might have to revisit that decision and add a
pci_nr_irq_vectors() helper that handles MSI and MSI-X transparently.}(hj4 hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubeh }(h ] legacy-apisah ]h"] legacy apisah$]h&]uh1j[ hj hhhhhKubj\ )}(hhh](ja )}(h Considerations when using MSIsh]h Considerations when using MSIs}(hjM hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hjJ hhhhhKubj\ )}(hhh](ja )}(h Spinlocksh]h Spinlocks}(hj^ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj[ hhhhhKubj )}(hXq Most device drivers have a per-device spinlock which is taken in the
interrupt handler. With pin-based interrupts or a single MSI, it is not
necessary to disable interrupts (Linux guarantees the same interrupt will
not be re-entered). If a device uses multiple interrupts, the driver
must disable interrupts while the lock is held. If the device sends
a different interrupt, the driver will deadlock trying to recursively
acquire the spinlock. Such deadlocks can be avoided by using
spin_lock_irqsave() or spin_lock_irq() which disable local interrupts
and acquire the lock (see Documentation/kernel-hacking/locking.rst).h]hXq Most device drivers have a per-device spinlock which is taken in the
interrupt handler. With pin-based interrupts or a single MSI, it is not
necessary to disable interrupts (Linux guarantees the same interrupt will
not be re-entered). If a device uses multiple interrupts, the driver
must disable interrupts while the lock is held. If the device sends
a different interrupt, the driver will deadlock trying to recursively
acquire the spinlock. Such deadlocks can be avoided by using
spin_lock_irqsave() or spin_lock_irq() which disable local interrupts
and acquire the lock (see Documentation/kernel-hacking/locking.rst).}(hjl hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj[ hhubeh }(h ] spinlocksah ]h"] spinlocksah$]h&]uh1j[ hjJ hhhhhKubeh }(h ] considerations-when-using-msisah ]h"] considerations when using msisah$]h&]uh1j[ hj hhhhhKubj\ )}(hhh](ja )}(h4How to tell whether MSI/MSI-X is enabled on a deviceh]h4How to tell whether MSI/MSI-X is enabled on a device}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj hhhhhKubj )}(hUsing 'lspci -v' (as root) may show some devices with "MSI", "Message
Signaled Interrupts" or "MSI-X" capabilities. Each of these capabilities
has an 'Enable' flag which is followed with either "+" (enabled)
or "-" (disabled).h]hUsing ‘lspci -v’ (as root) may show some devices with “MSI”, “Message
Signaled Interrupts” or “MSI-X” capabilities. Each of these capabilities
has an ‘Enable’ flag which is followed with either “+” (enabled)
or “-” (disabled).}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubeh }(h ]4how-to-tell-whether-msi-msi-x-is-enabled-on-a-deviceah ]h"]4how to tell whether msi/msi-x is enabled on a deviceah$]h&]uh1j[ hj hhhhhKubeh }(h ]how-to-use-msisah ]h"]how to use msisah$]h&]uh1j[ hj] hhhhhKFubj\ )}(hhh](ja )}(h
MSI quirksh]h
MSI quirks}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj hhhhhKubj )}(hqSeveral PCI chipsets or devices are known not to support MSIs.
The PCI stack provides three ways to disable MSIs:h]hqSeveral PCI chipsets or devices are known not to support MSIs.
The PCI stack provides three ways to disable MSIs:}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubhenumerated_list)}(hhh](h list_item)}(hgloballyh]j )}(hj h]hglobally}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hj hhhhhNubj )}(h'on all devices behind a specific bridgeh]j )}(hj h]h'on all devices behind a specific bridge}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hj hhhhhNubj )}(hon a single device
h]j )}(hon a single deviceh]hon a single device}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj
ubah }(h ]h ]h"]h$]h&]uh1j hj hhhhhNubeh }(h ]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1j hj hhhhhKubj\ )}(hhh](ja )}(hDisabling MSIs globallyh]hDisabling MSIs globally}(hj3 hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj0 hhhhhKubj )}(hX Some host chipsets simply don't support MSIs properly. If we're
lucky, the manufacturer knows this and has indicated it in the ACPI
FADT table. In this case, Linux automatically disables MSIs.
Some boards don't include this information in the table and so we have
to detect them ourselves. The complete list of these is found near the
quirk_disable_all_msi() function in drivers/pci/quirks.c.h]hX Some host chipsets simply don’t support MSIs properly. If we’re
lucky, the manufacturer knows this and has indicated it in the ACPI
FADT table. In this case, Linux automatically disables MSIs.
Some boards don’t include this information in the table and so we have
to detect them ourselves. The complete list of these is found near the
quirk_disable_all_msi() function in drivers/pci/quirks.c.}(hjA hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj0 hhubj )}(hX If you have a board which has problems with MSIs, you can pass pci=nomsi
on the kernel command line to disable MSIs on all devices. It would be
in your best interests to report the problem to linux-pci@vger.kernel.org
including a full 'lspci -v' so we can add the quirks to the kernel.h](hIf you have a board which has problems with MSIs, you can pass pci=nomsi
on the kernel command line to disable MSIs on all devices. It would be
in your best interests to report the problem to }(hjO hhhNhNubh reference)}(hlinux-pci@vger.kernel.orgh]hlinux-pci@vger.kernel.org}(hjY hhhNhNubah }(h ]h ]h"]h$]h&]refuri mailto:linux-pci@vger.kernel.orguh1jW hjO ubhH
including a full ‘lspci -v’ so we can add the quirks to the kernel.}(hjO hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hhhKhj0 hhubeh }(h ]disabling-msis-globallyah ]h"]disabling msis globallyah$]h&]uh1j[ hj hhhhhKubj\ )}(hhh](ja )}(h Disabling MSIs below a bridgeh]h Disabling MSIs below a bridge}(hj~ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj{ hhhhhKubj )}(hSome PCI bridges are not able to route MSIs between buses properly.
In this case, MSIs must be disabled on all devices behind the bridge.h]hSome PCI bridges are not able to route MSIs between buses properly.
In this case, MSIs must be disabled on all devices behind the bridge.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj{ hhubj )}(hX Some bridges allow you to enable MSIs by changing some bits in their
PCI configuration space (especially the Hypertransport chipsets such
as the nVidia nForce and Serverworks HT2000). As with host chipsets,
Linux mostly knows about them and automatically enables MSIs if it can.
If you have a bridge unknown to Linux, you can enable
MSIs in configuration space using whatever method you know works, then
enable MSIs on that bridge by doing::h]hX Some bridges allow you to enable MSIs by changing some bits in their
PCI configuration space (especially the Hypertransport chipsets such
as the nVidia nForce and Serverworks HT2000). As with host chipsets,
Linux mostly knows about them and automatically enables MSIs if it can.
If you have a bridge unknown to Linux, you can enable
MSIs in configuration space using whatever method you know works, then
enable MSIs on that bridge by doing:}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj{ hhubj )}(h-echo 1 > /sys/bus/pci/devices/$bridge/msi_bush]h-echo 1 > /sys/bus/pci/devices/$bridge/msi_bus}hj sbah }(h ]h ]h"]h$]h&]hhuh1j hhhKhj{ hhubj )}(hPwhere $bridge is the PCI address of the bridge you've enabled (eg
0000:00:0e.0).h]hRwhere $bridge is the PCI address of the bridge you’ve enabled (eg
0000:00:0e.0).}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj{ hhubj )}(hTo disable MSIs, echo 0 instead of 1. Changing this value should be
done with caution as it could break interrupt handling for all devices
below this bridge.h]hTo disable MSIs, echo 0 instead of 1. Changing this value should be
done with caution as it could break interrupt handling for all devices
below this bridge.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhMhj{ hhubj )}(hYAgain, please notify linux-pci@vger.kernel.org of any bridges that need
special handling.h](hAgain, please notify }(hj hhhNhNubjX )}(hlinux-pci@vger.kernel.orgh]hlinux-pci@vger.kernel.org}(hj hhhNhNubah }(h ]h ]h"]h$]h&]refuri mailto:linux-pci@vger.kernel.orguh1jW hj ubh+ of any bridges that need
special handling.}(hj hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hhhMhj{ hhubeh }(h ] disabling-msis-below-a-bridgeah ]h"] disabling msis below a bridgeah$]h&]uh1j[ hj hhhhhKubj\ )}(hhh](ja )}(h!Disabling MSIs on a single deviceh]h!Disabling MSIs on a single device}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj hhhhhM
ubj )}(hXX Some devices are known to have faulty MSI implementations. Usually this
is handled in the individual device driver, but occasionally it's necessary
to handle this with a quirk. Some drivers have an option to disable use
of MSI. While this is a convenient workaround for the driver author,
it is not good practice, and should not be emulated.h]hXZ Some devices are known to have faulty MSI implementations. Usually this
is handled in the individual device driver, but occasionally it’s necessary
to handle this with a quirk. Some drivers have an option to disable use
of MSI. While this is a convenient workaround for the driver author,
it is not good practice, and should not be emulated.}(hj
hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhM hj hhubeh }(h ]!disabling-msis-on-a-single-deviceah ]h"]!disabling msis on a single deviceah$]h&]uh1j[ hj hhhhhM
ubj\ )}(hhh](ja )}(h)Finding why MSIs are disabled on a deviceh]h)Finding why MSIs are disabled on a device}(hj&
hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj#
hhhhhMubj )}(hX9 From the above three sections, you can see that there are many reasons
why MSIs may not be enabled for a given device. Your first step should
be to examine your dmesg carefully to determine whether MSIs are enabled
for your machine. You should also check your .config to be sure you
have enabled CONFIG_PCI_MSI.h]hX9 From the above three sections, you can see that there are many reasons
why MSIs may not be enabled for a given device. Your first step should
be to examine your dmesg carefully to determine whether MSIs are enabled
for your machine. You should also check your .config to be sure you
have enabled CONFIG_PCI_MSI.}(hj4
hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhMhj#
hhubj )}(hX Then, 'lspci -t' gives the list of bridges above a device. Reading
`/sys/bus/pci/devices/*/msi_bus` will tell you whether MSIs are enabled (1)
or disabled (0). If 0 is found in any of the msi_bus files belonging
to bridges between the PCI root and the device, MSIs are disabled.h](hGThen, ‘lspci -t’ gives the list of bridges above a device. Reading
}(hjB
hhhNhNubhtitle_reference)}(h `/sys/bus/pci/devices/*/msi_bus`h]h /sys/bus/pci/devices/*/msi_bus}(hjL
hhhNhNubah }(h ]h ]h"]h$]h&]uh1jJ
hjB
ubh will tell you whether MSIs are enabled (1)
or disabled (0). If 0 is found in any of the msi_bus files belonging
to bridges between the PCI root and the device, MSIs are disabled.}(hjB
hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hhhMhj#
hhubj )}(hIt is also worth checking the device driver to see whether it supports MSIs.
For example, it may contain calls to pci_alloc_irq_vectors() with the
PCI_IRQ_MSI or PCI_IRQ_MSIX flags.h]hIt is also worth checking the device driver to see whether it supports MSIs.
For example, it may contain calls to pci_alloc_irq_vectors() with the
PCI_IRQ_MSI or PCI_IRQ_MSIX flags.}(hjd
hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhM hj#
hhubeh }(h ])finding-why-msis-are-disabled-on-a-deviceah ]h"])finding why msis are disabled on a deviceah$]h&]uh1j[ hj hhhhhMubeh }(h ]
msi-quirksah ]h"]
msi quirksah$]h&]uh1j[ hj] hhhhhKubj\ )}(hhh](ja )}(h#List of device drivers MSI(-X) APIsh]h#List of device drivers MSI(-X) APIs}(hj
hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj
hhhhhM&ubj )}(hThe PCI/MSI subsystem has a dedicated C file for its exported device driver
APIs — `drivers/pci/msi/api.c`. The following functions are exported:h](hUThe PCI/MSI subsystem has a dedicated C file for its exported device driver
APIs — }(hj
hhhNhNubjK
)}(h`drivers/pci/msi/api.c`h]hdrivers/pci/msi/api.c}(hj
hhhNhNubah }(h ]h ]h"]h$]h&]uh1jJ
hj
ubh'. The following functions are exported:}(hj
hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hhhM(hj
hhubh index)}(hhh]h }(h ]h ]h"]h$]h&]entries](singlepci_enable_msi (C function)c.pci_enable_msihNtauh1j
hj
hhhNhNubh desc)}(hhh](h desc_signature)}(h(int pci_enable_msi (struct pci_dev *dev)h]h desc_signature_line)}(h'int pci_enable_msi(struct pci_dev *dev)h](h desc_sig_keyword_type)}(hinth]hint}(hj
hhhNhNubah }(h ]h ]ktah"]h$]h&]uh1j
hj
hhhT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKubh desc_sig_space)}(h h]h }(hj
hhhNhNubah }(h ]h ]wah"]h$]h&]uh1j
hj
hhhj
hKubh desc_name)}(hpci_enable_msih]h
desc_sig_name)}(hpci_enable_msih]hpci_enable_msi}(hj hhhNhNubah }(h ]h ]nah"]h$]h&]uh1j
hj
ubah }(h ]h ](sig-namedescnameeh"]h$]h&]hhuh1j
hj
hhhj
hKubh desc_parameterlist)}(h(struct pci_dev *dev)h]h desc_parameter)}(hstruct pci_dev *devh](h desc_sig_keyword)}(hstructh]hstruct}(hj% hhhNhNubah }(h ]h ]kah"]h$]h&]uh1j# hj ubj
)}(h h]h }(hj4 hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubh)}(hhh]j
)}(hpci_devh]hpci_dev}(hjE hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hjB ubah }(h ]h ]h"]h$]h&] refdomaincreftype
identifier reftargetjG modnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]ja
ASTIdentifier)}j\ j sbc.pci_enable_msiasbuh1hhj ubj
)}(h h]h }(hjn hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubh desc_sig_punctuation)}(h*h]h*}(hj~ hhhNhNubah }(h ]h ]pah"]h$]h&]uh1j| hj ubj
)}(hdevh]hdev}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj ubah }(h ]h ]h"]h$]h&]hhuh1j hj
hhhj
hKubeh }(h ]h ]h"]h$]h&]hhƌ
add_permalinkuh1j
sphinx_line_type
declaratorhj
hhhj
hKubah }(h ]j
ah ](sig
sig-objecteh"]h$]h&] is_multiline
_toc_parts) _toc_namehuh1j
hj
hKhj
hhubh desc_content)}(hhh]j )}(h#Enable MSI interrupt mode on deviceh]h#Enable MSI interrupt mode on device}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj hhubah }(h ]h ]h"]h$]h&]uh1j hj
hhhj
hKubeh }(h ]h ](jZ functioneh"]h$]h&]domainjZ objtypej desctypej noindex noindexentrynocontentsentryuh1j
hhhj
hNhNubh container)}(hX **Parameters**
``struct pci_dev *dev``
the PCI device to operate on
**Description**
Legacy device driver API to enable MSI interrupts mode on device and
allocate a single interrupt vector. On success, the allocated vector
Linux IRQ will be saved at **dev->irq**. The driver must invoke
pci_disable_msi() on cleanup.
**NOTE**
The newer pci_alloc_irq_vectors() / pci_free_irq_vectors() API
pair should, in general, be used instead.
**Return**
0 on success, errno otherwiseh](j )}(h**Parameters**h]hstrong)}(hj h]h
Parameters}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubhdefinition_list)}(hhh]hdefinition_list_item)}(h5``struct pci_dev *dev``
the PCI device to operate on
h](hterm)}(h``struct pci_dev *dev``h]hliteral)}(hj h]hstruct pci_dev *dev}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj
ubh
definition)}(hhh]j )}(h the PCI device to operate onh]h the PCI device to operate on}(hj/ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj) hKhj, ubah }(h ]h ]h"]h$]h&]uh1j* hj
ubeh }(h ]h ]h"]h$]h&]uh1j hj) hKhj ubah }(h ]h ]h"]h$]h&]uh1j hj ubj )}(h**Description**h]j )}(hjQ h]h Description}(hjS hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjO ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj )}(hLegacy device driver API to enable MSI interrupts mode on device and
allocate a single interrupt vector. On success, the allocated vector
Linux IRQ will be saved at **dev->irq**. The driver must invoke
pci_disable_msi() on cleanup.h](hLegacy device driver API to enable MSI interrupts mode on device and
allocate a single interrupt vector. On success, the allocated vector
Linux IRQ will be saved at }(hjg hhhNhNubj )}(h **dev->irq**h]hdev->irq}(hjo hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjg ubh6. The driver must invoke
pci_disable_msi() on cleanup.}(hjg hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj )}(h**NOTE**h]j )}(hj h]hNOTE}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj )}(hhThe newer pci_alloc_irq_vectors() / pci_free_irq_vectors() API
pair should, in general, be used instead.h]hhThe newer pci_alloc_irq_vectors() / pci_free_irq_vectors() API
pair should, in general, be used instead.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj )}(h
**Return**h]j )}(hj h]hReturn}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chK hj ubj )}(h 0 on success, errno otherwiseh]h 0 on success, errno otherwise}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chK hj ubeh }(h ]h ] kernelindentah"]h$]h&]uh1j hj
hhhNhNubj
)}(hhh]h }(h ]h ]h"]h$]h&]entries](j
pci_disable_msi (C function)c.pci_disable_msihNtauh1j
hj
hhhNhNubj
)}(hhh](j
)}(h*void pci_disable_msi (struct pci_dev *dev)h]j
)}(h)void pci_disable_msi(struct pci_dev *dev)h](j
)}(hvoidh]hvoid}(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj hhhT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chK(ubj
)}(h h]h }(hj
hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj hhhj
hK(ubj
)}(hpci_disable_msih]j
)}(hpci_disable_msih]hpci_disable_msi}(hj
hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj
ubah }(h ]h ](j j eh"]h$]h&]hhuh1j
hj hhhj
hK(ubj )}(h(struct pci_dev *dev)h]j )}(hstruct pci_dev *devh](j$ )}(hj' h]hstruct}(hj3
hhhNhNubah }(h ]h ]j0 ah"]h$]h&]uh1j# hj/
ubj
)}(h h]h }(hj@
hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj/
ubh)}(hhh]j
)}(hpci_devh]hpci_dev}(hjQ
hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hjN
ubah }(h ]h ]h"]h$]h&] refdomainjZ reftypej\ reftargetjS
modnameN classnameNj` jc )}jf ]ji )}j\ j
sbc.pci_disable_msiasbuh1hhj/
ubj
)}(h h]h }(hjq
hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj/
ubj} )}(hj h]h*}(hj
hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j| hj/
ubj
)}(hdevh]hdev}(hj
hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj/
ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj+
ubah }(h ]h ]h"]h$]h&]hhuh1j hj hhhj
hK(ubeh }(h ]h ]h"]h$]h&]hhj uh1j
j j hj hhhj
hK(ubah }(h ]j ah ](j j eh"]h$]h&]j j )j huh1j
hj
hK(hj hhubj )}(hhh]j )}(h$Disable MSI interrupt mode on deviceh]h$Disable MSI interrupt mode on device}(hj
hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chK(hj
hhubah }(h ]h ]h"]h$]h&]uh1j hj hhhj
hK(ubeh }(h ]h ](jZ functioneh"]h$]h&]j jZ j j
j j
j j j uh1j
hhhj
hNhNubj )}(hX **Parameters**
``struct pci_dev *dev``
the PCI device to operate on
**Description**
Legacy device driver API to disable MSI interrupt mode on device,
free earlier allocated interrupt vectors, and restore INTx emulation.
The PCI device Linux IRQ (**dev->irq**) is restored to its default
pin-assertion IRQ. This is the cleanup pair of pci_enable_msi().
**NOTE**
The newer pci_alloc_irq_vectors() / pci_free_irq_vectors() API
pair should, in general, be used instead.h](j )}(h**Parameters**h]j )}(hj
h]h
Parameters}(hj
hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj
ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chK,hj
ubj )}(hhh]j )}(h5``struct pci_dev *dev``
the PCI device to operate on
h](j )}(h``struct pci_dev *dev``h]j )}(hj
h]hstruct pci_dev *dev}(hj
hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj
ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chK)hj
ubj+ )}(hhh]j )}(h the PCI device to operate onh]h the PCI device to operate on}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj hK)hj
ubah }(h ]h ]h"]h$]h&]uh1j* hj
ubeh }(h ]h ]h"]h$]h&]uh1j hj hK)hj
ubah }(h ]h ]h"]h$]h&]uh1j hj
ubj )}(h**Description**h]j )}(hj2 h]h Description}(hj4 hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj0 ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chK+hj
ubj )}(hX Legacy device driver API to disable MSI interrupt mode on device,
free earlier allocated interrupt vectors, and restore INTx emulation.
The PCI device Linux IRQ (**dev->irq**) is restored to its default
pin-assertion IRQ. This is the cleanup pair of pci_enable_msi().h](hLegacy device driver API to disable MSI interrupt mode on device,
free earlier allocated interrupt vectors, and restore INTx emulation.
The PCI device Linux IRQ (}(hjH hhhNhNubj )}(h **dev->irq**h]hdev->irq}(hjP hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjH ubh]) is restored to its default
pin-assertion IRQ. This is the cleanup pair of pci_enable_msi().}(hjH hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chK*hj
ubj )}(h**NOTE**h]j )}(hjk h]hNOTE}(hjm hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hji ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chK/hj
ubj )}(hhThe newer pci_alloc_irq_vectors() / pci_free_irq_vectors() API
pair should, in general, be used instead.h]hhThe newer pci_alloc_irq_vectors() / pci_free_irq_vectors() API
pair should, in general, be used instead.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chK0hj
ubeh }(h ]h ] kernelindentah"]h$]h&]uh1j hj
hhhNhNubj
)}(hhh]h }(h ]h ]h"]h$]h&]entries](j
pci_msix_vec_count (C function)c.pci_msix_vec_counthNtauh1j
hj
hhhNhNubj
)}(hhh](j
)}(h,int pci_msix_vec_count (struct pci_dev *dev)h]j
)}(h+int pci_msix_vec_count(struct pci_dev *dev)h](j
)}(hinth]hint}(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj hhhT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chK?ubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj hhhj hK?ubj
)}(hpci_msix_vec_counth]j
)}(hpci_msix_vec_counth]hpci_msix_vec_count}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubah }(h ]h ](j j eh"]h$]h&]hhuh1j
hj hhhj hK?ubj )}(h(struct pci_dev *dev)h]j )}(hstruct pci_dev *devh](j$ )}(hj' h]hstruct}(hj hhhNhNubah }(h ]h ]j0 ah"]h$]h&]uh1j# hj ubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubh)}(hhh]j
)}(hpci_devh]hpci_dev}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubah }(h ]h ]h"]h$]h&] refdomainjZ reftypej\ reftargetj
modnameN classnameNj` jc )}jf ]ji )}j\ j sbc.pci_msix_vec_countasbuh1hhj ubj
)}(h h]h }(hj+ hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubj} )}(hj h]h*}(hj9 hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j| hj ubj
)}(hdevh]hdev}(hjF hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj ubah }(h ]h ]h"]h$]h&]hhuh1j hj hhhj hK?ubeh }(h ]h ]h"]h$]h&]hhj uh1j
j j hj hhhj hK?ubah }(h ]j ah ](j j eh"]h$]h&]j j )j huh1j
hj hK?hj hhubj )}(hhh]j )}(h/Get number of MSI-X interrupt vectors on deviceh]h/Get number of MSI-X interrupt vectors on device}(hjp hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chK?hjm hhubah }(h ]h ]h"]h$]h&]uh1j hj hhhj hK?ubeh }(h ]h ](jZ functioneh"]h$]h&]j jZ j j j j j j j uh1j
hhhj
hNhNubj )}(hX **Parameters**
``struct pci_dev *dev``
the PCI device to operate on
**Return**
number of MSI-X interrupt vectors available on this device
(i.e., the device's MSI-X capability structure "table size"), -EINVAL
if the device is not MSI-X capable, other errnos otherwise.h](j )}(h**Parameters**h]j )}(hj h]h
Parameters}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKChj ubj )}(hhh]j )}(h5``struct pci_dev *dev``
the PCI device to operate on
h](j )}(h``struct pci_dev *dev``h]j )}(hj h]hstruct pci_dev *dev}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chK@hj ubj+ )}(hhh]j )}(h the PCI device to operate onh]h the PCI device to operate on}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj hK@hj ubah }(h ]h ]h"]h$]h&]uh1j* hj ubeh }(h ]h ]h"]h$]h&]uh1j hj hK@hj ubah }(h ]h ]h"]h$]h&]uh1j hj ubj )}(h
**Return**h]j )}(hj h]hReturn}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKBhj ubj )}(hnumber of MSI-X interrupt vectors available on this device
(i.e., the device's MSI-X capability structure "table size"), -EINVAL
if the device is not MSI-X capable, other errnos otherwise.h]hnumber of MSI-X interrupt vectors available on this device
(i.e., the device’s MSI-X capability structure “table size”), -EINVAL
if the device is not MSI-X capable, other errnos otherwise. }(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKBhj ubeh }(h ]h ] kernelindentah"]h$]h&]uh1j hj
hhhNhNubj
)}(hhh]h }(h ]h ]h"]h$]h&]entries](j
"pci_enable_msix_range (C function)c.pci_enable_msix_rangehNtauh1j
hj
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)}(hhh](j
)}(hcint pci_enable_msix_range (struct pci_dev *dev, struct msix_entry *entries, int minvec, int maxvec)h]j
)}(hbint pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, int minvec, int maxvec)h](j
)}(hinth]hint}(hj1 hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj- hhhT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKSubj
)}(h h]h }(hj@ hhhNhNubah }(h ]h ]j
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hj- hhhj? hKSubj
)}(hpci_enable_msix_rangeh]j
)}(hpci_enable_msix_rangeh]hpci_enable_msix_range}(hjR hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hjN ubah }(h ]h ](j j eh"]h$]h&]hhuh1j
hj- hhhj? hKSubj )}(hI(struct pci_dev *dev, struct msix_entry *entries, int minvec, int maxvec)h](j )}(hstruct pci_dev *devh](j$ )}(hj' h]hstruct}(hjn hhhNhNubah }(h ]h ]j0 ah"]h$]h&]uh1j# hjj ubj
)}(h h]h }(hj{ hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hjj ubh)}(hhh]j
)}(hpci_devh]hpci_dev}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubah }(h ]h ]h"]h$]h&] refdomainjZ reftypej\ reftargetj modnameN classnameNj` jc )}jf ]ji )}j\ jT sbc.pci_enable_msix_rangeasbuh1hhjj ubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hjj ubj} )}(hj h]h*}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j| hjj ubj
)}(hdevh]hdev}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hjj ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hjf ubj )}(hstruct msix_entry *entriesh](j$ )}(hj' h]hstruct}(hj hhhNhNubah }(h ]h ]j0 ah"]h$]h&]uh1j# hj ubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubh)}(hhh]j
)}(h
msix_entryh]h
msix_entry}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubah }(h ]h ]h"]h$]h&] refdomainjZ reftypej\ reftargetj modnameN classnameNj` jc )}jf ]j c.pci_enable_msix_rangeasbuh1hhj ubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubj} )}(hj h]h*}(hj* hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j| hj ubj
)}(hentriesh]hentries}(hj7 hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hjf ubj )}(h
int minvech](j
)}(hinth]hint}(hjP hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hjL ubj
)}(h h]h }(hj^ hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hjL ubj
)}(hminvech]hminvec}(hjl hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hjL ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hjf ubj )}(h
int maxvech](j
)}(hinth]hint}(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubj
)}(hmaxvech]hmaxvec}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hjf ubeh }(h ]h ]h"]h$]h&]hhuh1j hj- hhhj? hKSubeh }(h ]h ]h"]h$]h&]hhj uh1j
j j hj) hhhj? hKSubah }(h ]j$ ah ](j j eh"]h$]h&]j j )j huh1j
hj? hKShj& hhubj )}(hhh]j )}(h%Enable MSI-X interrupt mode on deviceh]h%Enable MSI-X interrupt mode on device}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKShj hhubah }(h ]h ]h"]h$]h&]uh1j hj& hhhj? hKSubeh }(h ]h ](jZ functioneh"]h$]h&]j jZ j j j j j j j uh1j
hhhj
hNhNubj )}(hX **Parameters**
``struct pci_dev *dev``
the PCI device to operate on
``struct msix_entry *entries``
input/output parameter, array of MSI-X configuration entries
``int minvec``
minimum required number of MSI-X vectors
``int maxvec``
maximum desired number of MSI-X vectors
**Description**
Legacy device driver API to enable MSI-X interrupt mode on device and
configure its MSI-X capability structure as appropriate. The passed
**entries** array must have each of its members "entry" field set to a
desired (valid) MSI-X vector number, where the range of valid MSI-X
vector numbers can be queried through pci_msix_vec_count(). If
successful, the driver must invoke pci_disable_msix() on cleanup.
**NOTE**
The newer pci_alloc_irq_vectors() / pci_free_irq_vectors() API
pair should, in general, be used instead.
**Return**
number of MSI-X vectors allocated (which might be smaller
than **maxvecs**), where Linux IRQ numbers for such allocated vectors
are saved back in the **entries** array elements' "vector" field. Return
-ENOSPC if less than **minvecs** interrupt vectors are available.
Return -EINVAL if one of the passed **entries** members "entry" field
was invalid or a duplicate, or if plain MSI interrupts mode was
earlier enabled on device. Return other errnos otherwise.h](j )}(h**Parameters**h]j )}(hj h]h
Parameters}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKWhj ubj )}(hhh](j )}(h5``struct pci_dev *dev``
the PCI device to operate on
h](j )}(h``struct pci_dev *dev``h]j )}(hj h]hstruct pci_dev *dev}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj
ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKThj ubj+ )}(hhh]j )}(h the PCI device to operate onh]h the PCI device to operate on}(hj% hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj! hKThj" ubah }(h ]h ]h"]h$]h&]uh1j* hj ubeh }(h ]h ]h"]h$]h&]uh1j hj! hKThj ubj )}(h\``struct msix_entry *entries``
input/output parameter, array of MSI-X configuration entries
h](j )}(h ``struct msix_entry *entries``h]j )}(hjE h]hstruct msix_entry *entries}(hjG hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjC ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKUhj? ubj+ )}(hhh]j )}(h= 0) and
msi_map::virq contains the allocated Linux interrupt number (> 0).
On fail msi_map::index contains the error code and msi_map::virq
is set to 0.h](j )}(h**Parameters**h]j )}(hjM h]h
Parameters}(hjO hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjK ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjG ubj )}(hhh](j )}(h1``struct pci_dev *dev``
PCI device to operate on
h](j )}(h``struct pci_dev *dev``h]j )}(hjl h]hstruct pci_dev *dev}(hjn hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjf ubj+ )}(hhh]j )}(hPCI device to operate onh]hPCI device to operate on}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj hKhj ubah }(h ]h ]h"]h$]h&]uh1j* hjf ubeh }(h ]h ]h"]h$]h&]uh1j hj hKhjc ubj )}(h~``unsigned int index``
Index to allocate. If **index** == MSI_ANY_INDEX this allocates
the next free index in the MSI-X table
h](j )}(h``unsigned int index``h]j )}(hj h]hunsigned int index}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj+ )}(hhh]j )}(hfIndex to allocate. If **index** == MSI_ANY_INDEX this allocates
the next free index in the MSI-X tableh](hIndex to allocate. If }(hj hhhNhNubj )}(h **index**h]hindex}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubhG == MSI_ANY_INDEX this allocates
the next free index in the MSI-X table}(hj hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubah }(h ]h ]h"]h$]h&]uh1j* hj ubeh }(h ]h ]h"]h$]h&]uh1j hj hKhjc ubj )}(hq``const struct irq_affinity_desc *affdesc``
Optional pointer to an affinity descriptor structure. NULL otherwise
h](j )}(h+``const struct irq_affinity_desc *affdesc``h]j )}(hj h]h'const struct irq_affinity_desc *affdesc}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj+ )}(hhh]j )}(hDOptional pointer to an affinity descriptor structure. NULL otherwiseh]hDOptional pointer to an affinity descriptor structure. NULL otherwise}(hj
hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj hKhj ubah }(h ]h ]h"]h$]h&]uh1j* hj ubeh }(h ]h ]h"]h$]h&]uh1j hj hKhjc ubeh }(h ]h ]h"]h$]h&]uh1j hjG ubj )}(h
**Return**h]j )}(hj, h]hReturn}(hj. hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj* ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjG ubj )}(hA struct msi_maph]hA struct msi_map}(hjB hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjG ubj )}(h**Description**h]j )}(hjS h]h Description}(hjU hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjQ ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjG ubh block_quote)}(hOn success msi_map::index contains the allocated index (>= 0) and
msi_map::virq contains the allocated Linux interrupt number (> 0).
On fail msi_map::index contains the error code and msi_map::virq
is set to 0.h](j )}(hOn success msi_map::index contains the allocated index (>= 0) and
msi_map::virq contains the allocated Linux interrupt number (> 0).h]hOn success msi_map::index contains the allocated index (>= 0) and
msi_map::virq contains the allocated Linux interrupt number (> 0).}(hjo hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjk ubj )}(hMOn fail msi_map::index contains the error code and msi_map::virq
is set to 0.h]hMOn fail msi_map::index contains the error code and msi_map::virq
is set to 0.}(hj~ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjk ubeh }(h ]h ]h"]h$]h&]uh1ji hj} hKhjG ubeh }(h ]h ] kernelindentah"]h$]h&]uh1j hj
hhhNhNubj
)}(hhh]h }(h ]h ]h"]h$]h&]entries](j
pci_msix_free_irq (C function)c.pci_msix_free_irqhNtauh1j
hj
hhhNhNubj
)}(hhh](j
)}(h@void pci_msix_free_irq (struct pci_dev *dev, struct msi_map map)h]j
)}(h?void pci_msix_free_irq(struct pci_dev *dev, struct msi_map map)h](j
)}(hvoidh]hvoid}(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj hhhT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj hhhj hKubj
)}(hpci_msix_free_irqh]j
)}(hpci_msix_free_irqh]hpci_msix_free_irq}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubah }(h ]h ](j j eh"]h$]h&]hhuh1j
hj hhhj hKubj )}(h)(struct pci_dev *dev, struct msi_map map)h](j )}(hstruct pci_dev *devh](j$ )}(hj' h]hstruct}(hj hhhNhNubah }(h ]h ]j0 ah"]h$]h&]uh1j# hj ubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubh)}(hhh]j
)}(hpci_devh]hpci_dev}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubah }(h ]h ]h"]h$]h&] refdomainjZ reftypej\ reftargetj modnameN classnameNj` jc )}jf ]ji )}j\ j sbc.pci_msix_free_irqasbuh1hhj ubj
)}(h h]h }(hj. hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubj} )}(hj h]h*}(hj< hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j| hj ubj
)}(hdevh]hdev}(hjI hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj ubj )}(hstruct msi_map maph](j$ )}(hj' h]hstruct}(hjb hhhNhNubah }(h ]h ]j0 ah"]h$]h&]uh1j# hj^ ubj
)}(h h]h }(hjo hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj^ ubh)}(hhh]j
)}(hmsi_maph]hmsi_map}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj} ubah }(h ]h ]h"]h$]h&] refdomainjZ reftypej\ reftargetj modnameN classnameNj` jc )}jf ]j* c.pci_msix_free_irqasbuh1hhj^ ubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj^ ubj
)}(hmaph]hmap}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj^ ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj ubeh }(h ]h ]h"]h$]h&]hhuh1j hj hhhj hKubeh }(h ]h ]h"]h$]h&]hhj uh1j
j j hj hhhj hKubah }(h ]j ah ](j j eh"]h$]h&]j j )j huh1j
hj hKhj hhubj )}(hhh]j )}(h1Free an interrupt on a PCI/MSI-X interrupt domainh]h1Free an interrupt on a PCI/MSI-X interrupt domain}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj hhubah }(h ]h ]h"]h$]h&]uh1j hj hhhj hKubeh }(h ]h ](jZ functioneh"]h$]h&]j jZ j j j j j j j uh1j
hhhj
hNhNubj )}(h**Parameters**
``struct pci_dev *dev``
The PCI device to operate on
``struct msi_map map``
A struct msi_map describing the interrupt to free
**Description**
Undo an interrupt vector allocation. Does not disable MSI-X.h](j )}(h**Parameters**h]j )}(hj h]h
Parameters}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj )}(hhh](j )}(h5``struct pci_dev *dev``
The PCI device to operate on
h](j )}(h``struct pci_dev *dev``h]j )}(hj h]hstruct pci_dev *dev}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj+ )}(hhh]j )}(h The PCI device to operate onh]h The PCI device to operate on}(hj0 hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj, hKhj- ubah }(h ]h ]h"]h$]h&]uh1j* hj ubeh }(h ]h ]h"]h$]h&]uh1j hj, hKhj ubj )}(hI``struct msi_map map``
A struct msi_map describing the interrupt to free
h](j )}(h``struct msi_map map``h]j )}(hjP h]hstruct msi_map map}(hjR hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjN ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjJ ubj+ )}(hhh]j )}(h1A struct msi_map describing the interrupt to freeh]h1A struct msi_map describing the interrupt to free}(hji hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hje hKhjf ubah }(h ]h ]h"]h$]h&]uh1j* hjJ ubeh }(h ]h ]h"]h$]h&]uh1j hje hKhj ubeh }(h ]h ]h"]h$]h&]uh1j hj ubj )}(h**Description**h]j )}(hj h]h Description}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj )}(hirq**) is restored to its default pin
assertion IRQ. This is the cleanup pair of pci_enable_msix_range().
**NOTE**
The newer pci_alloc_irq_vectors() / pci_free_irq_vectors() API
pair should, in general, be used instead.h](j )}(h**Parameters**h]j )}(hj h]h
Parameters}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj )}(hhh]j )}(h5``struct pci_dev *dev``
the PCI device to operate on
h](j )}(h``struct pci_dev *dev``h]j )}(hj h]hstruct pci_dev *dev}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj+ )}(hhh]j )}(h the PCI device to operate onh]h the PCI device to operate on}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj hKhj ubah }(h ]h ]h"]h$]h&]uh1j* hj ubeh }(h ]h ]h"]h$]h&]uh1j hj hKhj ubah }(h ]h ]h"]h$]h&]uh1j hj ubj )}(h**Description**h]j )}(hj h]h Description}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj
ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj )}(hX
Legacy device driver API to disable MSI-X interrupt mode on device,
free earlier-allocated interrupt vectors, and restore INTx.
The PCI device Linux IRQ (**dev->irq**) is restored to its default pin
assertion IRQ. This is the cleanup pair of pci_enable_msix_range().h](hLegacy device driver API to disable MSI-X interrupt mode on device,
free earlier-allocated interrupt vectors, and restore INTx.
The PCI device Linux IRQ (}(hj" hhhNhNubj )}(h **dev->irq**h]hdev->irq}(hj* hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj" ubhd) is restored to its default pin
assertion IRQ. This is the cleanup pair of pci_enable_msix_range().}(hj" hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj )}(h**NOTE**h]j )}(hjE h]hNOTE}(hjG hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjC ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj )}(hhThe newer pci_alloc_irq_vectors() / pci_free_irq_vectors() API
pair should, in general, be used instead.h]hhThe newer pci_alloc_irq_vectors() / pci_free_irq_vectors() API
pair should, in general, be used instead.}(hj[ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubeh }(h ]h ] kernelindentah"]h$]h&]uh1j hj
hhhNhNubj
)}(hhh]h }(h ]h ]h"]h$]h&]entries](j
"pci_alloc_irq_vectors (C function)c.pci_alloc_irq_vectorshNtauh1j
hj
hhhNhNubj
)}(hhh](j
)}(hqint pci_alloc_irq_vectors (struct pci_dev *dev, unsigned int min_vecs, unsigned int max_vecs, unsigned int flags)h]j
)}(hpint pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs, unsigned int max_vecs, unsigned int flags)h](j
)}(hinth]hint}(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj hhhT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj hhhj hKubj
)}(hpci_alloc_irq_vectorsh]j
)}(hpci_alloc_irq_vectorsh]hpci_alloc_irq_vectors}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubah }(h ]h ](j j eh"]h$]h&]hhuh1j
hj hhhj hKubj )}(hW(struct pci_dev *dev, unsigned int min_vecs, unsigned int max_vecs, unsigned int flags)h](j )}(hstruct pci_dev *devh](j$ )}(hj' h]hstruct}(hj hhhNhNubah }(h ]h ]j0 ah"]h$]h&]uh1j# hj ubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubh)}(hhh]j
)}(hpci_devh]hpci_dev}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubah }(h ]h ]h"]h$]h&] refdomainjZ reftypej\ reftargetj modnameN classnameNj` jc )}jf ]ji )}j\ j sbc.pci_alloc_irq_vectorsasbuh1hhj ubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubj} )}(hj h]h*}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j| hj ubj
)}(hdevh]hdev}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj ubj )}(hunsigned int min_vecsh](j
)}(hunsignedh]hunsigned}(hj9 hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj5 ubj
)}(h h]h }(hjG hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj5 ubj
)}(hinth]hint}(hjU hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj5 ubj
)}(h h]h }(hjc hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj5 ubj
)}(hmin_vecsh]hmin_vecs}(hjq hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj5 ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj ubj )}(hunsigned int max_vecsh](j
)}(hunsignedh]hunsigned}(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubj
)}(hinth]hint}(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubj
)}(hmax_vecsh]hmax_vecs}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj ubj )}(hunsigned int flagsh](j
)}(hunsignedh]hunsigned}(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubj
)}(hinth]hint}(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj ubj
)}(hflagsh]hflags}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj ubeh }(h ]h ]h"]h$]h&]hhuh1j hj hhhj hKubeh }(h ]h ]h"]h$]h&]hhj uh1j
j j hj hhhj hKubah }(h ]j} ah ](j j eh"]h$]h&]j j )j huh1j
hj hKhj hhubj )}(hhh]j )}(h*Allocate multiple device interrupt vectorsh]h*Allocate multiple device interrupt vectors}(hj= hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj: hhubah }(h ]h ]h"]h$]h&]uh1j hj hhhj hKubeh }(h ]h ](jZ functioneh"]h$]h&]j jZ j jU j jU j j j uh1j
hhhj
hNhNubj )}(hX **Parameters**
``struct pci_dev *dev``
the PCI device to operate on
``unsigned int min_vecs``
minimum required number of vectors (must be >= 1)
``unsigned int max_vecs``
maximum desired number of vectors
``unsigned int flags``
One or more of:
**Description**
* ``PCI_IRQ_MSIX`` Allow trying MSI-X vector allocations
* ``PCI_IRQ_MSI`` Allow trying MSI vector allocations
* ``PCI_IRQ_INTX`` Allow trying INTx interrupts, if and
only if **min_vecs** == 1
* ``PCI_IRQ_AFFINITY`` Auto-manage IRQs affinity by spreading
the vectors around available CPUs
Allocate up to **max_vecs** interrupt vectors on device. MSI-X irq
vector allocation has a higher precedence over plain MSI, which has a
higher precedence over legacy INTx emulation.
Upon a successful allocation, the caller should use pci_irq_vector()
to get the Linux IRQ number to be passed to request_threaded_irq().
The driver must call pci_free_irq_vectors() on cleanup.
**Return**
number of allocated vectors (which might be smaller than
**max_vecs**), -ENOSPC if less than **min_vecs** interrupt vectors are
available, other errnos otherwise.h](j )}(h**Parameters**h]j )}(hj_ h]h
Parameters}(hja hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj] ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjY ubj )}(hhh](j )}(h5``struct pci_dev *dev``
the PCI device to operate on
h](j )}(h``struct pci_dev *dev``h]j )}(hj~ h]hstruct pci_dev *dev}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj| ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjx ubj+ )}(hhh]j )}(h the PCI device to operate onh]h the PCI device to operate on}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj hKhj ubah }(h ]h ]h"]h$]h&]uh1j* hjx ubeh }(h ]h ]h"]h$]h&]uh1j hj hKhju ubj )}(hL``unsigned int min_vecs``
minimum required number of vectors (must be >= 1)
h](j )}(h``unsigned int min_vecs``h]j )}(hj h]hunsigned int min_vecs}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj+ )}(hhh]j )}(h1minimum required number of vectors (must be >= 1)h]h1minimum required number of vectors (must be >= 1)}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj hKhj ubah }(h ]h ]h"]h$]h&]uh1j* hj ubeh }(h ]h ]h"]h$]h&]uh1j hj hKhju ubj )}(h<``unsigned int max_vecs``
maximum desired number of vectors
h](j )}(h``unsigned int max_vecs``h]j )}(hj h]hunsigned int max_vecs}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubj+ )}(hhh]j )}(h!maximum desired number of vectorsh]h!maximum desired number of vectors}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj hKhj ubah }(h ]h ]h"]h$]h&]uh1j* hj ubeh }(h ]h ]h"]h$]h&]uh1j hj hKhju ubj )}(h'``unsigned int flags``
One or more of:
h](j )}(h``unsigned int flags``h]j )}(hj) h]hunsigned int flags}(hj+ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj' ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj# ubj+ )}(hhh]j )}(hOne or more of:h]hOne or more of:}(hjB hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj> hKhj? ubah }(h ]h ]h"]h$]h&]uh1j* hj# ubeh }(h ]h ]h"]h$]h&]uh1j hj> hKhju ubeh }(h ]h ]h"]h$]h&]uh1j hjY ubj )}(h**Description**h]j )}(hjd h]h Description}(hjf hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjb ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjY ubjj )}(hX8 * ``PCI_IRQ_MSIX`` Allow trying MSI-X vector allocations
* ``PCI_IRQ_MSI`` Allow trying MSI vector allocations
* ``PCI_IRQ_INTX`` Allow trying INTx interrupts, if and
only if **min_vecs** == 1
* ``PCI_IRQ_AFFINITY`` Auto-manage IRQs affinity by spreading
the vectors around available CPUs
h]h bullet_list)}(hhh](j )}(h;``PCI_IRQ_MSIX`` Allow trying MSI-X vector allocationsh]j )}(hj h](j )}(h``PCI_IRQ_MSIX``h]h PCI_IRQ_MSIX}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubh+ Allow trying MSI-X vector allocations}(hj hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubah }(h ]h ]h"]h$]h&]uh1j hj ubj )}(h:``PCI_IRQ_MSI`` Allow trying MSI vector allocations
h]j )}(h9``PCI_IRQ_MSI`` Allow trying MSI vector allocationsh](j )}(h``PCI_IRQ_MSI``h]h PCI_IRQ_MSI}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubh* Allow trying MSI vector allocations}(hj hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubah }(h ]h ]h"]h$]h&]uh1j hj ubj )}(hU``PCI_IRQ_INTX`` Allow trying INTx interrupts, if and
only if **min_vecs** == 1
h]j )}(hT``PCI_IRQ_INTX`` Allow trying INTx interrupts, if and
only if **min_vecs** == 1h](j )}(h``PCI_IRQ_INTX``h]h PCI_IRQ_INTX}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubh3 Allow trying INTx interrupts, if and
only if }(hj hhhNhNubj )}(h **min_vecs**h]hmin_vecs}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubh == 1}(hj hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubah }(h ]h ]h"]h$]h&]uh1j hj ubj )}(h_``PCI_IRQ_AFFINITY`` Auto-manage IRQs affinity by spreading
the vectors around available CPUs
h]j )}(h^``PCI_IRQ_AFFINITY`` Auto-manage IRQs affinity by spreading
the vectors around available CPUsh](j )}(h``PCI_IRQ_AFFINITY``h]hPCI_IRQ_AFFINITY}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj
ubhJ Auto-manage IRQs affinity by spreading
the vectors around available CPUs}(hj
hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj ubah }(h ]h ]h"]h$]h&]uh1j hj ubeh }(h ]h ]h"]h$]h&]bulletj uh1j~ hj hKhjz ubah }(h ]h ]h"]h$]h&]uh1ji hj hKhjY ubj )}(hAllocate up to **max_vecs** interrupt vectors on device. MSI-X irq
vector allocation has a higher precedence over plain MSI, which has a
higher precedence over legacy INTx emulation.h](hAllocate up to }(hj= hhhNhNubj )}(h **max_vecs**h]hmax_vecs}(hjE hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj= ubh interrupt vectors on device. MSI-X irq
vector allocation has a higher precedence over plain MSI, which has a
higher precedence over legacy INTx emulation.}(hj= hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjY ubj )}(hUpon a successful allocation, the caller should use pci_irq_vector()
to get the Linux IRQ number to be passed to request_threaded_irq().
The driver must call pci_free_irq_vectors() on cleanup.h]hUpon a successful allocation, the caller should use pci_irq_vector()
to get the Linux IRQ number to be passed to request_threaded_irq().
The driver must call pci_free_irq_vectors() on cleanup.}(hj^ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjY ubj )}(h
**Return**h]j )}(hjo h]hReturn}(hjq hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjm ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjY ubj )}(hnumber of allocated vectors (which might be smaller than
**max_vecs**), -ENOSPC if less than **min_vecs** interrupt vectors are
available, other errnos otherwise.h](h9number of allocated vectors (which might be smaller than
}(hj hhhNhNubj )}(h **max_vecs**h]hmax_vecs}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubh), -ENOSPC if less than }(hj hhhNhNubj )}(h **min_vecs**h]hmin_vecs}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ubh9 interrupt vectors are
available, other errnos otherwise.}(hj hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjY ubeh }(h ]h ] kernelindentah"]h$]h&]uh1j hj
hhhNhNubj
)}(hhh]h }(h ]h ]h"]h$]h&]entries](j
+pci_alloc_irq_vectors_affinity (C function) c.pci_alloc_irq_vectors_affinityhNtauh1j
hj
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)}(hhh](j
)}(hint pci_alloc_irq_vectors_affinity (struct pci_dev *dev, unsigned int min_vecs, unsigned int max_vecs, unsigned int flags, struct irq_affinity *affd)h]j
)}(hint pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs, unsigned int max_vecs, unsigned int flags, struct irq_affinity *affd)h](j
)}(hinth]hint}(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj hhhT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKubj
)}(h h]h }(hj hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj hhhj hKubj
)}(h pci_alloc_irq_vectors_affinityh]j
)}(h pci_alloc_irq_vectors_affinityh]h pci_alloc_irq_vectors_affinity}(hj hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj ubah }(h ]h ](j j eh"]h$]h&]hhuh1j
hj hhhj hKubj )}(hr(struct pci_dev *dev, unsigned int min_vecs, unsigned int max_vecs, unsigned int flags, struct irq_affinity *affd)h](j )}(hstruct pci_dev *devh](j$ )}(hj' h]hstruct}(hj! hhhNhNubah }(h ]h ]j0 ah"]h$]h&]uh1j# hj! ubj
)}(h h]h }(hj"! hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj! ubh)}(hhh]j
)}(hpci_devh]hpci_dev}(hj3! hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj0! ubah }(h ]h ]h"]h$]h&] refdomainjZ reftypej\ reftargetj5! modnameN classnameNj` jc )}jf ]ji )}j\ j sb c.pci_alloc_irq_vectors_affinityasbuh1hhj! ubj
)}(h h]h }(hjS! hhhNhNubah }(h ]h ]j
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)}(hdevh]hdev}(hjn! hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj! ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj
! ubj )}(hunsigned int min_vecsh](j
)}(hunsignedh]hunsigned}(hj! hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
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)}(h h]h }(hj! hhhNhNubah }(h ]h ]j
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ah"]h$]h&]uh1j
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)}(h h]h }(hj! hhhNhNubah }(h ]h ]j
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hj! ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj
! ubj )}(hunsigned int max_vecsh](j
)}(hunsignedh]hunsigned}(hj! hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj! ubj
)}(h h]h }(hj! hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
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ah"]h$]h&]uh1j
hj! ubj
)}(h h]h }(hj" hhhNhNubah }(h ]h ]j
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hj! ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj
! ubj )}(hunsigned int flagsh](j
)}(hunsignedh]hunsigned}(hj)" hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj%" ubj
)}(h h]h }(hj7" hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj%" ubj
)}(hinth]hint}(hjE" hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj%" ubj
)}(h h]h }(hjS" hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj%" ubj
)}(hflagsh]hflags}(hja" hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj%" ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj
! ubj )}(hstruct irq_affinity *affdh](j$ )}(hj' h]hstruct}(hjz" hhhNhNubah }(h ]h ]j0 ah"]h$]h&]uh1j# hjv" ubj
)}(h h]h }(hj" hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
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)}(h irq_affinityh]h irq_affinity}(hj" hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj" ubah }(h ]h ]h"]h$]h&] refdomainjZ reftypej\ reftargetj" modnameN classnameNj` jc )}jf ]jO! c.pci_alloc_irq_vectors_affinityasbuh1hhjv" ubj
)}(h h]h }(hj" hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hjv" ubj} )}(hj h]h*}(hj" hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j| hjv" ubj
)}(haffdh]haffd}(hj" hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hjv" ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj
! ubeh }(h ]h ]h"]h$]h&]hhuh1j hj hhhj hKubeh }(h ]h ]h"]h$]h&]hhj uh1j
j j hj hhhj hKubah }(h ]j ah ](j j eh"]h$]h&]j j )j huh1j
hj hKhj hhubj )}(hhh]j )}(hEAllocate multiple device interrupt vectors with affinity requirementsh]hEAllocate multiple device interrupt vectors with affinity requirements}(hj" hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj" hhubah }(h ]h ]h"]h$]h&]uh1j hj hhhj hKubeh }(h ]h ](jZ functioneh"]h$]h&]j jZ j j# j j# j j j uh1j
hhhj
hNhNubj )}(hX **Parameters**
``struct pci_dev *dev``
the PCI device to operate on
``unsigned int min_vecs``
minimum required number of vectors (must be >= 1)
``unsigned int max_vecs``
maximum desired number of vectors
``unsigned int flags``
allocation flags, as in pci_alloc_irq_vectors()
``struct irq_affinity *affd``
affinity requirements (can be ``NULL``).
**Description**
Same as pci_alloc_irq_vectors(), but with the extra **affd** parameter.
Check that function docs, and :c:type:`struct irq_affinity `, for more details.h](j )}(h**Parameters**h]j )}(hj # h]h
Parameters}(hj # hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj# ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj# ubj )}(hhh](j )}(h5``struct pci_dev *dev``
the PCI device to operate on
h](j )}(h``struct pci_dev *dev``h]j )}(hj<# h]hstruct pci_dev *dev}(hj># hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj:# ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj6# ubj+ )}(hhh]j )}(h the PCI device to operate onh]h the PCI device to operate on}(hjU# hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjQ# hKhjR# ubah }(h ]h ]h"]h$]h&]uh1j* hj6# ubeh }(h ]h ]h"]h$]h&]uh1j hjQ# hKhj3# ubj )}(hL``unsigned int min_vecs``
minimum required number of vectors (must be >= 1)
h](j )}(h``unsigned int min_vecs``h]j )}(hju# h]hunsigned int min_vecs}(hjw# hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjs# ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhjo# ubj+ )}(hhh]j )}(h1minimum required number of vectors (must be >= 1)h]h1minimum required number of vectors (must be >= 1)}(hj# hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj# hKhj# ubah }(h ]h ]h"]h$]h&]uh1j* hjo# ubeh }(h ]h ]h"]h$]h&]uh1j hj# hKhj3# ubj )}(h<``unsigned int max_vecs``
maximum desired number of vectors
h](j )}(h``unsigned int max_vecs``h]j )}(hj# h]hunsigned int max_vecs}(hj# hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj# ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj# ubj+ )}(hhh]j )}(h!maximum desired number of vectorsh]h!maximum desired number of vectors}(hj# hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj# hKhj# ubah }(h ]h ]h"]h$]h&]uh1j* hj# ubeh }(h ]h ]h"]h$]h&]uh1j hj# hKhj3# ubj )}(hG``unsigned int flags``
allocation flags, as in pci_alloc_irq_vectors()
h](j )}(h``unsigned int flags``h]j )}(hj# h]hunsigned int flags}(hj# hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj# ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj# ubj+ )}(hhh]j )}(h/allocation flags, as in pci_alloc_irq_vectors()h]h/allocation flags, as in pci_alloc_irq_vectors()}(hj $ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj# hKhj# ubah }(h ]h ]h"]h$]h&]uh1j* hj# ubeh }(h ]h ]h"]h$]h&]uh1j hj# hKhj3# ubj )}(hG``struct irq_affinity *affd``
affinity requirements (can be ``NULL``).
h](j )}(h ``struct irq_affinity *affd``h]j )}(hj $ h]hstruct irq_affinity *affd}(hj"$ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj $ ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj$ ubj+ )}(hhh]j )}(h(affinity requirements (can be ``NULL``).h](h affinity requirements (can be }(hj9$ hhhNhNubj )}(h``NULL``h]hNULL}(hjA$ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj9$ ubh).}(hj9$ hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hj5$ hKhj6$ ubah }(h ]h ]h"]h$]h&]uh1j* hj$ ubeh }(h ]h ]h"]h$]h&]uh1j hj5$ hKhj3# ubeh }(h ]h ]h"]h$]h&]uh1j hj# ubj )}(h**Description**h]j )}(hjm$ h]h Description}(hjo$ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjk$ ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj# ubj )}(hSame as pci_alloc_irq_vectors(), but with the extra **affd** parameter.
Check that function docs, and :c:type:`struct irq_affinity `, for more details.h](h4Same as pci_alloc_irq_vectors(), but with the extra }(hj$ hhhNhNubj )}(h**affd**h]haffd}(hj$ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj$ ubh* parameter.
Check that function docs, and }(hj$ hhhNhNubh)}(h,:c:type:`struct irq_affinity `h]j )}(hj$ h]hstruct irq_affinity}(hj$ hhhNhNubah }(h ]h ](xrefjZ c-typeeh"]h$]h&]uh1j hj$ ubah }(h ]h ]h"]h$]h&]refdoc
PCI/msi-howto refdomainjZ reftypetype refexplicitrefwarnj` jc )}jf ]sb reftarget irq_affinityuh1hhT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chKhj$ ubh, for more details.}(hj$ hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hj$ hKhj# ubeh }(h ]h ] kernelindentah"]h$]h&]uh1j hj
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pci_irq_vector (C function)c.pci_irq_vectorhNtauh1j
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)}(h9int pci_irq_vector (struct pci_dev *dev, unsigned int nr)h]j
)}(h8int pci_irq_vector(struct pci_dev *dev, unsigned int nr)h](j
)}(hinth]hint}(hj$ hhhNhNubah }(h ]h ]j
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)}(hpci_irq_vectorh]hpci_irq_vector}(hj% hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
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hj$ hhhj$ hM,ubj )}(h&(struct pci_dev *dev, unsigned int nr)h](j )}(hstruct pci_dev *devh](j$ )}(hj' h]hstruct}(hj*% hhhNhNubah }(h ]h ]j0 ah"]h$]h&]uh1j# hj&% ubj
)}(h h]h }(hj7% hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
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)}(hpci_devh]hpci_dev}(hjH% hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hjE% ubah }(h ]h ]h"]h$]h&] refdomainjZ reftypej\ reftargetjJ% modnameN classnameNj` jc )}jf ]ji )}j\ j% sbc.pci_irq_vectorasbuh1hhj&% ubj
)}(h h]h }(hjh% hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj&% ubj} )}(hj h]h*}(hjv% hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j| hj&% ubj
)}(hdevh]hdev}(hj% hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj&% ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj"% ubj )}(hunsigned int nrh](j
)}(hunsignedh]hunsigned}(hj% hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj% ubj
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ah"]h$]h&]uh1j
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ah"]h$]h&]uh1j
hj% ubj
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ah"]h$]h&]uh1j
hj% ubj
)}(hnrh]hnr}(hj% hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj% ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj"% ubeh }(h ]h ]h"]h$]h&]hhuh1j hj$ hhhj$ hM,ubeh }(h ]h ]h"]h$]h&]hhj uh1j
j j hj$ hhhj$ hM,ubah }(h ]j$ ah ](j j eh"]h$]h&]j j )j huh1j
hj$ hM,hj$ hhubj )}(hhh]j )}(h1Get Linux IRQ number of a device interrupt vectorh]h1Get Linux IRQ number of a device interrupt vector}(hj% hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chM,hj% hhubah }(h ]h ]h"]h$]h&]uh1j hj$ hhhj$ hM,ubeh }(h ]h ](jZ functioneh"]h$]h&]j jZ j j& j j& j j j uh1j
hhhj
hNhNubj )}(hX **Parameters**
``struct pci_dev *dev``
the PCI device to operate on
``unsigned int nr``
device-relative interrupt vector index (0-based); has different
meanings, depending on interrupt mode:
**Description**
* MSI-X the index in the MSI-X vector table
* MSI the index of the enabled MSI vectors
* INTx must be 0
**Return**
the Linux IRQ number, or -EINVAL if **nr** is out of rangeh](j )}(h**Parameters**h]j )}(hj & h]h
Parameters}(hj"& hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj & ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chM0hj& ubj )}(hhh](j )}(h5``struct pci_dev *dev``
the PCI device to operate on
h](j )}(h``struct pci_dev *dev``h]j )}(hj?& h]hstruct pci_dev *dev}(hjA& hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj=& ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chM-hj9& ubj+ )}(hhh]j )}(h the PCI device to operate onh]h the PCI device to operate on}(hjX& hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjT& hM-hjU& ubah }(h ]h ]h"]h$]h&]uh1j* hj9& ubeh }(h ]h ]h"]h$]h&]uh1j hjT& hM-hj6& ubj )}(h{``unsigned int nr``
device-relative interrupt vector index (0-based); has different
meanings, depending on interrupt mode:
h](j )}(h``unsigned int nr``h]j )}(hjx& h]hunsigned int nr}(hjz& hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjv& ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chM/hjr& ubj+ )}(hhh]j )}(hfdevice-relative interrupt vector index (0-based); has different
meanings, depending on interrupt mode:h]hfdevice-relative interrupt vector index (0-based); has different
meanings, depending on interrupt mode:}(hj& hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chM.hj& ubah }(h ]h ]h"]h$]h&]uh1j* hjr& ubeh }(h ]h ]h"]h$]h&]uh1j hj& hM/hj6& ubeh }(h ]h ]h"]h$]h&]uh1j hj& ubj )}(h**Description**h]j )}(hj& h]h Description}(hj& hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj& ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chM1hj& ubjj )}(hw* MSI-X the index in the MSI-X vector table
* MSI the index of the enabled MSI vectors
* INTx must be 0
h]j )}(hhh](j )}(h-MSI-X the index in the MSI-X vector tableh]j )}(hj& h]h-MSI-X the index in the MSI-X vector table}(hj& hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chM0hj& ubah }(h ]h ]h"]h$]h&]uh1j hj& ubj )}(h.MSI the index of the enabled MSI vectorsh]j )}(hj& h]h.MSI the index of the enabled MSI vectors}(hj& hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chM1hj& ubah }(h ]h ]h"]h$]h&]uh1j hj& ubj )}(hINTx must be 0
h]j )}(hINTx must be 0h]hINTx must be 0}(hj' hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chM2hj' ubah }(h ]h ]h"]h$]h&]uh1j hj& ubeh }(h ]h ]h"]h$]h&]j6 j uh1j~ hj& hM0hj& ubah }(h ]h ]h"]h$]h&]uh1ji hj& hM0hj& ubj )}(h
**Return**h]j )}(hj(' h]hReturn}(hj*' hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj&' ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chM4hj& ubj )}(h:the Linux IRQ number, or -EINVAL if **nr** is out of rangeh](h$the Linux IRQ number, or -EINVAL if }(hj>' hhhNhNubj )}(h**nr**h]hnr}(hjF' hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj>' ubh is out of range}(hj>' hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chM5hj& ubeh }(h ]h ] kernelindentah"]h$]h&]uh1j hj
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)}(hhh]h }(h ]h ]h"]h$]h&]entries](j
!pci_irq_get_affinity (C function)c.pci_irq_get_affinityhNtauh1j
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)}(hIconst struct cpumask * pci_irq_get_affinity (struct pci_dev *dev, int nr)h]j
)}(hGconst struct cpumask *pci_irq_get_affinity(struct pci_dev *dev, int nr)h](j$ )}(hj h]hconst}(hj' hhhNhNubah }(h ]h ]j0 ah"]h$]h&]uh1j# hj{' hhhT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMDubj
)}(h h]h }(hj' hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj{' hhhj' hMDubj$ )}(hj' h]hstruct}(hj' hhhNhNubah }(h ]h ]j0 ah"]h$]h&]uh1j# hj{' hhhj' hMDubj
)}(h h]h }(hj' hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj{' hhhj' hMDubh)}(hhh]j
)}(hcpumaskh]hcpumask}(hj' hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj' ubah }(h ]h ]h"]h$]h&] refdomainjZ reftypej\ reftargetj' modnameN classnameNj` jc )}jf ]ji )}j\ pci_irq_get_affinitysbc.pci_irq_get_affinityasbuh1hhj{' hhhj' hMDubj
)}(h h]h }(hj' hhhNhNubah }(h ]h ]j
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)}(hpci_irq_get_affinityh]j
)}(hj' h]hpci_irq_get_affinity}(hj' hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj' ubah }(h ]h ](j j eh"]h$]h&]hhuh1j
hj{' hhhj' hMDubj )}(h (struct pci_dev *dev, int nr)h](j )}(hstruct pci_dev *devh](j$ )}(hj' h]hstruct}(hj( hhhNhNubah }(h ]h ]j0 ah"]h$]h&]uh1j# hj( ubj
)}(h h]h }(hj!( hhhNhNubah }(h ]h ]j
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hj/( ubah }(h ]h ]h"]h$]h&] refdomainjZ reftypej\ reftargetj4( modnameN classnameNj` jc )}jf ]j' c.pci_irq_get_affinityasbuh1hhj( ubj
)}(h h]h }(hjP( hhhNhNubah }(h ]h ]j
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hj( ubj} )}(hj h]h*}(hj^( hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j| hj( ubj
)}(hdevh]hdev}(hjk( hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj( ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj ( ubj )}(hint nrh](j
)}(hinth]hint}(hj( hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj( ubj
)}(h h]h }(hj( hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj( ubj
)}(hnrh]hnr}(hj( hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj( ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj ( ubeh }(h ]h ]h"]h$]h&]hhuh1j hj{' hhhj' hMDubeh }(h ]h ]h"]h$]h&]hhj uh1j
j j hjw' hhhj' hMDubah }(h ]jr' ah ](j j eh"]h$]h&]j j )j huh1j
hj' hMDhjt' hhubj )}(hhh]j )}(h&Get a device interrupt vector affinityh]h&Get a device interrupt vector affinity}(hj( hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMDhj( hhubah }(h ]h ]h"]h$]h&]uh1j hjt' hhhj' hMDubeh }(h ]h ](jZ functioneh"]h$]h&]j jZ j j( j j( j j j uh1j
hhhj
hNhNubj )}(hX **Parameters**
``struct pci_dev *dev``
the PCI device to operate on
``int nr``
device-relative interrupt vector index (0-based); has different
meanings, depending on interrupt mode:
**Description**
* MSI-X the index in the MSI-X vector table
* MSI the index of the enabled MSI vectors
* INTx must be 0
**Return**
MSI/MSI-X vector affinity, NULL if **nr** is out of range or if
the MSI(-X) vector was allocated without explicit affinity
requirements (e.g., by pci_enable_msi(), pci_enable_msix_range(), or
pci_alloc_irq_vectors() without the ``PCI_IRQ_AFFINITY`` flag). Return a
generic set of CPU IDs representing all possible CPUs available
during system boot if the device is in legacy INTx mode.h](j )}(h**Parameters**h]j )}(hj( h]h
Parameters}(hj( hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj( ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMHhj( ubj )}(hhh](j )}(h5``struct pci_dev *dev``
the PCI device to operate on
h](j )}(h``struct pci_dev *dev``h]j )}(hj ) h]hstruct pci_dev *dev}(hj
) hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ) ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMEhj) ubj+ )}(hhh]j )}(h the PCI device to operate onh]h the PCI device to operate on}(hj$) hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj ) hMEhj!) ubah }(h ]h ]h"]h$]h&]uh1j* hj) ubeh }(h ]h ]h"]h$]h&]uh1j hj ) hMEhj) ubj )}(hr``int nr``
device-relative interrupt vector index (0-based); has different
meanings, depending on interrupt mode:
h](j )}(h
``int nr``h]j )}(hjD) h]hint nr}(hjF) hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjB) ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMGhj>) ubj+ )}(hhh]j )}(hfdevice-relative interrupt vector index (0-based); has different
meanings, depending on interrupt mode:h]hfdevice-relative interrupt vector index (0-based); has different
meanings, depending on interrupt mode:}(hj]) hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMFhjZ) ubah }(h ]h ]h"]h$]h&]uh1j* hj>) ubeh }(h ]h ]h"]h$]h&]uh1j hjY) hMGhj) ubeh }(h ]h ]h"]h$]h&]uh1j hj( ubj )}(h**Description**h]j )}(hj) h]h Description}(hj) hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj~) ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMIhj( ubjj )}(hw* MSI-X the index in the MSI-X vector table
* MSI the index of the enabled MSI vectors
* INTx must be 0
h]j )}(hhh](j )}(h-MSI-X the index in the MSI-X vector tableh]j )}(hj) h]h-MSI-X the index in the MSI-X vector table}(hj) hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMHhj) ubah }(h ]h ]h"]h$]h&]uh1j hj) ubj )}(h.MSI the index of the enabled MSI vectorsh]j )}(hj) h]h.MSI the index of the enabled MSI vectors}(hj) hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMIhj) ubah }(h ]h ]h"]h$]h&]uh1j hj) ubj )}(hINTx must be 0
h]j )}(hINTx must be 0h]hINTx must be 0}(hj) hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMJhj) ubah }(h ]h ]h"]h$]h&]uh1j hj) ubeh }(h ]h ]h"]h$]h&]j6 j uh1j~ hj) hMHhj) ubah }(h ]h ]h"]h$]h&]uh1ji hj) hMHhj( ubj )}(h
**Return**h]j )}(hj) h]hReturn}(hj) hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj) ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMLhj( ubj )}(hX MSI/MSI-X vector affinity, NULL if **nr** is out of range or if
the MSI(-X) vector was allocated without explicit affinity
requirements (e.g., by pci_enable_msi(), pci_enable_msix_range(), or
pci_alloc_irq_vectors() without the ``PCI_IRQ_AFFINITY`` flag). Return a
generic set of CPU IDs representing all possible CPUs available
during system boot if the device is in legacy INTx mode.h](h#MSI/MSI-X vector affinity, NULL if }(hj
* hhhNhNubj )}(h**nr**h]hnr}(hj* hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj
* ubh is out of range or if
the MSI(-X) vector was allocated without explicit affinity
requirements (e.g., by pci_enable_msi(), pci_enable_msix_range(), or
pci_alloc_irq_vectors() without the }(hj
* hhhNhNubj )}(h``PCI_IRQ_AFFINITY``h]hPCI_IRQ_AFFINITY}(hj$* hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj
* ubh flag). Return a
generic set of CPU IDs representing all possible CPUs available
during system boot if the device is in legacy INTx mode.}(hj
* hhhNhNubeh }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMMhj( ubeh }(h ]h ] kernelindentah"]h$]h&]uh1j hj
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)}(hhh]h }(h ]h ]h"]h$]h&]entries](j
!pci_free_irq_vectors (C function)c.pci_free_irq_vectorshNtauh1j
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)}(h/void pci_free_irq_vectors (struct pci_dev *dev)h]j
)}(h.void pci_free_irq_vectors(struct pci_dev *dev)h](j
)}(hvoidh]hvoid}(hj]* hhhNhNubah }(h ]h ]j
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)}(hpci_free_irq_vectorsh]hpci_free_irq_vectors}(hj~* hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hjz* ubah }(h ]h ](j j eh"]h$]h&]hhuh1j
hjY* hhhjk* hMoubj )}(h(struct pci_dev *dev)h]j )}(hstruct pci_dev *devh](j$ )}(hj' h]hstruct}(hj* hhhNhNubah }(h ]h ]j0 ah"]h$]h&]uh1j# hj* ubj
)}(h h]h }(hj* hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj* ubh)}(hhh]j
)}(hpci_devh]hpci_dev}(hj* hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj* ubah }(h ]h ]h"]h$]h&] refdomainjZ reftypej\ reftargetj* modnameN classnameNj` jc )}jf ]ji )}j\ j* sbc.pci_free_irq_vectorsasbuh1hhj* ubj
)}(h h]h }(hj* hhhNhNubah }(h ]h ]j
ah"]h$]h&]uh1j
hj* ubj} )}(hj h]h*}(hj* hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j| hj* ubj
)}(hdevh]hdev}(hj* hhhNhNubah }(h ]h ]j ah"]h$]h&]uh1j
hj* ubeh }(h ]h ]h"]h$]h&]noemphhhuh1j hj* ubah }(h ]h ]h"]h$]h&]hhuh1j hjY* hhhjk* hMoubeh }(h ]h ]h"]h$]h&]hhj uh1j
j j hjU* hhhjk* hMoubah }(h ]jP* ah ](j j eh"]h$]h&]j j )j huh1j
hjk* hMohjR* hhubj )}(hhh]j )}(h+Free previously allocated IRQs for a deviceh]h+Free previously allocated IRQs for a device}(hj + hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMohj+ hhubah }(h ]h ]h"]h$]h&]uh1j hjR* hhhjk* hMoubeh }(h ]h ](jZ functioneh"]h$]h&]j jZ j j5+ j j5+ j j j uh1j
hhhj
hNhNubj )}(hX **Parameters**
``struct pci_dev *dev``
the PCI device to operate on
**Description**
Undo the interrupt vector allocations and possible device MSI/MSI-X
enablement earlier done through pci_alloc_irq_vectors_affinity() or
pci_alloc_irq_vectors().
WARNING: Do not call this function if the device has been enabled
with pcim_enable_device(). In that case, IRQ vectors are automatically
managed via pcim_msi_release() and calling pci_free_irq_vectors() can
lead to double-free issues.h](j )}(h**Parameters**h]j )}(hj?+ h]h
Parameters}(hjA+ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj=+ ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMshj9+ ubj )}(hhh]j )}(h5``struct pci_dev *dev``
the PCI device to operate on
h](j )}(h``struct pci_dev *dev``h]j )}(hj^+ h]hstruct pci_dev *dev}(hj`+ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj\+ ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMphjX+ ubj+ )}(hhh]j )}(h the PCI device to operate onh]h the PCI device to operate on}(hjw+ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hjs+ hMphjt+ ubah }(h ]h ]h"]h$]h&]uh1j* hjX+ ubeh }(h ]h ]h"]h$]h&]uh1j hjs+ hMphjU+ ubah }(h ]h ]h"]h$]h&]uh1j hj9+ ubj )}(h**Description**h]j )}(hj+ h]h Description}(hj+ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hj+ ubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMrhj9+ ubj )}(hUndo the interrupt vector allocations and possible device MSI/MSI-X
enablement earlier done through pci_alloc_irq_vectors_affinity() or
pci_alloc_irq_vectors().h]hUndo the interrupt vector allocations and possible device MSI/MSI-X
enablement earlier done through pci_alloc_irq_vectors_affinity() or
pci_alloc_irq_vectors().}(hj+ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMqhj9+ ubj )}(hWARNING: Do not call this function if the device has been enabled
with pcim_enable_device(). In that case, IRQ vectors are automatically
managed via pcim_msi_release() and calling pci_free_irq_vectors() can
lead to double-free issues.h]hWARNING: Do not call this function if the device has been enabled
with pcim_enable_device(). In that case, IRQ vectors are automatically
managed via pcim_msi_release() and calling pci_free_irq_vectors() can
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``struct pci_dev *dev``
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**Description**
Write the Linux-cached MSI(-X) state back on device. This is
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adapter reset.}(hj?- hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hT/var/lib/git/docbuild/linux/Documentation/PCI/msi-howto:385: ./drivers/pci/msi/api.chMhj, ubeh }(h ]h ] kernelindentah"]h$]h&]uh1j hj
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