€•½Œsphinx.addnodes”Œdocument”“”)�”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)�”}”(hhh]”(hŒ pending_xref”“”)�”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…”�”}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ1/translations/zh_CN/PCI/endpoint/pci-ntb-function”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)�”}”(hhh]”hŒChinese (Traditional)”…”�”}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ1/translations/zh_TW/PCI/endpoint/pci-ntb-function”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒItalian”…”�”}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ1/translations/it_IT/PCI/endpoint/pci-ntb-function”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒJapanese”…”�”}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ1/translations/ja_JP/PCI/endpoint/pci-ntb-function”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒKorean”…”�”}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ1/translations/ko_KR/PCI/endpoint/pci-ntb-function”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒPortuguese (Brazilian)”…”�”}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ1/translations/pt_BR/PCI/endpoint/pci-ntb-function”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒSpanish”…”�”}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ1/translations/sp_SP/PCI/endpoint/pci-ntb-function”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒcomment”“”)�”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…”�”}”hh·sbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1hµhhh²hh³ŒK/var/lib/git/docbuild/linux/Documentation/PCI/endpoint/pci-ntb-function.rst”h´KubhŒsection”“”)�”}”(hhh]”(hŒtitle”“”)�”}”(hŒPCI NTB Function”h]”hŒPCI NTB Function”…”�”}”(hhÏh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhÊh²hh³hÇh´KubhŒ field_list”“”)�”}”(hhh]”hŒfield”“”)�”}”(hhh]”(hŒ field_name”“”)�”}”(hŒAuthor”h]”hŒAuthor”…”�”}”(hhéh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hçhhäh³hÇh´KubhŒ field_body”“”)�”}”(hŒ'Kishon Vijay Abraham I ”h]”hŒ paragraph”“”)�”}”(hŒ&Kishon Vijay Abraham I ”h]”(hŒKishon Vijay Abraham I <”…”�”}”(hhÿh²hh³Nh´NubhŒ reference”“”)�”}”(hŒ kishon@ti.com”h]”hŒ kishon@ti.com”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”Œmailto:kishon@ti.com”uh1jhhÿubhŒ>”…”�”}”(hhÿh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Khhùubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hhäubeh}”(h]”h ]”h"]”h$]”h&]”uh1hâh³hÇh´Khhßh²hubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝhhÊh²hh³hÇh´Kubhþ)�”}”(hX}PCI Non-Transparent Bridges (NTB) allow two host systems to communicate with each other by exposing each host as a device to the other host. NTBs typically support the ability to generate interrupts on the remote machine, expose memory ranges as BARs, and perform DMA. They also support scratchpads, which are areas of memory within the NTB that are accessible from both machines.”h]”hX}PCI Non-Transparent Bridges (NTB) allow two host systems to communicate with each other by exposing each host as a device to the other host. NTBs typically support the ability to generate interrupts on the remote machine, expose memory ranges as BARs, and perform DMA. They also support scratchpads, which are areas of memory within the NTB that are accessible from both machines.”…”�”}”(hj5h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K hhÊh²hubhþ)�”}”(hŒÍPCI NTB Function allows two different systems (or hosts) to communicate with each other by configuring the endpoint instances in such a way that transactions from one system are routed to the other system.”h]”hŒÍPCI NTB Function allows two different systems (or hosts) to communicate with each other by configuring the endpoint instances in such a way that transactions from one system are routed to the other system.”…”�”}”(hjCh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KhhÊh²hubhþ)�”}”(hXMIn the below diagram, PCI NTB function configures the SoC with multiple PCI Endpoint (EP) instances in such a way that transactions from one EP controller are routed to the other EP controller. Once PCI NTB function configures the SoC with multiple EP instances, HOST1 and HOST2 can communicate with each other using SoC as a bridge.”h]”hXMIn the below diagram, PCI NTB function configures the SoC with multiple PCI Endpoint (EP) instances in such a way that transactions from one EP controller are routed to the other EP controller. Once PCI NTB function configures the SoC with multiple EP instances, HOST1 and HOST2 can communicate with each other using SoC as a bridge.”…”�”}”(hjQh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KhhÊh²hubhŒ literal_block”“”)�”}”(hX4 +-------------+ +-------------+ | | | | | HOST1 | | HOST2 | | | | | +------^------+ +------^------+ | | | | +---------|-------------------------------------------------|---------+ | +------v------+ +------v------+ | | | | | | | | | EP | | EP | | | | CONTROLLER1 | | CONTROLLER2 | | | | <-----------------------------------> | | | | | | | | | | | | | | | | | SoC With Multiple EP Instances | | | | | | (Configured using NTB Function) | | | | +-------------+ +-------------+ | +---------------------------------------------------------------------+”h]”hX4 +-------------+ +-------------+ | | | | | HOST1 | | HOST2 | | | | | +------^------+ +------^------+ | | | | +---------|-------------------------------------------------|---------+ | +------v------+ +------v------+ | | | | | | | | | EP | | EP | | | | CONTROLLER1 | | CONTROLLER2 | | | | <-----------------------------------> | | | | | | | | | | | | | | | | | SoC With Multiple EP Instances | | | | | | (Configured using NTB Function) | | | | +-------------+ +-------------+ | +---------------------------------------------------------------------+”…”�”}”hjasbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆŒforce”‰Œlanguage”Œtext”Œhighlight_args”}”uh1j_h³hÇh´KhhÊh²hubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒ$Constructs used for Implementing NTB”h]”hŒ$Constructs used for Implementing NTB”…”�”}”(hjwh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjth²hh³hÇh´K1ubhŒ block_quote”“”)�”}”(hŒ}1) Config Region 2) Self Scratchpad Registers 3) Peer Scratchpad Registers 4) Doorbell (DB) Registers 5) Memory Window (MW) ”h]”hŒenumerated_list”“”)�”}”(hhh]”(hŒ list_item”“”)�”}”(hŒ Config Region”h]”hþ)�”}”(hj”h]”hŒ Config Region”…”�”}”(hj–h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K3hj’ubah}”(h]”h ]”h"]”h$]”h&]”uh1j�hj�ubj‘)�”}”(hŒSelf Scratchpad Registers”h]”hþ)�”}”(hj«h]”hŒSelf Scratchpad Registers”…”�”}”(hj­h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K4hj©ubah}”(h]”h ]”h"]”h$]”h&]”uh1j�hj�ubj‘)�”}”(hŒPeer Scratchpad Registers”h]”hþ)�”}”(hjÂh]”hŒPeer Scratchpad Registers”…”�”}”(hjÄh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K5hjÀubah}”(h]”h ]”h"]”h$]”h&]”uh1j�hj�ubj‘)�”}”(hŒDoorbell (DB) Registers”h]”hþ)�”}”(hjÙh]”hŒDoorbell (DB) Registers”…”�”}”(hjÛh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K6hj×ubah}”(h]”h ]”h"]”h$]”h&]”uh1j�hj�ubj‘)�”}”(hŒMemory Window (MW) ”h]”hþ)�”}”(hŒMemory Window (MW)”h]”hŒMemory Window (MW)”…”�”}”(hjòh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K7hjîubah}”(h]”h ]”h"]”h$]”h&]”uh1j�hj�ubeh}”(h]”h ]”h"]”h$]”h&]”Œenumtype”Œarabic”Œprefix”hŒsuffix”Œ)”uh1j‹hj‡ubah}”(h]”h ]”h"]”h$]”h&]”uh1j…h³hÇh´K3hjth²hubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒConfig Region:”h]”hŒConfig Region:”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjh²hh³hÇh´K;ubhþ)�”}”(hXZConfig Region is a construct that is specific to NTB implemented using NTB Endpoint Function Driver. The host and endpoint side NTB function driver will exchange information with each other using this region. Config Region has Control/Status Registers for configuring the Endpoint Controller. Host can write into this region for configuring the outbound Address Translation Unit (ATU) and to indicate the link status. Endpoint can indicate the status of commands issued by host in this region. Endpoint can also indicate the scratchpad offset and number of memory windows to the host using this region.”h]”hXZConfig Region is a construct that is specific to NTB implemented using NTB Endpoint Function Driver. The host and endpoint side NTB function driver will exchange information with each other using this region. Config Region has Control/Status Registers for configuring the Endpoint Controller. Host can write into this region for configuring the outbound Address Translation Unit (ATU) and to indicate the link status. Endpoint can indicate the status of commands issued by host in this region. Endpoint can also indicate the scratchpad offset and number of memory windows to the host using this region.”…”�”}”(hj(h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K=hjh²hubhþ)�”}”(hŒLThe format of Config Region is given below. All the fields here are 32 bits.”h]”hŒLThe format of Config Region is given below. All the fields here are 32 bits.”…”�”}”(hj6h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KFhjh²hubj`)�”}”(hX° +------------------------+ | COMMAND | +------------------------+ | ARGUMENT | +------------------------+ | STATUS | +------------------------+ | TOPOLOGY | +------------------------+ | ADDRESS (LOWER 32) | +------------------------+ | ADDRESS (UPPER 32) | +------------------------+ | SIZE | +------------------------+ | NO OF MEMORY WINDOW | +------------------------+ | MEMORY WINDOW1 OFFSET | +------------------------+ | SPAD OFFSET | +------------------------+ | SPAD COUNT | +------------------------+ | DB ENTRY SIZE | +------------------------+ | DB DATA | +------------------------+ | : | +------------------------+ | : | +------------------------+ | DB DATA | +------------------------+ COMMAND: NTB function supports three commands: CMD_CONFIGURE_DOORBELL (0x1): Command to configure doorbell. Before invoking this command, the host should allocate and initialize MSI/MSI-X vectors (i.e., initialize the MSI/MSI-X Capability in the Endpoint). The endpoint on receiving this command will configure the outbound ATU such that transactions to Doorbell BAR will be routed to the MSI/MSI-X address programmed by the host. The ARGUMENT register should be populated with number of DBs to configure (in the lower 16 bits) and if MSI or MSI-X should be configured (BIT 16). CMD_CONFIGURE_MW (0x2): Command to configure memory window (MW). The host invokes this command after allocating a buffer that can be accessed by remote host. The allocated address should be programmed in the ADDRESS register (64 bit), the size should be programmed in the SIZE register and the memory window index should be programmed in the ARGUMENT register. The endpoint on receiving this command will configure the outbound ATU such that transactions to MW BAR are routed to the address provided by the host. CMD_LINK_UP (0x3): Command to indicate an NTB application is bound to the EP device on the host side. Once the endpoint receives this command from both the hosts, the endpoint will raise a LINK_UP event to both the hosts to indicate the host NTB applications can start communicating with each other. ARGUMENT: The value of this register is based on the commands issued in command register. See COMMAND section for more information. TOPOLOGY: Set to NTB_TOPO_B2B_USD for Primary interface Set to NTB_TOPO_B2B_DSD for Secondary interface ADDRESS/SIZE: Address and Size to be used while configuring the memory window. See "CMD_CONFIGURE_MW" for more info. MEMORY WINDOW1 OFFSET: Memory Window 1 and Doorbell registers are packed together in the same BAR. The initial portion of the region will have doorbell registers and the latter portion of the region is for memory window 1. This register will specify the offset of the memory window 1. NO OF MEMORY WINDOW: Specifies the number of memory windows supported by the NTB device. SPAD OFFSET: Self scratchpad region and config region are packed together in the same BAR. The initial portion of the region will have config region and the latter portion of the region is for self scratchpad. This register will specify the offset of the self scratchpad registers. SPAD COUNT: Specifies the number of scratchpad registers supported by the NTB device. DB ENTRY SIZE: Used to determine the offset within the DB BAR that should be written in order to raise doorbell. EPF NTB can use either MSI or MSI-X to ring doorbell (MSI-X support will be added later). MSI uses same address for all the interrupts and MSI-X can provide different addresses for different interrupts. The MSI/MSI-X address is provided by the host and the address it gives is based on the MSI/MSI-X implementation supported by the host. For instance, ARM platform using GIC ITS will have the same MSI-X address for all the interrupts. In order to support all the combinations and use the same mechanism for both MSI and MSI-X, EPF NTB allocates a separate region in the Outbound Address Space for each of the interrupts. This region will be mapped to the MSI/MSI-X address provided by the host. If a host provides the same address for all the interrupts, all the regions will be translated to the same address. If a host provides different addresses, the regions will be translated to different addresses. This will ensure there is no difference while raising the doorbell. DB DATA: EPF NTB supports 32 interrupts, so there are 32 DB DATA registers. This holds the MSI/MSI-X data that has to be written to MSI address for raising doorbell interrupt. This will be populated by EPF NTB while invoking CMD_CONFIGURE_DOORBELL.”h]”hX° +------------------------+ | COMMAND | +------------------------+ | ARGUMENT | +------------------------+ | STATUS | +------------------------+ | TOPOLOGY | +------------------------+ | ADDRESS (LOWER 32) | +------------------------+ | ADDRESS (UPPER 32) | +------------------------+ | SIZE | +------------------------+ | NO OF MEMORY WINDOW | +------------------------+ | MEMORY WINDOW1 OFFSET | +------------------------+ | SPAD OFFSET | +------------------------+ | SPAD COUNT | +------------------------+ | DB ENTRY SIZE | +------------------------+ | DB DATA | +------------------------+ | : | +------------------------+ | : | +------------------------+ | DB DATA | +------------------------+ COMMAND: NTB function supports three commands: CMD_CONFIGURE_DOORBELL (0x1): Command to configure doorbell. Before invoking this command, the host should allocate and initialize MSI/MSI-X vectors (i.e., initialize the MSI/MSI-X Capability in the Endpoint). The endpoint on receiving this command will configure the outbound ATU such that transactions to Doorbell BAR will be routed to the MSI/MSI-X address programmed by the host. The ARGUMENT register should be populated with number of DBs to configure (in the lower 16 bits) and if MSI or MSI-X should be configured (BIT 16). CMD_CONFIGURE_MW (0x2): Command to configure memory window (MW). The host invokes this command after allocating a buffer that can be accessed by remote host. The allocated address should be programmed in the ADDRESS register (64 bit), the size should be programmed in the SIZE register and the memory window index should be programmed in the ARGUMENT register. The endpoint on receiving this command will configure the outbound ATU such that transactions to MW BAR are routed to the address provided by the host. CMD_LINK_UP (0x3): Command to indicate an NTB application is bound to the EP device on the host side. Once the endpoint receives this command from both the hosts, the endpoint will raise a LINK_UP event to both the hosts to indicate the host NTB applications can start communicating with each other. ARGUMENT: The value of this register is based on the commands issued in command register. See COMMAND section for more information. TOPOLOGY: Set to NTB_TOPO_B2B_USD for Primary interface Set to NTB_TOPO_B2B_DSD for Secondary interface ADDRESS/SIZE: Address and Size to be used while configuring the memory window. See "CMD_CONFIGURE_MW" for more info. MEMORY WINDOW1 OFFSET: Memory Window 1 and Doorbell registers are packed together in the same BAR. The initial portion of the region will have doorbell registers and the latter portion of the region is for memory window 1. This register will specify the offset of the memory window 1. NO OF MEMORY WINDOW: Specifies the number of memory windows supported by the NTB device. SPAD OFFSET: Self scratchpad region and config region are packed together in the same BAR. The initial portion of the region will have config region and the latter portion of the region is for self scratchpad. This register will specify the offset of the self scratchpad registers. SPAD COUNT: Specifies the number of scratchpad registers supported by the NTB device. DB ENTRY SIZE: Used to determine the offset within the DB BAR that should be written in order to raise doorbell. EPF NTB can use either MSI or MSI-X to ring doorbell (MSI-X support will be added later). MSI uses same address for all the interrupts and MSI-X can provide different addresses for different interrupts. The MSI/MSI-X address is provided by the host and the address it gives is based on the MSI/MSI-X implementation supported by the host. For instance, ARM platform using GIC ITS will have the same MSI-X address for all the interrupts. In order to support all the combinations and use the same mechanism for both MSI and MSI-X, EPF NTB allocates a separate region in the Outbound Address Space for each of the interrupts. This region will be mapped to the MSI/MSI-X address provided by the host. If a host provides the same address for all the interrupts, all the regions will be translated to the same address. If a host provides different addresses, the regions will be translated to different addresses. This will ensure there is no difference while raising the doorbell. DB DATA: EPF NTB supports 32 interrupts, so there are 32 DB DATA registers. This holds the MSI/MSI-X data that has to be written to MSI address for raising doorbell interrupt. This will be populated by EPF NTB while invoking CMD_CONFIGURE_DOORBELL.”…”�”}”hjDsbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆjo‰jpŒtext”jr}”uh1j_h³hÇh´KHhjh²hubeh}”(h]”Œ config-region”ah ]”h"]”Œconfig region:”ah$]”h&]”uh1hÈhjth²hh³hÇh´K;ubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒScratchpad Registers:”h]”hŒScratchpad Registers:”…”�”}”(hj_h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj\h²hh³hÇh´KÊubj†)�”}”(hX®Each host has its own register space allocated in the memory of NTB endpoint controller. They are both readable and writable from both sides of the bridge. They are used by applications built over NTB and can be used to pass control and status information between both sides of a device. Scratchpad registers has 2 parts 1) Self Scratchpad: Host's own register space 2) Peer Scratchpad: Remote host's register space. ”h]”(hþ)�”}”(hXEach host has its own register space allocated in the memory of NTB endpoint controller. They are both readable and writable from both sides of the bridge. They are used by applications built over NTB and can be used to pass control and status information between both sides of a device.”h]”hXEach host has its own register space allocated in the memory of NTB endpoint controller. They are both readable and writable from both sides of the bridge. They are used by applications built over NTB and can be used to pass control and status information between both sides of a device.”…”�”}”(hjqh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KÌhjmubhŒdefinition_list”“”)�”}”(hhh]”hŒdefinition_list_item”“”)�”}”(hŒ�Scratchpad registers has 2 parts 1) Self Scratchpad: Host's own register space 2) Peer Scratchpad: Remote host's register space. ”h]”(hŒterm”“”)�”}”(hŒ Scratchpad registers has 2 parts”h]”hŒ Scratchpad registers has 2 parts”…”�”}”(hjŒh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jŠh³hÇh´KÓhj†ubhŒ definition”“”)�”}”(hhh]”jŒ)�”}”(hhh]”(j‘)�”}”(hŒ*Self Scratchpad: Host's own register space”h]”hþ)�”}”(hj¤h]”hŒ,Self Scratchpad: Host’s own register space”…”�”}”(hj¦h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KÒhj¢ubah}”(h]”h ]”h"]”h$]”h&]”uh1j�hjŸubj‘)�”}”(hŒ/Peer Scratchpad: Remote host's register space. ”h]”hþ)�”}”(hŒ.Peer Scratchpad: Remote host's register space.”h]”hŒ0Peer Scratchpad: Remote host’s register space.”…”�”}”(hj½h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KÓhj¹ubah}”(h]”h ]”h"]”h$]”h&]”uh1j�hjŸubeh}”(h]”h ]”h"]”h$]”h&]”j j jhjjuh1j‹hjœubah}”(h]”h ]”h"]”h$]”h&]”uh1jšhj†ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j„h³hÇh´KÓhj�ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjmubeh}”(h]”h ]”h"]”h$]”h&]”uh1j…h³hÇh´KÌhj\h²hubeh}”(h]”Œscratchpad-registers”ah ]”h"]”Œscratchpad registers:”ah$]”h&]”uh1hÈhjth²hh³hÇh´KÊubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒDoorbell Registers:”h]”hŒDoorbell Registers:”…”�”}”(hjúh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj÷h²hh³hÇh´KÖubj†)�”}”(hŒBDoorbell Registers are used by the hosts to interrupt each other. ”h]”hþ)�”}”(hŒADoorbell Registers are used by the hosts to interrupt each other.”h]”hŒADoorbell Registers are used by the hosts to interrupt each other.”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KØhjubah}”(h]”h ]”h"]”h$]”h&]”uh1j…h³hÇh´KØhj÷h²hubeh}”(h]”Œdoorbell-registers”ah ]”h"]”Œdoorbell registers:”ah$]”h&]”uh1hÈhjth²hh³hÇh´KÖubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒMemory Window:”h]”hŒMemory Window:”…”�”}”(hj+h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj(h²hh³hÇh´KÛubj†)�”}”(hŒSActual transfer of data between the two hosts will happen using the memory window. ”h]”hþ)�”}”(hŒRActual transfer of data between the two hosts will happen using the memory window.”h]”hŒRActual transfer of data between the two hosts will happen using the memory window.”…”�”}”(hj=h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KÝhj9ubah}”(h]”h ]”h"]”h$]”h&]”uh1j…h³hÇh´KÝhj(h²hubeh}”(h]”Œ memory-window”ah ]”h"]”Œmemory window:”ah$]”h&]”uh1hÈhjth²hh³hÇh´KÛubeh}”(h]”Œ$constructs-used-for-implementing-ntb”ah ]”h"]”Œ$constructs used for implementing ntb”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K1ubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒModeling Constructs:”h]”hŒModeling Constructs:”…”�”}”(hjdh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjah²hh³hÇh´Káubhþ)�”}”(hX8There are 5 or more distinct regions (config, self scratchpad, peer scratchpad, doorbell, one or more memory windows) to be modeled to achieve NTB functionality. At least one memory window is required while more than one is permitted. All these regions should be mapped to BARs for hosts to access these regions.”h]”hX8There are 5 or more distinct regions (config, self scratchpad, peer scratchpad, doorbell, one or more memory windows) to be modeled to achieve NTB functionality. At least one memory window is required while more than one is permitted. All these regions should be mapped to BARs for hosts to access these regions.”…”�”}”(hjrh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kãhjah²hubhþ)�”}”(hŒZIf one 32-bit BAR is allocated for each of these regions, the scheme would look like this:”h]”hŒZIf one 32-bit BAR is allocated for each of these regions, the scheme would look like this:”…”�”}”(hj€h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kéhjah²hubhŒtable”“”)�”}”(hhh]”hŒtgroup”“”)�”}”(hhh]”(hŒcolspec”“”)�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”Kuh1j˜hj•ubj™)�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”Kuh1j˜hj•ubhŒthead”“”)�”}”(hhh]”hŒrow”“”)�”}”(hhh]”(hŒentry”“”)�”}”(hhh]”hþ)�”}”(hŒBAR NO”h]”hŒBAR NO”…”�”}”(hj½h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kíhjºubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjµubj¹)�”}”(hhh]”hþ)�”}”(hŒCONSTRUCTS USED”h]”hŒCONSTRUCTS USED”…”�”}”(hjÔh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KíhjÑubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjµubeh}”(h]”h ]”h"]”h$]”h&]”uh1j³hj°ubah}”(h]”h ]”h"]”h$]”h&]”uh1j®hj•ubhŒtbody”“”)�”}”(hhh]”(j´)�”}”(hhh]”(j¹)�”}”(hhh]”hþ)�”}”(hŒBAR0”h]”hŒBAR0”…”�”}”(hjÿh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kïhjüubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjùubj¹)�”}”(hhh]”hþ)�”}”(hŒ Config Region”h]”hŒ Config Region”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kïhjubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjùubeh}”(h]”h ]”h"]”h$]”h&]”uh1j³hjöubj´)�”}”(hhh]”(j¹)�”}”(hhh]”hþ)�”}”(hŒBAR1”h]”hŒBAR1”…”�”}”(hj6h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kðhj3ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hj0ubj¹)�”}”(hhh]”hþ)�”}”(hŒSelf Scratchpad”h]”hŒSelf Scratchpad”…”�”}”(hjMh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KðhjJubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hj0ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j³hjöubj´)�”}”(hhh]”(j¹)�”}”(hhh]”hþ)�”}”(hŒBAR2”h]”hŒBAR2”…”�”}”(hjmh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kñhjjubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjgubj¹)�”}”(hhh]”hþ)�”}”(hŒPeer Scratchpad”h]”hŒPeer Scratchpad”…”�”}”(hj„h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kñhj�ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjgubeh}”(h]”h ]”h"]”h$]”h&]”uh1j³hjöubj´)�”}”(hhh]”(j¹)�”}”(hhh]”hþ)�”}”(hŒBAR3”h]”hŒBAR3”…”�”}”(hj¤h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kòhj¡ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjžubj¹)�”}”(hhh]”hþ)�”}”(hŒDoorbell”h]”hŒDoorbell”…”�”}”(hj»h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kòhj¸ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjžubeh}”(h]”h ]”h"]”h$]”h&]”uh1j³hjöubj´)�”}”(hhh]”(j¹)�”}”(hhh]”hþ)�”}”(hŒBAR4”h]”hŒBAR4”…”�”}”(hjÛh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´KóhjØubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjÕubj¹)�”}”(hhh]”hþ)�”}”(hŒMemory Window 1”h]”hŒMemory Window 1”…”�”}”(hjòh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kóhjïubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjÕubeh}”(h]”h ]”h"]”h$]”h&]”uh1j³hjöubj´)�”}”(hhh]”(j¹)�”}”(hhh]”hþ)�”}”(hŒBAR5”h]”hŒBAR5”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kôhjubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hj ubj¹)�”}”(hhh]”hþ)�”}”(hŒMemory Window 2”h]”hŒMemory Window 2”…”�”}”(hj)h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kôhj&ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hj ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j³hjöubeh}”(h]”h ]”h"]”h$]”h&]”uh1jôhj•ubeh}”(h]”h ]”h"]”h$]”h&]”Œcols”Kuh1j“hj�ubah}”(h]”h ]”h"]”h$]”h&]”uh1jŽhjah²hh³hÇh´Nubhþ)�”}”(hŒŸHowever if we allocate a separate BAR for each of the regions, there would not be enough BARs for all the regions in a platform that supports only 64-bit BARs.”h]”hŒŸHowever if we allocate a separate BAR for each of the regions, there would not be enough BARs for all the regions in a platform that supports only 64-bit BARs.”…”�”}”(hjVh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´K÷hjah²hubhþ)�”}”(hŒÞIn order to be supported by most of the platforms, the regions should be packed and mapped to BARs in a way that provides NTB functionality and also makes sure the host doesn't access any region that it is not supposed to.”h]”hŒàIn order to be supported by most of the platforms, the regions should be packed and mapped to BARs in a way that provides NTB functionality and also makes sure the host doesn’t access any region that it is not supposed to.”…”�”}”(hjdh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Kûhjah²hubhþ)�”}”(hŒ1The following scheme is used in EPF NTB Function:”h]”hŒ1The following scheme is used in EPF NTB Function:”…”�”}”(hjrh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Mhjah²hubj�)�”}”(hhh]”j”)�”}”(hhh]”(j™)�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”Kuh1j˜hjƒubj™)�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”Kuh1j˜hjƒubj¯)�”}”(hhh]”j´)�”}”(hhh]”(j¹)�”}”(hhh]”hþ)�”}”(hŒBAR NO”h]”hŒBAR NO”…”�”}”(hj£h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Mhj ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hj�ubj¹)�”}”(hhh]”hþ)�”}”(hŒCONSTRUCTS USED”h]”hŒCONSTRUCTS USED”…”�”}”(hjºh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Mhj·ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hj�ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j³hjšubah}”(h]”h ]”h"]”h$]”h&]”uh1j®hjƒubjõ)�”}”(hhh]”(j´)�”}”(hhh]”(j¹)�”}”(hhh]”hþ)�”}”(hŒBAR0”h]”hŒBAR0”…”�”}”(hjãh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Mhjàubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjÝubj¹)�”}”(hhh]”hþ)�”}”(hŒConfig Region + Self Scratchpad”h]”hŒConfig Region + Self Scratchpad”…”�”}”(hjúh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Mhj÷ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjÝubeh}”(h]”h ]”h"]”h$]”h&]”uh1j³hjÚubj´)�”}”(hhh]”(j¹)�”}”(hhh]”hþ)�”}”(hŒBAR1”h]”hŒBAR1”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Mhjubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjubj¹)�”}”(hhh]”hþ)�”}”(hŒPeer Scratchpad”h]”hŒPeer Scratchpad”…”�”}”(hj1h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Mhj.ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjubeh}”(h]”h ]”h"]”h$]”h&]”uh1j³hjÚubj´)�”}”(hhh]”(j¹)�”}”(hhh]”hþ)�”}”(hŒBAR2”h]”hŒBAR2”…”�”}”(hjQh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´MhjNubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjKubj¹)�”}”(hhh]”hþ)�”}”(hŒDoorbell + Memory Window 1”h]”hŒDoorbell + Memory Window 1”…”�”}”(hjhh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Mhjeubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjKubeh}”(h]”h ]”h"]”h$]”h&]”uh1j³hjÚubj´)�”}”(hhh]”(j¹)�”}”(hhh]”hþ)�”}”(hŒBAR3”h]”hŒBAR3”…”�”}”(hjˆh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Mhj…ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hj‚ubj¹)�”}”(hhh]”hþ)�”}”(hŒMemory Window 2”h]”hŒMemory Window 2”…”�”}”(hjŸh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´Mhjœubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hj‚ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j³hjÚubj´)�”}”(hhh]”(j¹)�”}”(hhh]”hþ)�”}”(hŒBAR4”h]”hŒBAR4”…”�”}”(hj¿h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´M hj¼ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hj¹ubj¹)�”}”(hhh]”hþ)�”}”(hŒMemory Window 3”h]”hŒMemory Window 3”…”�”}”(hjÖh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´M hjÓubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hj¹ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j³hjÚubj´)�”}”(hhh]”(j¹)�”}”(hhh]”hþ)�”}”(hŒBAR5”h]”hŒBAR5”…”�”}”(hjöh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´M hjóubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjðubj¹)�”}”(hhh]”hþ)�”}”(hŒMemory Window 4”h]”hŒMemory Window 4”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´M hj ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¸hjðubeh}”(h]”h ]”h"]”h$]”h&]”uh1j³hjÚubeh}”(h]”h ]”h"]”h$]”h&]”uh1jôhjƒubeh}”(h]”h ]”h"]”h$]”h&]”Œcols”Kuh1j“hj€ubah}”(h]”h ]”h"]”h$]”h&]”uh1jŽhjah²hh³hÇh´Nubhþ)�”}”(hŒNWith this scheme, for the basic NTB functionality 3 BARs should be sufficient.”h]”hŒNWith this scheme, for the basic NTB functionality 3 BARs should be sufficient.”…”�”}”(hj:h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´M hjah²hubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒ"Modeling Config/Scratchpad Region:”h]”hŒ"Modeling Config/Scratchpad Region:”…”�”}”(hjKh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjHh²hh³hÇh´Mubj`)�”}”(hX+-----------------+------->+------------------+ +-----------------+ | BAR0 | | CONFIG REGION | | BAR0 | +-----------------+----+ +------------------+<-------+-----------------+ | BAR1 | | |SCRATCHPAD REGION | | BAR1 | +-----------------+ +-->+------------------+<-------+-----------------+ | BAR2 | Local Memory | BAR2 | +-----------------+ +-----------------+ | BAR3 | | BAR3 | +-----------------+ +-----------------+ | BAR4 | | BAR4 | +-----------------+ +-----------------+ | BAR5 | | BAR5 | +-----------------+ +-----------------+ EP CONTROLLER 1 EP CONTROLLER 2”h]”hX+-----------------+------->+------------------+ +-----------------+ | BAR0 | | CONFIG REGION | | BAR0 | +-----------------+----+ +------------------+<-------+-----------------+ | BAR1 | | |SCRATCHPAD REGION | | BAR1 | +-----------------+ +-->+------------------+<-------+-----------------+ | BAR2 | Local Memory | BAR2 | +-----------------+ +-----------------+ | BAR3 | | BAR3 | +-----------------+ +-----------------+ | BAR4 | | BAR4 | +-----------------+ +-----------------+ | BAR5 | | BAR5 | +-----------------+ +-----------------+ EP CONTROLLER 1 EP CONTROLLER 2”…”�”}”hjYsbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆjo‰jpŒtext”jr}”uh1j_h³hÇh´MhjHh²hubhþ)�”}”(hXüAbove diagram shows Config region + Scratchpad region for HOST1 (connected to EP controller 1) allocated in local memory. The HOST1 can access the config region and scratchpad region (self scratchpad) using BAR0 of EP controller 1. The peer host (HOST2 connected to EP controller 2) can also access this scratchpad region (peer scratchpad) using BAR1 of EP controller 2. This diagram shows the case where Config region and Scratchpad regions are allocated for HOST1, however the same is applicable for HOST2.”h]”hXüAbove diagram shows Config region + Scratchpad region for HOST1 (connected to EP controller 1) allocated in local memory. The HOST1 can access the config region and scratchpad region (self scratchpad) using BAR0 of EP controller 1. The peer host (HOST2 connected to EP controller 2) can also access this scratchpad region (peer scratchpad) using BAR1 of EP controller 2. This diagram shows the case where Config region and Scratchpad regions are allocated for HOST1, however the same is applicable for HOST2.”…”�”}”(hjih²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´M#hjHh²hubeh}”(h]”Œ!modeling-config-scratchpad-region”ah ]”h"]”Œ"modeling config/scratchpad region:”ah$]”h&]”uh1hÈhjah²hh³hÇh´MubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒ"Modeling Doorbell/Memory Window 1:”h]”hŒ"Modeling Doorbell/Memory Window 1:”…”�”}”(hj‚h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjh²hh³hÇh´M,ubj`)�”}”(hX@ +-----------------+ +----->+----------------+-----------+-----------------+ | BAR0 | | | Doorbell 1 +-----------> MSI-X ADDRESS 1 | +-----------------+ | +----------------+ +-----------------+ | BAR1 | | | Doorbell 2 +---------+ | | +-----------------+----+ +----------------+ | | | | BAR2 | | Doorbell 3 +-------+ | +-----------------+ +-----------------+----+ +----------------+ | +-> MSI-X ADDRESS 2 | | BAR3 | | | Doorbell 4 +-----+ | +-----------------+ +-----------------+ | |----------------+ | | | | | BAR4 | | | | | | +-----------------+ +-----------------+ | | MW1 +---+ | +-->+ MSI-X ADDRESS 3|| | BAR5 | | | | | | +-----------------+ +-----------------+ +----->-----------------+ | | | | EP CONTROLLER 1 | | | | +-----------------+ | | | +---->+ MSI-X ADDRESS 4 | +----------------+ | +-----------------+ EP CONTROLLER 2 | | | (OB SPACE) | | | +-------> MW1 | | | | | +-----------------+ | | | | | | | | | | +-----------------+ PCI Address Space (Managed by HOST2)”h]”hX@ +-----------------+ +----->+----------------+-----------+-----------------+ | BAR0 | | | Doorbell 1 +-----------> MSI-X ADDRESS 1 | +-----------------+ | +----------------+ +-----------------+ | BAR1 | | | Doorbell 2 +---------+ | | +-----------------+----+ +----------------+ | | | | BAR2 | | Doorbell 3 +-------+ | +-----------------+ +-----------------+----+ +----------------+ | +-> MSI-X ADDRESS 2 | | BAR3 | | | Doorbell 4 +-----+ | +-----------------+ +-----------------+ | |----------------+ | | | | | BAR4 | | | | | | +-----------------+ +-----------------+ | | MW1 +---+ | +-->+ MSI-X ADDRESS 3|| | BAR5 | | | | | | +-----------------+ +-----------------+ +----->-----------------+ | | | | EP CONTROLLER 1 | | | | +-----------------+ | | | +---->+ MSI-X ADDRESS 4 | +----------------+ | +-----------------+ EP CONTROLLER 2 | | | (OB SPACE) | | | +-------> MW1 | | | | | +-----------------+ | | | | | | | | | | +-----------------+ PCI Address Space (Managed by HOST2)”…”�”}”hj�sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆjo‰jpŒtext”jr}”uh1j_h³hÇh´M.hjh²hubhþ)�”}”(hX7Above diagram shows how the doorbell and memory window 1 is mapped so that HOST1 can raise doorbell interrupt on HOST2 and also how HOST1 can access buffers exposed by HOST2 using memory window1 (MW1). Here doorbell and memory window 1 regions are allocated in EP controller 2 outbound (OB) address space. Allocating and configuring BARs for doorbell and memory window1 is done during the initialization phase of NTB endpoint function driver. Mapping from EP controller 2 OB space to PCI address space is done when HOST2 sends CMD_CONFIGURE_MW/CMD_CONFIGURE_DOORBELL.”h]”hX7Above diagram shows how the doorbell and memory window 1 is mapped so that HOST1 can raise doorbell interrupt on HOST2 and also how HOST1 can access buffers exposed by HOST2 using memory window1 (MW1). Here doorbell and memory window 1 regions are allocated in EP controller 2 outbound (OB) address space. Allocating and configuring BARs for doorbell and memory window1 is done during the initialization phase of NTB endpoint function driver. Mapping from EP controller 2 OB space to PCI address space is done when HOST2 sends CMD_CONFIGURE_MW/CMD_CONFIGURE_DOORBELL.”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´MOhjh²hubeh}”(h]”Œ!modeling-doorbell-memory-window-1”ah ]”h"]”Œ"modeling doorbell/memory window 1:”ah$]”h&]”uh1hÈhjah²hh³hÇh´M,ubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒ!Modeling Optional Memory Windows:”h]”hŒ!Modeling Optional Memory Windows:”…”�”}”(hj¹h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj¶h²hh³hÇh´MYubhþ)�”}”(hŒiThis is modeled the same was as MW1 but each of the additional memory windows is mapped to separate BARs.”h]”hŒiThis is modeled the same was as MW1 but each of the additional memory windows is mapped to separate BARs.”…”�”}”(hjÇh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÇh´M[hj¶h²hubeh}”(h]”Œ modeling-optional-memory-windows”ah ]”h"]”Œ!modeling optional memory windows:”ah$]”h&]”uh1hÈhjah²hh³hÇh´MYubeh}”(h]”Œmodeling-constructs”ah ]”h"]”Œmodeling constructs:”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´Káubeh}”(h]”Œpci-ntb-function”ah ]”h"]”Œpci ntb function”ah$]”h&]”uh1hÈhhh²hh³hÇh´Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”hÇuh1hŒcurrent_source”NŒ current_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)�”}”(hÍNŒ generator”NŒ datestamp”NŒ source_link”NŒ source_url”NŒ toc_backlinks”j¸Œfootnote_backlinks”KŒ sectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒ strip_classes”NŒ report_level”KŒ halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ traceback”ˆŒinput_encoding”Œ utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jŒerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œ language_code”Œen”Œrecord_dependencies”NŒconfig”NŒ id_prefix”hŒauto_id_prefix”Œid”Œ dump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”hÇŒ _destination”NŒ _config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒ raw_enabled”KŒline_length_limit”M'Œpep_references”NŒ pep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒ rfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œ smart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œ docinfo_xform”KŒsectsubtitle_xform”‰Œ image_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(jêjçj^j[jYjVjôjñj%j"jVjSjâjßj|jyj³j°jÚj×uŒ nametypes”}”(jê‰j^‰jY‰jô‰j%‰jV‰jâ‰j|‰j³‰jÚ‰uh}”(jçhÊj[jtjVjjñj\j"j÷jSj(jßjajyjHj°jj×j¶uŒ footnote_refs”}”Œ citation_refs”}”Œ autofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ footnotes”]”Œ citations”]”Œautofootnote_start”KŒsymbol_footnote_start”KŒ id_counter”Œ collections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œ transformer”NŒ include_log”]”Œ decoration”Nh²hub.