# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller maintainers: - Aswath Govindraju properties: compatible: const: ti,am62-usb reg: minItems: 1 items: - description: USB CFG register space - description: USB PHY2 register space ranges: true power-domains: description: PM domain provider node and an args specifier containing the USB ISO device id value. See, Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml maxItems: 1 clocks: description: Clock phandle to usb2_refclk maxItems: 1 clock-names: items: - const: ref ti,vbus-divider: description: Should be present if USB VBUS line is connected to the VBUS pin of the SoC via a 1/3 voltage divider. type: boolean ti,syscon-phy-pll-refclk: $ref: /schemas/types.yaml#/definitions/phandle-array items: - items: - description: Phandle to the SYSCON entry - description: USB phy control register offset within SYSCON description: Specifier for conveying frequency of ref clock input, for the operation of USB2PHY. '#address-cells': const: 2 '#size-cells': const: 2 patternProperties: "^usb@[0-9a-f]+$": $ref: snps,dwc3.yaml# description: Required child node required: - compatible - reg - power-domains - clocks - clock-names - ti,syscon-phy-pll-refclk additionalProperties: false examples: - | #include #include #include bus { #address-cells = <2>; #size-cells = <2>; usbss1: usb@f910000 { compatible = "ti,am62-usb"; reg = <0x00 0x0f910000 0x00 0x800>, <0x00 0x0f918000 0x00 0x400>; clocks = <&k3_clks 162 3>; clock-names = "ref"; ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; #address-cells = <2>; #size-cells = <2>; usb@31100000 { compatible = "snps,dwc3"; reg = <0x00 0x31100000 0x00 0x50000>; interrupts = , /* irq.0 */ ; /* irq.0 */ interrupt-names = "host", "peripheral"; maximum-speed = "high-speed"; dr_mode = "otg"; }; }; };