# SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/spi/spi-pl022.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: ARM PL022 SPI controller maintainers: - Linus Walleij allOf: - $ref: spi-controller.yaml# - $ref: /schemas/arm/primecell.yaml# # We need a select here so we don't match all nodes with 'arm,primecell' select: properties: compatible: contains: const: arm,pl022 required: - compatible properties: compatible: items: - const: arm,pl022 - const: arm,primecell reg: maxItems: 1 interrupts: maxItems: 1 clocks: maxItems: 2 clock-names: items: - const: sspclk - const: apb_pclk pl022,autosuspend-delay: description: delay in ms following transfer completion before the runtime power management system suspends the device. A setting of 0 indicates no delay and the device will be suspended immediately. $ref: /schemas/types.yaml#/definitions/uint32 pl022,rt: description: indicates the controller should run the message pump with realtime priority to minimise the transfer latency on the bus (boolean) type: boolean dmas: description: Two or more DMA channel specifiers following the convention outlined in bindings/dma/dma.txt minItems: 2 maxItems: 32 dma-names: description: There must be at least one channel named "tx" for transmit and named "rx" for receive. minItems: 2 maxItems: 32 additionalItems: true items: - const: rx - const: tx resets: maxItems: 1 required: - compatible - reg - interrupts unevaluatedProperties: false examples: - | spi@e0100000 { compatible = "arm,pl022", "arm,primecell"; reg = <0xe0100000 0x1000>; #address-cells = <1>; #size-cells = <0>; interrupts = <0 31 0x4>; dmas = <&dma_controller 23 1>, <&dma_controller 24 0>; dma-names = "rx", "tx"; flash@1 { compatible = "st,m25p80"; reg = <1>; spi-max-frequency = <12000000>; spi-cpol; spi-cpha; pl022,interface = <0>; pl022,com-mode = <0x2>; pl022,rx-level-trig = <0>; pl022,tx-level-trig = <0>; pl022,ctrl-len = <0x11>; pl022,wait-state = <0>; pl022,duplex = <0>; }; }; ...