# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/spi/samsung,spi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Samsung S3C/S5P/Exynos SoC SPI controller maintainers: - Krzysztof Kozlowski description: All the SPI controller nodes should be represented in the aliases node using the following format 'spi{n}' where n is a unique number for the alias. properties: compatible: oneOf: - enum: - google,gs101-spi - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450 - samsung,s3c6410-spi - samsung,s5pv210-spi # for S5PV210 and S5PC110 - samsung,exynos4210-spi - samsung,exynos5433-spi - samsung,exynos850-spi - samsung,exynosautov9-spi - tesla,fsd-spi - const: samsung,exynos7-spi deprecated: true clocks: minItems: 2 maxItems: 3 clock-names: minItems: 2 maxItems: 3 dmas: minItems: 2 maxItems: 2 dma-names: items: - const: tx - const: rx interrupts: maxItems: 1 no-cs-readback: description: The CS line is disconnected, therefore the device should not operate based on CS signalling. type: boolean num-cs: minimum: 1 maximum: 4 default: 1 samsung,spi-src-clk: description: If the spi controller includes a internal clock mux to select the clock source for the spi bus clock, this property can be used to indicate the clock to be used for driving the spi bus clock. If not specified, the clock number 0 is used as default. $ref: /schemas/types.yaml#/definitions/uint32 default: 0 reg: maxItems: 1 required: - compatible - clocks - clock-names - interrupts - reg allOf: - $ref: spi-controller.yaml# - if: properties: compatible: contains: enum: - samsung,exynos5433-spi - samsung,exynosautov9-spi then: properties: clocks: minItems: 3 maxItems: 3 clock-names: items: - const: spi - enum: - spi_busclk0 - spi_busclk1 - spi_busclk2 - spi_busclk3 - const: spi_ioclk else: properties: clocks: minItems: 2 maxItems: 2 clock-names: items: - const: spi - enum: - spi_busclk0 - spi_busclk1 - spi_busclk2 - spi_busclk3 unevaluatedProperties: false examples: - | #include #include #include #include spi@14d30000 { compatible = "samsung,exynos5433-spi"; reg = <0x14d30000 0x100>; interrupts = ; dmas = <&pdma0 11>, <&pdma0 10>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; clocks = <&cmu_peric CLK_PCLK_SPI1>, <&cmu_peric CLK_SCLK_SPI1>, <&cmu_peric CLK_SCLK_IOCLK_SPI1>; clock-names = "spi", "spi_busclk0", "spi_ioclk"; samsung,spi-src-clk = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; num-cs = <1>; cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>; audio-codec@0 { compatible = "wlf,wm5110"; reg = <0x0>; spi-max-frequency = <20000000>; interrupt-parent = <&gpa0>; interrupts = <4 IRQ_TYPE_NONE>; clocks = <&pmu_system_controller 0>, <&s2mps13_osc S2MPS11_CLK_BT>; clock-names = "mclk1", "mclk2"; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; wlf,micd-detect-debounce = <300>; wlf,micd-bias-start-time = <0x1>; wlf,micd-rate = <0x7>; wlf,micd-dbtime = <0x2>; wlf,micd-force-micbias; wlf,micd-configs = <0x0 1 0>; wlf,hpdet-channel = <1>; wlf,gpsw = <0x1>; wlf,inmode = <2 0 2 0>; wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>; wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>; /* core supplies */ AVDD-supply = <&ldo18_reg>; DBVDD1-supply = <&ldo18_reg>; CPVDD-supply = <&ldo18_reg>; DBVDD2-supply = <&ldo18_reg>; DBVDD3-supply = <&ldo18_reg>; SPKVDDL-supply = <&ldo18_reg>; SPKVDDR-supply = <&ldo18_reg>; controller-data { samsung,spi-feedback-delay = <0>; }; }; };