# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: GENI Serial Engine QUP Wrapper Controller maintainers: - Bjorn Andersson description: | Generic Interface (GENI) based Qualcomm Universal Peripheral (QUP) wrapper is a programmable module for supporting a wide range of serial interfaces like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial Interfaces, using its internal Serial Engines. The GENI Serial Engine QUP Wrapper controller is modeled as a node with zero or more child nodes each representing a serial engine. properties: compatible: enum: - qcom,geni-se-qup - qcom,geni-se-i2c-master-hub reg: description: QUP wrapper common register address and length. maxItems: 1 clock-names: minItems: 1 maxItems: 2 clocks: minItems: 1 maxItems: 2 "#address-cells": const: 2 "#size-cells": const: 2 ranges: true interconnects: maxItems: 1 interconnect-names: const: qup-core iommus: maxItems: 1 dma-coherent: true required: - compatible - reg - clock-names - clocks - "#address-cells" - "#size-cells" - ranges patternProperties: "spi@[0-9a-f]+$": type: object description: GENI serial engine based SPI controller. SPI in master mode supports up to 50MHz, up to four chip selects, programmable data path from 4 bits to 32 bits and numerous protocol variants. $ref: /schemas/spi/qcom,spi-geni-qcom.yaml# "i2c@[0-9a-f]+$": type: object description: GENI serial engine based I2C controller. $ref: /schemas/i2c/qcom,i2c-geni-qcom.yaml# "serial@[0-9a-f]+$": type: object description: GENI Serial Engine based UART Controller. $ref: /schemas/serial/qcom,serial-geni-qcom.yaml# allOf: - if: properties: compatible: contains: const: qcom,geni-se-i2c-master-hub then: properties: clock-names: items: - const: s-ahb clocks: items: - description: Slave AHB Clock iommus: false patternProperties: "spi@[0-9a-f]+$": false "serial@[0-9a-f]+$": false else: properties: clock-names: items: - const: m-ahb - const: s-ahb clocks: items: - description: Master AHB Clock - description: Slave AHB Clock additionalProperties: false examples: - | #include #include soc { #address-cells = <2>; #size-cells = <2>; geniqup@8c0000 { compatible = "qcom,geni-se-qup"; reg = <0 0x008c0000 0 0x6000>; clock-names = "m-ahb", "s-ahb"; clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; #address-cells = <2>; #size-cells = <2>; ranges; i2c0: i2c@a94000 { compatible = "qcom,geni-i2c"; reg = <0 0xa94000 0 0x4000>; interrupts = ; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&qup_1_i2c_5_active>; pinctrl-1 = <&qup_1_i2c_5_sleep>; #address-cells = <1>; #size-cells = <0>; }; uart0: serial@a88000 { compatible = "qcom,geni-uart"; reg = <0 0xa88000 0 0x7000>; interrupts = ; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&qup_1_uart_3_active>; pinctrl-1 = <&qup_1_uart_3_sleep>; }; }; }; ...