# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) # Copyright 2019 BayLibre, SAS %YAML 1.2 --- $id: http://devicetree.org/schemas/reset/amlogic,meson-axg-audio-arb.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Amlogic audio memory arbiter controller maintainers: - Jerome Brunet description: The Amlogic Audio ARB is a simple device which enables or disables the access of Audio FIFOs to DDR on AXG based SoC. properties: compatible: enum: - amlogic,meson-axg-audio-arb - amlogic,meson-sm1-audio-arb reg: maxItems: 1 clocks: maxItems: 1 description: | phandle to the fifo peripheral clock provided by the audio clock controller. "#reset-cells": const: 1 required: - compatible - reg - clocks - "#reset-cells" additionalProperties: false examples: - | // on the A113 SoC: #include bus { #address-cells = <2>; #size-cells = <2>; arb: reset-controller@280 { compatible = "amlogic,meson-axg-audio-arb"; reg = <0x0 0x280 0x0 0x4>; #reset-cells = <1>; clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; }; };