* Freescale Serial RapidIO (SRIO) Controller RapidIO port node: Properties: - compatible Usage: required Value type: Definition: Must include "fsl,srio" for IP blocks with IP Block Revision Register (SRIO IPBRR1) Major ID equal to 0x01c0. Optionally, a compatible string of "fsl,srio-vX.Y" where X is Major version in IP Block Revision Register and Y is Minor version. If this compatible is provided it should be ordered before "fsl,srio". - reg Usage: required Value type: Definition: A standard property. Specifies the physical address and length of the SRIO configuration registers. The size should be set to 0x11000. - interrupts Usage: required Value type: Definition: Specifies the interrupts generated by this device. The value of the interrupts property consists of one interrupt specifier. The format of the specifier is defined by the binding document describing the node's interrupt parent. A single IRQ that handles error conditions is specified by this property. (Typically shared with port-write). - fsl,srio-rmu-handle: Usage: required if rmu node is defined Value type: Definition: A single value that points to the RMU. (See srio-rmu.txt for more details on RMU node binding) Port Child Nodes: There should a port child node for each port that exists in the controller. The ports are numbered starting at one (1) and should have the following properties: - cell-index Usage: required Value type: Definition: A standard property. Matches the port id. - ranges Usage: required if local access windows preset Value type: Definition: A standard property. Utilized to describe the memory mapped IO space utilized by the controller. This corresponds to the setting of the local access windows that are targeted to this SRIO port. - fsl,liodn Usage: optional-but-recommended (for devices with PAMU) Value type: Definition: The logical I/O device number for the PAMU (IOMMU) to be correctly configured for SRIO accesses. The property should not exist on devices that do not support PAMU. For HW (ie, the P4080) that only supports a LIODN for both memory and maintenance transactions then a single LIODN is represented in the property for both transactions. For HW (ie, the P304x/P5020, etc) that supports an LIODN for memory transactions and a unique LIODN for maintenance transactions then a pair of LIODNs are represented in the property. Within the pair, the first element represents the LIODN associated with memory transactions and the second element represents the LIODN associated with maintenance transactions for the port. Note: All other standard properties (see the Devicetree Specification) are allowed but are optional. Example: rapidio: rapidio@ffe0c0000 { #address-cells = <2>; #size-cells = <2>; reg = <0xf 0xfe0c0000 0 0x11000>; compatible = "fsl,srio"; interrupts = <16 2 1 11>; /* err_irq */ fsl,srio-rmu-handle = <&rmu>; ranges; port1 { cell-index = <1>; #address-cells = <2>; #size-cells = <2>; fsl,liodn = <34>; ranges = <0 0 0xc 0x20000000 0 0x10000000>; }; port2 { cell-index = <2>; #address-cells = <2>; #size-cells = <2>; fsl,liodn = <48>; ranges = <0 0 0xc 0x30000000 0 0x10000000>; }; };