# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/fsl,imx27-iomuxc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale i.MX1/i.MX25/i.MX27 IOMUX Controller

maintainers:
  - Frank Li <Frank.Li@nxp.com>

description:
  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
  for common binding part and usage.

properties:
  compatible:
    enum:
      - fsl,imx1-iomuxc
      - fsl,imx27-iomuxc

  reg:
    maxItems: 1

  '#address-cells':
    const: 1

  '#size-cells':
    const: 1

  ranges: true

patternProperties:
  '^gpio@[0-9a-f]+$':
    type: object
    $ref: /schemas/gpio/fsl-imx-gpio.yaml
    unevaluatedProperties: false

  'grp$':
    type: object
    description:
      Pinctrl node's client devices use subnodes for desired pin configuration.
      Client device subnodes use below standard properties.

    properties:
      fsl,pins:
        description:
          three integers array, represents a group of pins mux and config
          setting. The format is fsl,pins = <PIN MUX_ID CONFIG>.
        $ref: /schemas/types.yaml#/definitions/uint32-matrix
        items:
          items:
            - description:
                PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32
                configurable pins each. PIN is PORT * 32 + PORT_PIN, PORT_PIN
                is the pin number on the specific port (between 0 and 31)
            - description: |
                MUX_ID is function + (direction << 2) + (gpio_oconf << 4)
                + (gpio_iconfa << 8) + (gpio_iconfb << 10)

                function value is used to select the pin function.
                Possible values:
                  0 - Primary function
                  1 - Alternate function
                  2 - GPIO
                Registers: GIUS (GPIO In Use), GPR (General Purpose Register)

                direction defines the data direction of the pin.
                Possible values:
                  0 - Input
                  1 - Output
                Register: DDIR

                gpio_oconf configures the gpio submodule output signal.
                This does not have any effect unless GPIO function is
                selected. A/B/C_IN are output signals of function blocks
                A,B and C. Specific function blocks are described in the
                reference manual.
                Possible values:
                  0 - A_IN
                  1 - B_IN
                  2 - C_IN
                  3 - Data Register
                Registers: OCR1, OCR2

                gpio_iconfa/b configures the gpio submodule input to
                functionblocks A and B. GPIO function should be selected if
                this is configured.
                Possible values:
                  0 - GPIO_IN
                  1 - Interrupt Status Register
                  2 - Pulldown
                  3 - Pullup
                Registers ICONFA1, ICONFA2, ICONFB1 and ICONFB2

            - description:
                CONFIG can be 0 or 1, meaning Pullup disable/enable.
    required:
      - fsl,pins

    additionalProperties: false

required:
  - compatible
  - reg

allOf:
  - $ref: pinctrl.yaml#

unevaluatedProperties: false

examples:
  - |
    pinmux@10015000 {
        compatible = "fsl,imx27-iomuxc";
        reg = <0x10015000 0x600>;

        uartgrp {
            fsl,pins = <
                0x8c 0x004 0x0 /* UART1_TXD__UART1_TXD */
                0x8d 0x000 0x0 /* UART1_RXD__UART1_RXD */
                0x8e 0x004 0x0 /* UART1_CTS__UART1_CTS */
                0x8f 0x000 0x0 /* UART1_RTS__UART1_RTS */
            >;
        };
    };