# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/pinctrl/brcm,bcm11351-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Broadcom BCM281xx pin controller maintainers: - Florian Fainelli - Ray Jui - Scott Branden allOf: - $ref: pinctrl.yaml# properties: compatible: const: brcm,bcm11351-pinctrl reg: maxItems: 1 patternProperties: '-pins$': type: object additionalProperties: false patternProperties: '-grp[0-9]$': type: object unevaluatedProperties: false properties: pins: description: Specifies the name(s) of one or more pins to be configured by this node. items: enum: [ adcsync, bat_rm, bsc1_scl, bsc1_sda, bsc2_scl, bsc2_sda, classgpwr, clk_cx8, clkout_0, clkout_1, clkout_2, clkout_3, clkreq_in_0, clkreq_in_1, cws_sys_req1, cws_sys_req2, cws_sys_req3, digmic1_clk, digmic1_dq, digmic2_clk, digmic2_dq, gpen13, gpen14, gpen15, gpio00, gpio01, gpio02, gpio03, gpio04, gpio05, gpio06, gpio07, gpio08, gpio09, gpio10, gpio11, gpio12, gpio13, gpio14, gps_pablank, gps_tmark, hdmi_scl, hdmi_sda, ic_dm, ic_dp, kp_col_ip_0, kp_col_ip_1, kp_col_ip_2, kp_col_ip_3, kp_row_op_0, kp_row_op_1, kp_row_op_2, kp_row_op_3, lcd_b_0, lcd_b_1, lcd_b_2, lcd_b_3, lcd_b_4, lcd_b_5, lcd_b_6, lcd_b_7, lcd_g_0, lcd_g_1, lcd_g_2, lcd_g_3, lcd_g_4, lcd_g_5, lcd_g_6, lcd_g_7, lcd_hsync, lcd_oe, lcd_pclk, lcd_r_0, lcd_r_1, lcd_r_2, lcd_r_3, lcd_r_4, lcd_r_5, lcd_r_6, lcd_r_7, lcd_vsync, mdmgpio0, mdmgpio1, mdmgpio2, mdmgpio3, mdmgpio4, mdmgpio5, mdmgpio6, mdmgpio7, mdmgpio8, mphi_data_0, mphi_data_1, mphi_data_2, mphi_data_3, mphi_data_4, mphi_data_5, mphi_data_6, mphi_data_7, mphi_data_8, mphi_data_9, mphi_data_10, mphi_data_11, mphi_data_12, mphi_data_13, mphi_data_14, mphi_data_15, mphi_ha0, mphi_hat0, mphi_hat1, mphi_hce0_n, mphi_hce1_n, mphi_hrd_n, mphi_hwr_n, mphi_run0, mphi_run1, mtx_scan_clk, mtx_scan_data, nand_ad_0, nand_ad_1, nand_ad_2, nand_ad_3, nand_ad_4, nand_ad_5, nand_ad_6, nand_ad_7, nand_ale, nand_cen_0, nand_cen_1, nand_cle, nand_oen, nand_rdy_0, nand_rdy_1, nand_wen, nand_wp, pc1, pc2, pmu_int, pmu_scl, pmu_sda, rfst2g_mtsloten3g, rgmii_0_rx_ctl, rgmii_0_rxc, rgmii_0_rxd_0, rgmii_0_rxd_1, rgmii_0_rxd_2, rgmii_0_rxd_3, rgmii_0_tx_ctl, rgmii_0_txc, rgmii_0_txd_0, rgmii_0_txd_1, rgmii_0_txd_2, rgmii_0_txd_3, rgmii_1_rx_ctl, rgmii_1_rxc, rgmii_1_rxd_0, rgmii_1_rxd_1, rgmii_1_rxd_2, rgmii_1_rxd_3, rgmii_1_tx_ctl, rgmii_1_txc, rgmii_1_txd_0, rgmii_1_txd_1, rgmii_1_txd_2, rgmii_1_txd_3, rgmii_gpio_0, rgmii_gpio_1, rgmii_gpio_2, rgmii_gpio_3, rtxdata2g_txdata3g1, rtxen2g_txdata3g2, rxdata3g0, rxdata3g1, rxdata3g2, sdio1_clk, sdio1_cmd, sdio1_data_0, sdio1_data_1, sdio1_data_2, sdio1_data_3, sdio4_clk, sdio4_cmd, sdio4_data_0, sdio4_data_1, sdio4_data_2, sdio4_data_3, sim_clk, sim_data, sim_det, sim_resetn, sim2_clk, sim2_data, sim2_det, sim2_resetn, sri_c, sri_d, sri_e, ssp_extclk, ssp0_clk, ssp0_fs, ssp0_rxd, ssp0_txd, ssp2_clk, ssp2_fs_0, ssp2_fs_1, ssp2_fs_2, ssp2_fs_3, ssp2_rxd_0, ssp2_rxd_1, ssp2_txd_0, ssp2_txd_1, ssp3_clk, ssp3_fs, ssp3_rxd, ssp3_txd, ssp4_clk, ssp4_fs, ssp4_rxd, ssp4_txd, ssp5_clk, ssp5_fs, ssp5_rxd, ssp5_txd, ssp6_clk, ssp6_fs, ssp6_rxd, ssp6_txd, stat_1, stat_2, sysclken, traceclk, tracedt00, tracedt01, tracedt02, tracedt03, tracedt04, tracedt05, tracedt06, tracedt07, tracedt08 tracedt09, tracedt10, tracedt11, tracedt12, tracedt13 tracedt14, tracedt15, txdata3g0, txpwrind, uartb1_ucts, uartb1_urts, uartb1_urxd, uartb1_utxd, uartb2_urxd, uartb2_utxd, uartb3_ucts, uartb3_urts, uartb3_urxd, uartb3_utxd, uartb4_ucts, uartb4_urts, uartb4_urxd, uartb4_utxd, vc_cam1_scl, vc_cam1_sda, vc_cam2_scl, vc_cam2_sda, vc_cam3_scl, vc_cam3_sda ] function: description: Specifies the pin mux selection. enum: [ alt1, alt2, alt3, alt4 ] slew-rate: description: | Meaning depends on configured pin mux: *_scl or *_sda: 0: Standard (100 kbps) & Fast (400 kbps) mode 1: Highspeed (3.4 Mbps) mode ic_dm or ic_dp: 0: normal slew rate 1: fast slew rate Otherwise: 0: fast slew rate 1: normal slew rate bias-disable: true input-disable: true input-enable: true required: - pins allOf: - $ref: pincfg-node.yaml# # Optional properties for standard pins - if: properties: pins: contains: enum: [ adcsync, bat_rm, classgpwr, clk_cx8, clkout_0, clkout_1, clkout_2, clkout_3, clkreq_in_0, clkreq_in_1, cws_sys_req1, cws_sys_req2, cws_sys_req3, digmic1_clk, digmic1_dq, digmic2_clk, digmic2_dq, gpen13, gpen14, gpen15, gpio00, gpio01, gpio02, gpio03, gpio04, gpio05, gpio06, gpio07, gpio08, gpio09, gpio10, gpio11, gpio12, gpio13, gpio14, gps_pablank, gps_tmark, ic_dm, ic_dp, kp_col_ip_0, kp_col_ip_1, kp_col_ip_2, kp_col_ip_3, kp_row_op_0, kp_row_op_1, kp_row_op_2, kp_row_op_3, lcd_b_0, lcd_b_1, lcd_b_2, lcd_b_3, lcd_b_4, lcd_b_5, lcd_b_6, lcd_b_7, lcd_g_0, lcd_g_1, lcd_g_2, lcd_g_3, lcd_g_4, lcd_g_5, lcd_g_6, lcd_g_7, lcd_hsync, lcd_oe, lcd_pclk, lcd_r_0, lcd_r_1, lcd_r_2, lcd_r_3, lcd_r_4, lcd_r_5, lcd_r_6, lcd_r_7, lcd_vsync, mdmgpio0, mdmgpio1, mdmgpio2, mdmgpio3, mdmgpio4, mdmgpio5, mdmgpio6, mdmgpio7, mdmgpio8, mphi_data_0, mphi_data_1, mphi_data_2, mphi_data_3, mphi_data_4, mphi_data_5, mphi_data_6, mphi_data_7, mphi_data_8, mphi_data_9, mphi_data_10, mphi_data_11, mphi_data_12, mphi_data_13, mphi_data_14, mphi_data_15, mphi_ha0, mphi_hat0, mphi_hat1, mphi_hce0_n, mphi_hce1_n, mphi_hrd_n, mphi_hwr_n, mphi_run0, mphi_run1, mtx_scan_clk, mtx_scan_data, nand_ad_0, nand_ad_1, nand_ad_2, nand_ad_3, nand_ad_4, nand_ad_5, nand_ad_6, nand_ad_7, nand_ale, nand_cen_0, nand_cen_1, nand_cle, nand_oen, nand_rdy_0, nand_rdy_1, nand_wen, nand_wp, pc1, pc2, pmu_int, rfst2g_mtsloten3g, rgmii_0_rx_ctl, rgmii_0_rxc, rgmii_0_rxd_0, rgmii_0_rxd_1, rgmii_0_rxd_2, rgmii_0_rxd_3, rgmii_0_tx_ctl, rgmii_0_txc, rgmii_0_txd_0, rgmii_0_txd_1, rgmii_0_txd_2, rgmii_0_txd_3, rgmii_1_rx_ctl, rgmii_1_rxc, rgmii_1_rxd_0, rgmii_1_rxd_1, rgmii_1_rxd_2, rgmii_1_rxd_3, rgmii_1_tx_ctl, rgmii_1_txc, rgmii_1_txd_0, rgmii_1_txd_1, rgmii_1_txd_2, rgmii_1_txd_3, rgmii_gpio_0, rgmii_gpio_1, rgmii_gpio_2, rgmii_gpio_3, rtxdata2g_txdata3g1, rtxen2g_txdata3g2, rxdata3g0, rxdata3g1, rxdata3g2, sdio1_clk, sdio1_cmd, sdio1_data_0, sdio1_data_1, sdio1_data_2, sdio1_data_3, sdio4_clk, sdio4_cmd, sdio4_data_0, sdio4_data_1, sdio4_data_2, sdio4_data_3, sim_clk, sim_data, sim_det, sim_resetn, sim2_clk, sim2_data, sim2_det, sim2_resetn, sri_c, sri_d, sri_e, ssp_extclk, ssp0_clk, ssp0_fs, ssp0_rxd, ssp0_txd, ssp2_clk, ssp2_fs_0, ssp2_fs_1, ssp2_fs_2, ssp2_fs_3, ssp2_rxd_0, ssp2_rxd_1, ssp2_txd_0, ssp2_txd_1, ssp3_clk, ssp3_fs, ssp3_rxd, ssp3_txd, ssp4_clk, ssp4_fs, ssp4_rxd, ssp4_txd, ssp5_clk, ssp5_fs, ssp5_rxd, ssp5_txd, ssp6_clk, ssp6_fs, ssp6_rxd, ssp6_txd, stat_1, stat_2, sysclken, traceclk, tracedt00, tracedt01, tracedt02, tracedt03, tracedt04, tracedt05, tracedt06, tracedt07, tracedt08, tracedt09, tracedt10, tracedt11, tracedt12, tracedt13, tracedt14, tracedt15, txdata3g0, txpwrind, uartb1_ucts, uartb1_urts, uartb1_urxd, uartb1_utxd, uartb2_urxd, uartb2_utxd, uartb3_ucts, uartb3_urts, uartb3_urxd, uartb3_utxd, uartb4_ucts, uartb4_urts, uartb4_urxd, uartb4_utxd ] then: properties: drive-strength: enum: [ 2, 4, 6, 8, 10, 12, 14, 16 ] bias-disable: true bias-pull-up: true bias-pull-down: true input-schmitt-enable: true input-schmitt-disable: true # Optional properties for I2C pins - if: properties: pins: contains: enum: [ bsc1_scl, bsc1_sda, bsc2_scl, bsc2_sda, pmu_scl, pmu_sda, vc_cam1_scl, vc_cam1_sda, vc_cam2_scl, vc_cam2_sda, vc_cam3_scl, vc_cam3_sda ] then: properties: bias-pull-up: description: There are 3 pull-up resistors (1.2k, 1.8k, 2.7k) available in parallel for I2C pins. enum: [ 568, 720, 831, 1080, 1200, 1800, 2700 ] bias-disable: true required: - compatible - reg unevaluatedProperties: false examples: - | pinctrl@35004800 { compatible = "brcm,bcm11351-pinctrl"; reg = <0x35004800 0x430>; dev-a-active-pins { /* group node defining 1 standard pin */ std-grp0 { pins = "gpio00"; function = "alt1"; input-schmitt-enable; bias-disable; slew-rate = <1>; drive-strength = <4>; }; /* group node defining 2 I2C pins */ i2c-grp0 { pins = "bsc1_scl", "bsc1_sda"; function = "alt2"; bias-pull-up = <720>; input-enable; }; /* group node defining 2 HDMI pins */ hdmi-grp0 { pins = "hdmi_scl", "hdmi_sda"; function = "alt3"; slew-rate = <1>; }; }; }; ...