# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/phy/ti,phy-am654-serdes.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: TI AM654 SERDES description: This binding describes the TI AM654 SERDES. AM654 SERDES can be configured to be used with either PCIe or USB or SGMII. maintainers: - Kishon Vijay Abraham I properties: compatible: enum: - ti,phy-am654-serdes reg: maxItems: 1 reg-names: items: - const: serdes power-domains: maxItems: 1 clocks: maxItems: 3 description: Three input clocks referring to left input reference clock, refclk and right input reference clock. '#phy-cells': const: 2 description: The 1st cell corresponds to the phy type (should be one of the types specified in include/dt-bindings/phy/phy.h) and the 2nd cell should be the serdes lane function. ti,serdes-clk: description: Phandle to the SYSCON entry required for configuring SERDES clock selection. $ref: /schemas/types.yaml#/definitions/phandle '#clock-cells': const: 1 mux-controls: maxItems: 1 description: Phandle to the SYSCON entry required for configuring SERDES lane function. clock-output-names: oneOf: - description: Clock output names for SERDES 0 items: - const: serdes0_cmu_refclk - const: serdes0_lo_refclk - const: serdes0_ro_refclk - description: Clock output names for SERDES 1 items: - const: serdes1_cmu_refclk - const: serdes1_lo_refclk - const: serdes1_ro_refclk required: - compatible - reg - power-domains - clocks - assigned-clocks - assigned-clock-parents - ti,serdes-clk - mux-controls - clock-output-names additionalProperties: false examples: - | #include serdes0: serdes@900000 { compatible = "ti,phy-am654-serdes"; reg = <0x900000 0x2000>; reg-names = "serdes"; #phy-cells = <2>; power-domains = <&k3_pds 153>; clocks = <&k3_clks 153 4>, <&k3_clks 153 1>, <&serdes1 AM654_SERDES_LO_REFCLK>; clock-output-names = "serdes0_cmu_refclk", "serdes0_lo_refclk", "serdes0_ro_refclk"; assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>; ti,serdes-clk = <&serdes0_clk>; mux-controls = <&serdes_mux 0>; #clock-cells = <1>; };