# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3ss-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Socionext UniPhier USB3 Super-Speed (SS) PHY description: | This describes the devicetree bindings for PHY interfaces built into USB3 controller implemented on Socionext UniPhier SoCs. Although the controller includes High-Speed PHY and Super-Speed PHY, this describes about Super-Speed PHY. maintainers: - Kunihiko Hayashi properties: compatible: enum: - socionext,uniphier-pro4-usb3-ssphy - socionext,uniphier-pro5-usb3-ssphy - socionext,uniphier-pxs2-usb3-ssphy - socionext,uniphier-ld20-usb3-ssphy - socionext,uniphier-pxs3-usb3-ssphy - socionext,uniphier-nx1-usb3-ssphy reg: maxItems: 1 "#phy-cells": const: 0 clocks: minItems: 2 maxItems: 3 clock-names: true resets: maxItems: 2 reset-names: true vbus-supply: description: A phandle to the regulator for USB VBUS, only for USB host allOf: - if: properties: compatible: contains: enum: - socionext,uniphier-pro4-usb3-ssphy - socionext,uniphier-pro5-usb3-ssphy then: properties: clocks: minItems: 2 maxItems: 2 clock-names: items: - const: gio - const: link resets: minItems: 2 maxItems: 2 reset-names: items: - const: gio - const: link - if: properties: compatible: contains: enum: - socionext,uniphier-pxs2-usb3-ssphy - socionext,uniphier-ld20-usb3-ssphy then: properties: clocks: minItems: 2 maxItems: 2 clock-names: items: - const: link - const: phy resets: minItems: 2 maxItems: 2 reset-names: items: - const: link - const: phy - if: properties: compatible: contains: enum: - socionext,uniphier-pxs3-usb3-ssphy - socionext,uniphier-nx1-usb3-ssphy then: properties: clocks: minItems: 2 maxItems: 3 clock-names: minItems: 2 items: - const: link - const: phy - const: phy-ext resets: minItems: 2 maxItems: 2 reset-names: items: - const: link - const: phy required: - compatible - reg - "#phy-cells" - clocks - clock-names - resets - reset-names additionalProperties: false examples: - | usb_ssphy0: phy@300 { compatible = "socionext,uniphier-ld20-usb3-ssphy"; reg = <0x300 0x10>; #phy-cells = <0>; clock-names = "link", "phy"; clocks = <&sys_clk 14>, <&sys_clk 16>; reset-names = "link", "phy"; resets = <&sys_rst 14>, <&sys_rst 16>; vbus-supply = <&usb_vbus0>; };