# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/fsl,imx8mq-usb-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale i.MX8MQ USB3 PHY

maintainers:
  - Li Jun <jun.li@nxp.com>

properties:
  compatible:
    enum:
      - fsl,imx8mq-usb-phy
      - fsl,imx8mp-usb-phy

  reg:
    maxItems: 1

  "#phy-cells":
    const: 0

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: phy

  power-domains:
    maxItems: 1

  vbus-supply:
    description:
      A phandle to the regulator for USB VBUS.

  fsl,phy-tx-vref-tune-percent:
    description:
      Tunes the HS DC level relative to the nominal level
    minimum: 94
    maximum: 124

  fsl,phy-tx-rise-tune-percent:
    description:
      Adjusts the rise/fall time duration of the HS waveform relative to
      its nominal value
    minimum: 97
    maximum: 103

  fsl,phy-tx-preemp-amp-tune-microamp:
    description:
      Adjust amount of current sourced to DPn and DMn after a J-to-K
      or K-to-J transition. Default is 0 (disabled).
    minimum: 0
    maximum: 1800

  fsl,phy-tx-vboost-level-microvolt:
    description:
      Adjust the boosted transmit launch pk-pk differential amplitude
    minimum: 880
    maximum: 1120

  fsl,phy-comp-dis-tune-percent:
    description:
      Adjust the voltage level used to detect a disconnect event at the host
      relative to the nominal value
    minimum: 91
    maximum: 115

  fsl,phy-pcs-tx-deemph-3p5db-attenuation-db:
    description:
      Adjust TX de-emphasis attenuation in dB at nominal
      3.5dB point as per USB specification
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    maximum: 36

  fsl,phy-pcs-tx-swing-full-percent:
    description:
      Scaling of the voltage defined by fsl,phy-tx-vboost-level-microvolt
    minimum: 0
    maximum: 100

required:
  - compatible
  - reg
  - "#phy-cells"
  - clocks
  - clock-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/imx8mq-clock.h>
    usb3_phy0: phy@381f0040 {
        compatible = "fsl,imx8mq-usb-phy";
        reg = <0x381f0040 0x40>;
        clocks = <&clk IMX8MQ_CLK_USB1_PHY_ROOT>;
        clock-names = "phy";
        #phy-cells = <0>;
    };