# SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/mtd/allwinner,sun4i-a10-nand.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Allwinner A10 NAND Controller allOf: - $ref: nand-controller.yaml maintainers: - Chen-Yu Tsai - Maxime Ripard properties: compatible: enum: - allwinner,sun4i-a10-nand - allwinner,sun8i-a23-nand-controller reg: maxItems: 1 interrupts: maxItems: 1 clocks: items: - description: Bus Clock - description: Module Clock clock-names: items: - const: ahb - const: mod resets: maxItems: 1 reset-names: const: ahb dmas: maxItems: 1 dma-names: const: rxtx patternProperties: "^nand@[a-f0-9]$": type: object $ref: raw-nand-chip.yaml properties: reg: minimum: 0 maximum: 7 nand-ecc-algo: const: bch nand-ecc-step-size: enum: [ 512, 1024 ] nand-ecc-strength: maximum: 80 allwinner,rb: description: Contains the native Ready/Busy IDs. $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 1 maxItems: 2 items: minimum: 0 maximum: 1 unevaluatedProperties: false required: - compatible - reg - interrupts - clocks - clock-names unevaluatedProperties: false examples: - | #include #include #include #include nand-controller@1c03000 { compatible = "allwinner,sun8i-a23-nand-controller"; reg = <0x01c03000 0x1000>; interrupts = ; clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>; clock-names = "ahb", "mod"; resets = <&ccu RST_BUS_NAND>; reset-names = "ahb"; dmas = <&dma 5>; dma-names = "rxtx"; pinctrl-names = "default"; pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>; #address-cells = <1>; #size-cells = <0>; }; ...