# SPDX-License-Identifier: GPL-2.0-only %YAML 1.2 --- $id: http://devicetree.org/schemas/mmc/sdhci-pxa.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Marvell PXA SDHCI v1/v2/v3 maintainers: - Ulf Hansson allOf: - $ref: mmc-controller.yaml# - if: properties: compatible: contains: const: marvell,armada-380-sdhci then: properties: reg: minItems: 3 reg-names: minItems: 3 required: - reg-names else: properties: reg: maxItems: 1 reg-names: maxItems: 1 properties: compatible: enum: - mrvl,pxav1-mmc - mrvl,pxav2-mmc - mrvl,pxav3-mmc - marvell,armada-380-sdhci reg: minItems: 1 maxItems: 3 reg-names: items: - const: sdhci - const: mbus - const: conf-sdio3 interrupts: maxItems: 1 clocks: minItems: 1 maxItems: 2 clock-names: minItems: 1 items: - const: io - const: core pinctrl-names: description: Optional for supporting PXA168 SDIO IRQ errata to switch CMD pin between SDIO CMD and GPIO mode. items: - const: default - const: state_cmd_gpio pinctrl-0: description: Should contain default pinctrl. pinctrl-1: description: Should switch CMD pin to GPIO mode as a high output. mrvl,clk-delay-cycles: description: Specify a number of cycles to delay for tuning. $ref: /schemas/types.yaml#/definitions/uint32 required: - compatible - reg - interrupts - clocks - clock-names unevaluatedProperties: false examples: - | #include mmc@d4280800 { compatible = "mrvl,pxav3-mmc"; reg = <0xd4280800 0x800>; bus-width = <8>; interrupts = <27>; clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>; clock-names = "io", "core"; non-removable; mrvl,clk-delay-cycles = <31>; }; - | mmc@d8000 { compatible = "marvell,armada-380-sdhci"; reg-names = "sdhci", "mbus", "conf-sdio3"; reg = <0xd8000 0x1000>, <0xdc000 0x100>, <0x18454 0x4>; interrupts = <0 25 0x4>; clocks = <&gateclk 17>; clock-names = "io"; mrvl,clk-delay-cycles = <0x1F>; }; ...