# SPDX-License-Identifier: GPL-2.0-only %YAML 1.2 --- $id: http://devicetree.org/schemas/iommu/rockchip,iommu.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Rockchip IOMMU maintainers: - Heiko Stuebner description: |+ A Rockchip DRM iommu translates io virtual addresses to physical addresses for its master device. Each slave device is bound to a single master device and shares its clocks, power domain and irq. For information on assigning IOMMU controller to its peripheral devices, see generic IOMMU bindings. properties: compatible: oneOf: - enum: - rockchip,iommu - rockchip,rk3568-iommu - items: - enum: - rockchip,rk3588-iommu - const: rockchip,rk3568-iommu reg: items: - description: configuration registers for MMU instance 0 - description: configuration registers for MMU instance 1 minItems: 1 interrupts: items: - description: interruption for MMU instance 0 - description: interruption for MMU instance 1 minItems: 1 clocks: items: - description: Core clock - description: Interface clock clock-names: items: - const: aclk - const: iface "#iommu-cells": const: 0 power-domains: maxItems: 1 rockchip,disable-mmu-reset: $ref: /schemas/types.yaml#/definitions/flag description: | Do not use the mmu reset operation. Some mmu instances may produce unexpected results when the reset operation is used. required: - compatible - reg - interrupts - clocks - clock-names - "#iommu-cells" additionalProperties: false examples: - | #include #include vopl_mmu: iommu@ff940300 { compatible = "rockchip,iommu"; reg = <0xff940300 0x100>; interrupts = ; clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; clock-names = "aclk", "iface"; #iommu-cells = <0>; };