# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright 2025 Analog Devices Inc. %YAML 1.2 --- $id: http://devicetree.org/schemas/iio/adc/adi,ad4080.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices AD4080 20-Bit, 40 MSPS, Differential SAR ADC maintainers: - Antoniu Miclaus description: | The AD4080 is a high speed, low noise, low distortion, 20-bit, Easy Drive, successive approximation register (SAR) analog-to-digital converter (ADC). Maintaining high performance (signal-to-noise and distortion (SINAD) ratio > 90 dBFS) at signal frequencies in excess of 1 MHz enables the AD4080 to service a wide variety of precision, wide bandwidth data acquisition applications. https://www.analog.com/media/en/technical-documentation/data-sheets/ad4080.pdf $ref: /schemas/spi/spi-peripheral-props.yaml# properties: compatible: enum: - adi,ad4080 reg: maxItems: 1 spi-max-frequency: description: Configuration of the SPI bus. maximum: 50000000 clocks: maxItems: 1 clock-names: items: - const: cnv vdd33-supply: true vdd11-supply: true vddldo-supply: true iovdd-supply: true vrefin-supply: true io-backends: maxItems: 1 adi,lvds-cnv-enable: description: Enable the LVDS signal type on the CNV pin. Default is CMOS. type: boolean adi,num-lanes: description: Number of lanes on which the data is sent on the output (DA, DB pins). $ref: /schemas/types.yaml#/definitions/uint32 enum: [1, 2] default: 1 required: - compatible - reg - clocks - clock-names - vdd33-supply - vrefin-supply additionalProperties: false examples: - | spi { #address-cells = <1>; #size-cells = <0>; adc@0 { compatible = "adi,ad4080"; reg = <0>; spi-max-frequency = <10000000>; vdd33-supply = <&vdd33>; vddldo-supply = <&vddldo>; vrefin-supply = <&vrefin>; clocks = <&cnv>; clock-names = "cnv"; io-backends = <&iio_backend>; }; }; ...