Qualcomm Camera Control Interface (CCI) I2C controller PROPERTIES: - compatible: Usage: required Value type: Definition: must be one of: "qcom,msm8916-cci" "qcom,msm8996-cci" "qcom,sdm845-cci" "qcom,sm8250-cci" "qcom,sm8450-cci" - reg Usage: required Value type: Definition: base address CCI I2C controller and length of memory mapped region. - interrupts: Usage: required Value type: Definition: specifies the CCI I2C interrupt. The format of the specifier is defined by the binding document describing the node's interrupt parent. - clocks: Usage: required Value type: Definition: a list of phandle, should contain an entry for each entries in clock-names. - clock-names Usage: required Value type: Definition: a list of clock names, must include "cci" clock. - power-domains Usage: required for "qcom,msm8996-cci" Value type: Definition: SUBNODES: The CCI provides I2C masters for one (msm8916) or two i2c busses (msm8996, sdm845, sm8250 and sm8450), described as subdevices named "i2c-bus@0" and "i2c-bus@1". PROPERTIES: - reg: Usage: required Value type: Definition: Index of the CCI bus/master - clock-frequency: Usage: optional Value type: Definition: Desired I2C bus clock frequency in Hz, defaults to 100 kHz if omitted. Example: cci@a0c000 { compatible = "qcom,msm8996-cci"; #address-cells = <1>; #size-cells = <0>; reg = <0xa0c000 0x1000>; interrupts = ; clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>, <&mmcc CAMSS_TOP_AHB_CLK>, <&mmcc CAMSS_CCI_AHB_CLK>, <&mmcc CAMSS_CCI_CLK>, <&mmcc CAMSS_AHB_CLK>; clock-names = "mmss_mmagic_ahb", "camss_top_ahb", "cci_ahb", "cci", "camss_ahb"; i2c-bus@0 { reg = <0>; clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; }; i2c-bus@1 { reg = <1>; clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; }; };