UniPhier GPIO controller Required properties: - compatible: Should be "socionext,uniphier-gpio". - reg: Specifies offset and length of the register set for the device. - gpio-controller: Marks the device node as a GPIO controller. - #gpio-cells: Should be 2. The first cell is the pin number and the second cell is used to specify optional parameters. - interrupt-controller: Marks the device node as an interrupt controller. - #interrupt-cells: Should be 2. The first cell defines the interrupt number. The second cell bits[3:0] is used to specify trigger type as follows: 1 = low-to-high edge triggered 2 = high-to-low edge triggered 4 = active high level-sensitive 8 = active low level-sensitive Valid combinations are 1, 2, 3, 4, 8. - ngpios: Specifies the number of GPIO lines. - gpio-ranges: Mapping to pin controller pins (as described in gpio.txt) - socionext,interrupt-ranges: Specifies an interrupt number mapping between this GPIO controller and its interrupt parent, in the form of arbitrary number of triplets. Optional properties: - gpio-ranges-group-names: Used for named gpio ranges (as described in gpio.txt) Example: gpio: gpio@55000000 { compatible = "socionext,uniphier-gpio"; reg = <0x55000000 0x200>; interrupt-parent = <&aidet>; interrupt-controller; #interrupt-cells = <2>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pinctrl 0 0 0>; gpio-ranges-group-names = "gpio_range"; ngpios = <248>; socionext,interrupt-ranges = <0 48 16>, <16 154 5>, <21 217 3>; }; Consumer Example: sdhci0_pwrseq { compatible = "mmc-pwrseq-emmc"; reset-gpios = <&gpio UNIPHIER_GPIO_PORT(29, 4) GPIO_ACTIVE_LOW>; }; Please note UNIPHIER_GPIO_PORT(29, 4) represents PORT294 in the SoC document. Unfortunately, only the one's place is octal in the port numbering. (That is, PORT 8, 9, 18, 19, 28, 29, ... are missing.) UNIPHIER_GPIO_PORT() is a helper macro to calculate 29 * 8 + 4.