Rockchip RK3288 LVDS interface ================================ Required properties: - compatible: matching the soc type, one of - "rockchip,rk3288-lvds"; - "rockchip,px30-lvds"; - reg: physical base address of the controller and length of memory mapped region. - clocks: must include clock specifiers corresponding to entries in the clock-names property. - clock-names: must contain "pclk_lvds" - avdd1v0-supply: regulator phandle for 1.0V analog power - avdd1v8-supply: regulator phandle for 1.8V analog power - avdd3v3-supply: regulator phandle for 3.3V analog power - rockchip,grf: phandle to the general register files syscon - rockchip,output: "rgb", "lvds" or "duallvds", This describes the output interface - phys: LVDS/DSI DPHY (px30 only) - phy-names: name of the PHY, must be "dphy" (px30 only) Optional properties: - pinctrl-names: must contain a "lcdc" entry. - pinctrl-0: pin control group to be used for this controller. Required nodes: The lvds has two video ports as described by Documentation/devicetree/bindings/media/video-interfaces.txt Their connections are modeled using the OF graph bindings specified in Documentation/devicetree/bindings/graph.txt. - video port 0 for the VOP input, the remote endpoint maybe vopb or vopl - video port 1 for either a panel or subsequent encoder Example: lvds_panel: lvds-panel { compatible = "auo,b101ean01"; enable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>; data-mapping = "jeida-24"; ports { panel_in_lvds: endpoint { remote-endpoint = <&lvds_out_panel>; }; }; }; For Rockchip RK3288: lvds: lvds@ff96c000 { compatible = "rockchip,rk3288-lvds"; rockchip,grf = <&grf>; reg = <0xff96c000 0x4000>; clocks = <&cru PCLK_LVDS_PHY>; clock-names = "pclk_lvds"; pinctrl-names = "lcdc"; pinctrl-0 = <&lcdc_ctl>; avdd1v0-supply = <&vdd10_lcd>; avdd1v8-supply = <&vcc18_lcd>; avdd3v3-supply = <&vcca_33>; rockchip,output = "rgb"; ports { #address-cells = <1>; #size-cells = <0>; lvds_in: port@0 { reg = <0>; lvds_in_vopb: endpoint@0 { reg = <0>; remote-endpoint = <&vopb_out_lvds>; }; lvds_in_vopl: endpoint@1 { reg = <1>; remote-endpoint = <&vopl_out_lvds>; }; }; lvds_out: port@1 { reg = <1>; lvds_out_panel: endpoint { remote-endpoint = <&panel_in_lvds>; }; }; }; };