# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/display/mediatek/mediatek,postmask.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Mediatek display postmask maintainers: - Chun-Kuang Hu - Philipp Zabel description: | Mediatek display postmask, namely POSTMASK, provides round corner pattern generation. POSTMASK device node must be siblings to the central MMSYS_CONFIG node. For a description of the MMSYS_CONFIG binding, see Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for details. properties: compatible: oneOf: - enum: - mediatek,mt8192-disp-postmask - items: - enum: - mediatek,mt8186-disp-postmask - mediatek,mt8188-disp-postmask - const: mediatek,mt8192-disp-postmask reg: maxItems: 1 interrupts: maxItems: 1 power-domains: description: A phandle and PM domain specifier as defined by bindings of the power controller specified by phandle. See Documentation/devicetree/bindings/power/power-domain.yaml for details. clocks: items: - description: POSTMASK Clock mediatek,gce-client-reg: description: The register of client driver can be configured by gce with 4 arguments defined in this property, such as phandle of gce, subsys id, register offset and size. Each GCE subsys id is mapping to a client defined in the header include/dt-bindings/gce/-gce.h. $ref: /schemas/types.yaml#/definitions/phandle-array maxItems: 1 required: - compatible - reg - interrupts - power-domains - clocks additionalProperties: false examples: - | #include #include #include #include soc { #address-cells = <2>; #size-cells = <2>; postmask0: postmask@1400d000 { compatible = "mediatek,mt8192-disp-postmask"; reg = <0 0x1400d000 0 0x1000>; interrupts = ; power-domains = <&scpsys MT8192_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_POSTMASK0>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xd000 0x1000>; }; };