# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/display/bridge/renesas,lvds.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Renesas R-Car LVDS Encoder maintainers: - Laurent Pinchart description: | These DT bindings describe the LVDS encoder embedded in the Renesas R-Car Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs. properties: compatible: enum: - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders - renesas,r8a7744-lvds # for RZ/G1N compatible LVDS encoders - renesas,r8a774a1-lvds # for RZ/G2M compatible LVDS encoders - renesas,r8a774b1-lvds # for RZ/G2N compatible LVDS encoders - renesas,r8a774c0-lvds # for RZ/G2E compatible LVDS encoders - renesas,r8a774e1-lvds # for RZ/G2H compatible LVDS encoders - renesas,r8a7790-lvds # for R-Car H2 compatible LVDS encoders - renesas,r8a7791-lvds # for R-Car M2-W compatible LVDS encoders - renesas,r8a7793-lvds # for R-Car M2-N compatible LVDS encoders - renesas,r8a7795-lvds # for R-Car H3 compatible LVDS encoders - renesas,r8a7796-lvds # for R-Car M3-W compatible LVDS encoders - renesas,r8a77961-lvds # for R-Car M3-W+ compatible LVDS encoders - renesas,r8a77965-lvds # for R-Car M3-N compatible LVDS encoders - renesas,r8a77970-lvds # for R-Car V3M compatible LVDS encoders - renesas,r8a77980-lvds # for R-Car V3H compatible LVDS encoders - renesas,r8a77990-lvds # for R-Car E3 compatible LVDS encoders - renesas,r8a77995-lvds # for R-Car D3 compatible LVDS encoders reg: maxItems: 1 clocks: minItems: 1 maxItems: 4 clock-names: minItems: 1 maxItems: 4 resets: maxItems: 1 ports: $ref: /schemas/graph.yaml#/properties/ports properties: port@0: $ref: /schemas/graph.yaml#/properties/port description: Parallel RGB input port port@1: $ref: /schemas/graph.yaml#/properties/port description: LVDS output port required: - port@0 - port@1 power-domains: maxItems: 1 renesas,companion: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the companion LVDS encoder. This property is mandatory for the first LVDS encoder on R-Car D3 and E3, and RZ/G2E SoCs, and shall point to the second encoder to be used as a companion in dual-link mode. It shall not be set for any other LVDS encoder. required: - compatible - reg - clocks - power-domains - resets - ports if: properties: compatible: enum: - renesas,r8a774c0-lvds - renesas,r8a77990-lvds - renesas,r8a77995-lvds then: properties: clocks: minItems: 1 items: - description: Functional clock - description: EXTAL input clock - description: DU_DOTCLKIN0 input clock - description: DU_DOTCLKIN1 input clock clock-names: minItems: 1 items: - const: fck # The LVDS encoder can use the EXTAL or DU_DOTCLKINx clocks. # These clocks are optional. - enum: - extal - dclkin.0 - dclkin.1 - enum: - extal - dclkin.0 - dclkin.1 - enum: - extal - dclkin.0 - dclkin.1 required: - clock-names else: properties: clocks: items: - description: Functional clock clock-names: items: - const: fck renesas,companion: false additionalProperties: false examples: - | #include #include lvds@feb90000 { compatible = "renesas,r8a7795-lvds"; reg = <0xfeb90000 0x14>; clocks = <&cpg CPG_MOD 727>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 727>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; lvds_in: endpoint { remote-endpoint = <&du_out_lvds0>; }; }; port@1 { reg = <1>; lvds_out: endpoint { remote-endpoint = <&panel_in>; }; }; }; }; - | #include #include lvds0: lvds@feb90000 { compatible = "renesas,r8a77990-lvds"; reg = <0xfeb90000 0x20>; clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>; clock-names = "fck", "dclkin.0", "extal"; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 727>; renesas,companion = <&lvds1>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; lvds0_in: endpoint { remote-endpoint = <&du_out_lvds0>; }; }; port@1 { reg = <1>; lvds0_out: endpoint { remote-endpoint = <&panel_in1>; }; }; }; }; lvds1: lvds@feb90100 { compatible = "renesas,r8a77990-lvds"; reg = <0xfeb90100 0x20>; clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>; clock-names = "fck", "dclkin.0", "extal"; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 726>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; lvds1_in: endpoint { remote-endpoint = <&du_out_lvds1>; }; }; port@1 { reg = <1>; lvds1_out: endpoint { remote-endpoint = <&panel_in2>; }; }; }; }; ...