# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/cpufreq/qcom,shikra-epss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Shikra SoC EPSS

maintainers:
  - Imran Shaik <imran.shaik@oss.qualcomm.com>
  - Taniya Das <taniya.das@oss.qualcomm.com>

description: |
  EPSS is a hardware engine used by some Qualcomm SoCs to manage
  frequency in hardware. It is capable of controlling frequency for
  multiple clusters.

  The Qualcomm Shikra SoC EPSS supports up to 12 frequency lookup table
  (LUT) entries.

properties:
  compatible:
    enum:
      - qcom,shikra-epss

  reg:
    items:
      - description: Frequency domain 0 register region
      - description: Frequency domain 1 register region

  reg-names:
    items:
      - const: freq-domain0
      - const: freq-domain1

  clocks:
    items:
      - description: XO Clock
      - description: GPLL0 Clock

  clock-names:
    items:
      - const: xo
      - const: alternate

  interrupts:
    items:
      - description: IRQ line for DCVSH 0
      - description: IRQ line for DCVSH 1

  interrupt-names:
    items:
      - const: dcvsh-irq-0
      - const: dcvsh-irq-1

  '#freq-domain-cells':
    const: 1

  '#clock-cells':
    const: 1

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - interrupts
  - interrupt-names
  - '#freq-domain-cells'
  - '#clock-cells'

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,rpmcc.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    soc {
      #address-cells = <1>;
      #size-cells = <1>;

      cpufreq@fd91000 {
        compatible = "qcom,shikra-epss";
        reg = <0x0fd91000 0x1000>, <0x0fd92000 0x1000>;
        reg-names = "freq-domain0", "freq-domain1";
        clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gpll0>;
        clock-names = "xo", "alternate";
        interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
        interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1";
        #freq-domain-cells = <1>;
        #clock-cells = <1>;
      };
    };
...