# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright (C) 2020 SiFive, Inc. %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/sifive/fu740-prci.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: SiFive FU740 Power Reset Clock Interrupt Controller (PRCI) maintainers: - Zong Li - Paul Walmsley description: On the FU740 family of SoCs, most system-wide clock and reset integration is via the PRCI IP block. The clock consumer should specify the desired clock via the clock ID macros defined in include/dt-bindings/clock/sifive-fu740-prci.h. These macros begin with PRCI_CLK_. The hfclk and rtcclk nodes are required, and represent physical crystals or resonators located on the PCB. These nodes should be present underneath /, rather than /soc. properties: compatible: const: sifive,fu740-c000-prci reg: maxItems: 1 clocks: items: - description: high frequency clock. - description: RTL clock. clock-names: items: - const: hfclk - const: rtcclk "#clock-cells": const: 1 "#reset-cells": const: 1 required: - compatible - reg - clocks - "#clock-cells" additionalProperties: false examples: - | prci: clock-controller@10000000 { compatible = "sifive,fu740-c000-prci"; reg = <0x10000000 0x1000>; clocks = <&hfclk>, <&rtcclk>; #clock-cells = <1>; #reset-cells = <1>; };