# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/renesas,cpg-clocks.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Renesas Clock Pulse Generator (CPG) maintainers: - Geert Uytterhoeven description: The Clock Pulse Generator (CPG) generates core clocks for the SoC. It includes PLLs, and fixed and variable ratio dividers. The CPG may also provide a Clock Domain for SoC devices, in combination with the CPG Module Stop (MSTP) Clocks. properties: compatible: oneOf: - const: renesas,r8a73a4-cpg-clocks # R-Mobile APE6 - const: renesas,r8a7740-cpg-clocks # R-Mobile A1 - const: renesas,r8a7778-cpg-clocks # R-Car M1 - const: renesas,r8a7779-cpg-clocks # R-Car H1 - items: - enum: - renesas,r7s72100-cpg-clocks # RZ/A1H - const: renesas,rz-cpg-clocks # RZ/A1 - const: renesas,sh73a0-cpg-clocks # SH-Mobile AG5 reg: maxItems: 1 clocks: true '#clock-cells': const: 1 clock-output-names: true renesas,mode: description: Board-specific settings of the MD_CK* bits on R-Mobile A1 $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0 maximum: 7 '#power-domain-cells': const: 0 required: - compatible - reg - clocks - '#clock-cells' - clock-output-names allOf: - if: properties: compatible: contains: const: renesas,r8a73a4-cpg-clocks then: properties: clocks: items: - description: extal1 - description: extal2 clock-output-names: items: - const: main - const: pll0 - const: pll1 - const: pll2 - const: pll2s - const: pll2h - const: z - const: z2 - const: i - const: m3 - const: b - const: m1 - const: m2 - const: zx - const: zs - const: hp - if: properties: compatible: contains: const: renesas,r8a7740-cpg-clocks then: properties: clocks: items: - description: extal1 - description: extal2 - description: extalr clock-output-names: items: - const: system - const: pllc0 - const: pllc1 - const: pllc2 - const: r - const: usb24s - const: i - const: zg - const: b - const: m1 - const: hp - const: hpp - const: usbp - const: s - const: zb - const: m3 - const: cp required: - renesas,mode - if: properties: compatible: contains: const: renesas,r8a7778-cpg-clocks then: properties: clocks: maxItems: 1 clock-output-names: items: - const: plla - const: pllb - const: b - const: out - const: p - const: s - const: s1 - if: properties: compatible: contains: const: renesas,r8a7779-cpg-clocks then: properties: clocks: maxItems: 1 clock-output-names: items: - const: plla - const: z - const: zs - const: s - const: s1 - const: p - const: b - const: out - if: properties: compatible: contains: const: renesas,r7s72100-cpg-clocks then: properties: clocks: items: - description: extal1 - description: usb_x1 clock-output-names: items: - const: pll - const: i - const: g - if: properties: compatible: contains: const: renesas,sh73a0-cpg-clocks then: properties: clocks: items: - description: extal1 - description: extal2 clock-output-names: items: - const: main - const: pll0 - const: pll1 - const: pll2 - const: pll3 - const: dsi0phy - const: dsi1phy - const: zg - const: m3 - const: b - const: m1 - const: m2 - const: z - const: zx - const: hp - if: properties: compatible: contains: enum: - renesas,r8a7778-cpg-clocks - renesas,r8a7779-cpg-clocks - renesas,rz-cpg-clocks then: required: - '#power-domain-cells' additionalProperties: false examples: - | #include cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7740-cpg-clocks"; reg = <0xe6150000 0x10000>; clocks = <&extal1_clk>, <&extal2_clk>, <&extalr_clk>; #clock-cells = <1>; clock-output-names = "system", "pllc0", "pllc1", "pllc2", "r", "usb24s", "i", "zg", "b", "m1", "hp", "hpp", "usbp", "s", "zb", "m3", "cp"; renesas,mode = <0x05>; };