diff options
author | Bjorn Helgaas <bhelgaas@google.com> | 2018-04-19 15:16:33 -0500 |
---|---|---|
committer | Martin Mares <mj@ucw.cz> | 2018-04-20 10:23:06 +0200 |
commit | c508d1c97eb42f02fb87e23fc2a860257f83008d (patch) | |
tree | 5d8a7eb8c619e8f7c27aeb2093f1f34b6cd684b2 | |
parent | 60a45a7ed2b738b0761dc3ca7efc608f9a774e56 (diff) | |
download | pciutils-c508d1c97eb42f02fb87e23fc2a860257f83008d.tar.gz |
lspci: Decode Null Capability
The PCI Code and ID Assignment spec, r1.9, sec 2, defines a "Null
Capability" containing no registers other than the 8-bit Capability ID
(00h) and an 8-bit Next Capability Pointer.
Some devices, e.g., the Intel [8086:2058] implement this Capability.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-rw-r--r-- | lib/header.h | 2 | ||||
-rw-r--r-- | ls-caps.c | 3 | ||||
-rw-r--r-- | ls-ecaps.c | 3 |
3 files changed, 8 insertions, 0 deletions
diff --git a/lib/header.h b/lib/header.h index 0b12b2c..1f0e460 100644 --- a/lib/header.h +++ b/lib/header.h @@ -185,6 +185,7 @@ /* Capability lists */ #define PCI_CAP_LIST_ID 0 /* Capability ID */ +#define PCI_CAP_ID_NULL 0x00 /* Null Capability */ #define PCI_CAP_ID_PM 0x01 /* Power Management */ #define PCI_CAP_ID_AGP 0x02 /* Accelerated Graphics Port */ #define PCI_CAP_ID_VPD 0x03 /* Vital Product Data */ @@ -211,6 +212,7 @@ /* Capabilities residing in the PCI Express extended configuration space */ +#define PCI_EXT_CAP_ID_NULL 0x00 /* Null Capability */ #define PCI_EXT_CAP_ID_AER 0x01 /* Advanced Error Reporting */ #define PCI_EXT_CAP_ID_VC 0x02 /* Virtual Channel */ #define PCI_EXT_CAP_ID_DSN 0x03 /* Device Serial Number */ @@ -1536,6 +1536,9 @@ show_caps(struct device *d, int where) } switch (id) { + case PCI_CAP_ID_NULL: + printf("Null\n"); + break; case PCI_CAP_ID_PM: cap_pm(d, where, cap); break; @@ -737,6 +737,9 @@ show_ext_caps(struct device *d, int type) } switch (id) { + case PCI_EXT_CAP_ID_NULL: + printf("Null\n"); + break; case PCI_EXT_CAP_ID_AER: cap_aer(d, where, type); break; |