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| author | Clemens Ladisch <clemens@ladisch.de> | 2011-03-13 16:52:56 +0100 |
|---|---|---|
| committer | Clemens Ladisch <clemens@ladisch.de> | 2012-05-18 13:49:38 +0200 |
| commit | 1d2e3ed0f1d303b01948f7af46cc55e84f9823b6 (patch) | |
| tree | ed35ba94668cf4a7971dc77db9107ff782c18732 | |
| parent | fa18782f247f933b988ecf78ab3eb0370360ba3f (diff) | |
| download | linux-firewire-utils-1d2e3ed0f1d303b01948f7af46cc55e84f9823b6.tar.gz | |
firewire-request: add more register names
Complete the list of registers that are defined in the CSR architecture.
The CLOCK_* registers are not usually implemented and therefore hidden
by default. The remaining registers from IEEE-1212 are commented out
because they are reserved in IEEE-1394 (large configuration ROMs are
never accessed indirectly, and the bus uses only the 64-bit fixed
address-space model).
| -rw-r--r-- | src/firewire-request.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/src/firewire-request.c b/src/firewire-request.c index e1791ca..fcb97ff 100644 --- a/src/firewire-request.c +++ b/src/firewire-request.c @@ -465,6 +465,10 @@ static const struct register_name { { 0xfffff0000004uLL, 4, "state_set" }, { 0xfffff0000008uLL, 4, "node_ids" }, { 0xfffff000000cuLL, 4, "reset_start" }, +#if 0 /* reserved in IEEE-1394 */ + { 0xfffff0000010uLL, 4, "indirect_address", HIDDEN }, + { 0xfffff0000014uLL, 4, "indirect_data", HIDDEN }, +#endif { 0xfffff0000018uLL, 8, "split_timeout" }, { 0xfffff0000018uLL, 4, "split_timeout_hi" }, { 0xfffff000001cuLL, 4, "split_timeout_lo" }, @@ -473,8 +477,35 @@ static const struct register_name { { 0xfffff0000024uLL, 4, "argument_lo", HIDDEN }, { 0xfffff0000028uLL, 4, "test_start", HIDDEN }, { 0xfffff000002cuLL, 4, "test_status", HIDDEN }, +#if 0 /* reserved in IEEE-1394 */ + { 0xfffff0000030uLL, 8, "units_base", HIDDEN }, + { 0xfffff0000030uLL, 4, "units_base_hi", HIDDEN }, + { 0xfffff0000034uLL, 4, "units_base_lo", HIDDEN }, + { 0xfffff0000038uLL, 8, "units_bound", HIDDEN }, + { 0xfffff0000038uLL, 4, "units_bound_hi", HIDDEN }, + { 0xfffff000003cuLL, 4, "units_bound_lo", HIDDEN }, + { 0xfffff0000040uLL, 8, "memory_base", HIDDEN }, + { 0xfffff0000040uLL, 4, "memory_base_hi", HIDDEN }, + { 0xfffff0000044uLL, 4, "memory_base_lo", HIDDEN }, + { 0xfffff0000048uLL, 8, "memory_bound", HIDDEN }, + { 0xfffff0000048uLL, 4, "memory_bound_hi", HIDDEN }, + { 0xfffff000004cuLL, 4, "memory_bound_lo", HIDDEN }, +#endif { 0xfffff0000050uLL, 4, "interrupt_target", HIDDEN }, { 0xfffff0000054uLL, 4, "interrupt_mask", HIDDEN }, + { 0xfffff0000058uLL, 8, "clock_value", HIDDEN }, + { 0xfffff0000058uLL, 4, "clock_value_hi", HIDDEN }, + { 0xfffff000005cuLL, 4, "clock_value_mid", HIDDEN }, + { 0xfffff0000060uLL, 8, "clock_tick_period", HIDDEN }, + { 0xfffff0000060uLL, 4, "clock_tick_period_mid", HIDDEN }, + { 0xfffff0000064uLL, 4, "clock_tick_period_lo", HIDDEN }, + { 0xfffff0000068uLL, 8, "clock_strobe_arrived", HIDDEN }, + { 0xfffff0000068uLL, 4, "clock_strobe_arrived_hi", HIDDEN }, + { 0xfffff000006cuLL, 4, "clock_strobe_arrived_mid", HIDDEN }, + { 0xfffff0000070uLL, 4, "clock_info0", HIDDEN }, + { 0xfffff0000074uLL, 4, "clock_info1", HIDDEN }, + { 0xfffff0000078uLL, 4, "clock_info2", HIDDEN }, + { 0xfffff000007cuLL, 4, "clock_info3", HIDDEN }, { 0xfffff0000080uLL, 64, "message_request" }, { 0xfffff00000c0uLL, 64, "message_response" }, { 0xfffff0000180uLL, 128, "error_log_buffer", HIDDEN }, |