From 2e22c10380aca47ed5762536c8d2289966a7ff23 Mon Sep 17 00:00:00 2001 From: Joakim Tjernlund Date: Mon, 10 Oct 2011 13:30:14 +0200 Subject: 8xx: Add missing Guarded setting in DTLB Error. only DTLB Miss did set this bit, DTLB Error needs too otherwise the setting is lost when the page becomes dirty. Signed-off-by: Joakim Tjernlund Signed-off-by: Willy Tarreau --- arch/ppc/kernel/head_8xx.S | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S index 367fec086b0e2..86bc7271fc326 100644 --- a/arch/ppc/kernel/head_8xx.S +++ b/arch/ppc/kernel/head_8xx.S @@ -573,9 +573,15 @@ DARFixed: ori r21, r21, 1 /* Set valid bit in physical L2 page */ DO_8xx_CPU6(0x3b80, r3) mtspr MD_TWC, r21 /* Load pte table base address */ - mfspr r21, MD_TWC /* ....and get the pte address */ - lwz r20, 0(r21) /* Get the pte */ - + mfspr r20, MD_TWC /* ....and get the pte address */ + lwz r20, 0(r20) /* Get the pte */ + /* Insert the Guarded flag into the TWC from the Linux PTE. + * It is bit 27 of both the Linux PTE and the TWC + */ + rlwimi r21, r20, 0, 27, 27 + DO_8xx_CPU6(0x3b80, r3) + mtspr MD_TWC, r21 + mfspr r21, MD_TWC /* get the pte address again */ ori r20, r20, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE stw r20, 0(r21) /* and update pte in table */ xori r20, r20, _PAGE_RW /* RW bit is inverted */ -- cgit 1.2.3-korg