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9 daysMerge tag 'spi-v6.10' of ↵Linus Torvalds40-512/+1892
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "The diffstat for this release is dominated by the new Airoha driver, mainly as a result of this being a generally quite quiet release. There were a couple of cleanups in the core but nothing substantial, the updates here are almost all driver specific ones. - Support for multi-word mode in the OMAP2 McSPI driver - Overhaul of the PXA2xx driver, mostly API updates - A number of DT binding conversions - Support for Airoha NAND controllers, Cirrus Logic CS35L56, Mobileye EYEQ5 and Renesas R8A779H0" * tag 'spi-v6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (87 commits) spi: dw: Bail out early on unsupported target mode spi: Remove unneded check for orig_nents MAINTAINERS: repair file entry in AIROHA SPI SNFI DRIVER spi: pxa2xx: Drop the stale entry in documentation TOC spi: pxa2xx: Don't provide struct chip_data for others spi: pxa2xx: Remove timeout field from struct chip_data spi: pxa2xx: Remove DMA parameters from struct chip_data spi: pxa2xx: Drop struct pxa2xx_spi_chip spi: pxa2xx: Don't use "proxy" headers spi: pxa2xx: Remove outdated documentation spi: pxa2xx: Move contents of linux/spi/pxa2xx_spi.h to a local one spi: pxa2xx: Provide num-cs for Sharp PDAs via device properties spi: pxa2xx: Allow number of chip select pins to be read from property spi: dt-bindings: ti,qspi: convert to dtschema spi: bitbang: Add missing MODULE_DESCRIPTION() spi: bitbang: Use NSEC_PER_*SEC rather than hard coding spi: dw: Drop default number of CS setting spi: dw: Convert dw_spi::num_cs to u32 spi: dw: Add a number of native CS auto-detection spi: dw: Convert to using BITS_TO_BYTES() macro ...
2024-05-09spi: dw: Bail out early on unsupported target modeGeert Uytterhoeven1-0/+5
Currently, the DesignWare SPI controller driver supports only host mode. However, spi2 on the Kendryte K210 SoC supports only target mode, triggering an error message on e.g. SiPEED MAiXBiT since commit 98d75b9ef282f6b9 ("spi: dw: Drop default number of CS setting"): dw_spi_mmio 50240000.spi: error -22: problem registering spi host dw_spi_mmio 50240000.spi: probe with driver dw_spi_mmio failed with error -22 As spi2 rightfully has no "num-cs" property, num_chipselect is now zero, causing spi_alloc_host() to fail to register the controller. Before, the driver silently registered an SPI host controller with 4 chip selects. Reject target mode early on and warn the user, getting rid of the error message. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Damien Le Moal <dlemoal@kernel.org> Link: https://lore.kernel.org/r/7ae28d83bff7351f34782658ae1bb69cc731693e.1715163113.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-09spi: microchip-core-qspi: fix setting spi bus clock rateConor Dooley1-0/+1
Before ORing the new clock rate with the control register value read from the hardware, the existing clock rate needs to be masked off as otherwise the existing value will interfere with the new one. CC: stable@vger.kernel.org Fixes: 8596124c4c1b ("spi: microchip-core-qspi: Add support for microchip fpga qspi controllers") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240508-fox-unpiloted-b97e1535627b@spud Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-08spi: Remove unneded check for orig_nentsAndy Shevchenko1-14/+8
Both dma_unmap_sgtable() and sg_free_table() in spi_unmap_buf_attrs() have checks for orig_nents against 0. No need to duplicate this. All the same applies to other DMA mapping API calls. Also note, there is no other user in the kernel that does this kind of checks. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20240507201028.564630-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-06spi: pxa2xx: Drop linux/spi/pxa2xx_spi.hMark Brown5-118/+69
Merge series from Andy Shevchenko <andriy.shevchenko@linux.intel.com>: As Arnd suggested we may drop linux/spi/pxa2xx_spi.h as most of its content is being used solely internally to SPI subsystem (PXA2xx drivers). Hence this refactoring series with the additional win of getting rid of legacy documentation. Note, that we have the only user of a single plain integer field in the entire kernel for that. Switching to software nodes does not diminish any of type checking as we only pass an integer.
2024-05-06spi: dw: Auto-detect number of native CSMark Brown3-11/+19
Merge series from Serge Semin <fancer.lancer@gmail.com>: The main goal of the short series is to provide a procedure implementing the auto-detection of the number of native Chip-Select signals supported by the controller. The suggested algorithm is straightforward. It relies on the fact that the SER register writable flags reflects the actual number of available native chip-select signals. So the DW APB/AHB SSI driver now tests the SER register for having the writable bits, calculates the number of CS signals based on the number of set flags and then initializes the num_cs private data field based on that, which then will be passed to the SPI-core subsystem indicating the number of supported hardware chip-selects. The implemented procedure will be useful for the DW SSI device nodes not having the explicitly set "num-cs" property. In case if the property is specified it will be utilized instead of the auto-detection procedure. Besides of that a small cleanup patch is introduced in the head of the series. It converts the driver to using the BITS_TO_BYTES() macro instead of the hard-coded DIV_ROUND_UP()-based calculation of the number of bytes-per-transfer-word.
2024-05-03spi: pxa2xx: Don't provide struct chip_data for othersAndy Shevchenko2-8/+8
Now the struct chip_data is local to spi-pxa2xx.c, move its definition to the C file. This will slightly speed up a build and also hide badly named data type (too generic). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240417110334.2671228-10-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-03spi: pxa2xx: Remove timeout field from struct chip_dataAndy Shevchenko2-4/+1
The timeout field is used only once and assigned to a predefined constant. Replace all that by using the constant directly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240417110334.2671228-9-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-03spi: pxa2xx: Remove DMA parameters from struct chip_dataAndy Shevchenko3-61/+9
The DMA related fields are set once and never modified. It effectively repeats the content of the same fields in struct pxa2xx_spi_controller. With that, remove DMA parameters from struct chip_data. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240417110334.2671228-8-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-03spi: pxa2xx: Drop struct pxa2xx_spi_chipAndy Shevchenko3-46/+2
No more users. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240417110334.2671228-7-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-03spi: pxa2xx: Don't use "proxy" headersAndy Shevchenko4-7/+22
Update header inclusions to follow IWYU (Include What You Use) principle. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240417110334.2671228-6-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-03spi: pxa2xx: Remove outdated documentationAndy Shevchenko1-2/+1
The documentation is referring to the legacy enumeration of the SPI host controllers and target devices. It has nothing to do with the modern way, which is the only supported in kernel right now. Hence, remove outdated documentation file. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240417110334.2671228-5-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-03spi: pxa2xx: Move contents of linux/spi/pxa2xx_spi.h to a local oneAndy Shevchenko4-5/+37
There is no user of the linux/spi/pxa2xx_spi.h. Move its contents to the drivers/spi/spi-pxa2xx.h. Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240417110334.2671228-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-03spi: pxa2xx: Allow number of chip select pins to be read from propertyAndy Shevchenko1-1/+5
In some cases the number of the chip select pins might come from the device property. Allow driver to use it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240417110334.2671228-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-03spi: bitbang: Add missing MODULE_DESCRIPTION()Andy Shevchenko2-11/+11
The modpost script is not happy WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/spi/spi-bitbang.o because there is a missing module description. Add it to the module. While at it, update the terminology in Kconfig section to be in align with added description along with the code comments. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20240502171518.2792895-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-03spi: bitbang: Use NSEC_PER_*SEC rather than hard codingAndy Shevchenko1-2/+3
Use NSEC_PER_*SEC rather than the hard coded value of 1000s. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20240502154825.2752464-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-03spi: dw: Drop default number of CS settingSerge Semin1-6/+2
DW APB/AHB SSI core now supports the procedure automatically detecting the number of native chip-select lines. Thus there is no longer point in defaulting to four CS if the platform doesn't specify the real number especially seeing the default number didn't correspond to any original DW APB/AHB databook. Signed-off-by: Serge Semin <fancer.lancer@gmail.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Link: https://lore.kernel.org/r/20240424150657.9678-5-fancer.lancer@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-03spi: dw: Convert dw_spi::num_cs to u32Serge Semin1-1/+1
Number of native chip-select lines is either retrieved from the "num-cs" DT-property or auto-detected in the generic DW APB/AHB SSI probe method. In the former case the property is supposed to be of the "u32" size. Convert the field type to being u32 then to be able to drop the temporary variable afterwards. Signed-off-by: Serge Semin <fancer.lancer@gmail.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Link: https://lore.kernel.org/r/20240424150657.9678-4-fancer.lancer@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-03spi: dw: Add a number of native CS auto-detectionSerge Semin1-0/+14
Aside with the FIFO depth and DFS field size it's possible to auto-detect a number of native chip-select synthesized in the DW APB/AHB SSI IP-core. It can be done just by writing ones to the SER register. The number of writable flags in the register is limited by the SSI_NUM_SLAVES IP-core synthesize parameter. All the upper flags are read-only and wired to zero. Based on that let's add the number of native CS auto-detection procedure so the low-level platform drivers wouldn't need to manually set it up unless it's required to set a constraint due to platform-specific reasons (for instance, due to a hardware bug). Signed-off-by: Serge Semin <fancer.lancer@gmail.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Link: https://lore.kernel.org/r/20240424150657.9678-3-fancer.lancer@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-03spi: dw: Convert to using BITS_TO_BYTES() macroSerge Semin1-4/+2
Since commit dd3e7cba1627 ("ocfs2/dlm: move BITS_TO_BYTES() to bitops.h for wider use") there is a generic helper available to calculate a number of bytes needed to accommodate the specified number of bits. Let's use it instead of the hard-coded DIV_ROUND_UP() macro function. Signed-off-by: Serge Semin <fancer.lancer@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240424150657.9678-2-fancer.lancer@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-03spi: stm32: enable controller before asserting CSBen Wolsieffer1-12/+2
On the STM32F4/7, the MOSI and CLK pins float while the controller is disabled. CS is a regular GPIO, and therefore always driven. Currently, the controller is enabled in the transfer_one() callback, which runs after CS is asserted. Therefore, there is a period where the SPI pins are floating while CS is asserted, making it possible for stray signals to disrupt communications. An analogous problem occurs at the end of the transfer when the controller is disabled before CS is released. This problem can be reliably observed by enabling the pull-up (if CPOL=0) or pull-down (if CPOL=1) on the clock pin. This will cause two extra unintended clock edges per transfer, when the controller is enabled and disabled. Note that this bug is likely not present on the STM32H7, because this driver sets the AFCNTR bit (not supported on F4/F7), which keeps the SPI pins driven even while the controller is disabled. Enabling/disabling the controller as part of runtime PM was suggested as an alternative approach, but this breaks the driver on the STM32MP1 (see [1]). The following quote from the manual may explain this: > To restart the internal state machine properly, SPI is strongly > suggested to be disabled and re-enabled before next transaction starts > despite its setting is not changed. This patch has been tested on an STM32F746 with a MAX14830 UART expander. [1] https://lore.kernel.org/lkml/ZXzRi_h2AMqEhMVw@dell-precision-5540/T/ Signed-off-by: Ben Wolsieffer <ben.wolsieffer@hefring.com> Link: https://lore.kernel.org/r/20240424135237.1329001-2-ben.wolsieffer@hefring.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-01spi: use 'time_left' instead of 'timeout' withMark Brown8-43/+45
Merge series from Wolfram Sang <wsa+renesas@sang-engineering.com>: There is a confusing pattern in the kernel to use a variable named 'timeout' to store the result of wait_for_*() functions causing patterns like: timeout = wait_for_completion_timeout(...) if (!timeout) return -ETIMEDOUT; with all kinds of permutations. Use 'time_left' as a variable to make the code obvious and self explaining. This is part of a tree-wide series. The rest of the patches can be found here (some parts may still be WIP): git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git i2c/time_left Because these patches are generated, I audit them before sending. This is why I will send series step by step. Build bot is happy with these patches, though. No functional changes intended.
2024-05-01Add add SPI-NAND Flash controller driver for EN7581Mark Brown3-0/+1140
Merge series from Lorenzo Bianconi <lorenzo@kernel.org>: Introduce support for SPI-NAND driver of the Airoha NAND Flash Interface found on Airoha ARM EN7581 SoCs.
2024-05-01spi: fix null pointer dereference within spi_syncMans Rullgard1-0/+1
If spi_sync() is called with the non-empty queue and the same spi_message is then reused, the complete callback for the message remains set while the context is cleared, leading to a null pointer dereference when the callback is invoked from spi_finalize_current_message(). With function inlining disabled, the call stack might look like this: _raw_spin_lock_irqsave from complete_with_flags+0x18/0x58 complete_with_flags from spi_complete+0x8/0xc spi_complete from spi_finalize_current_message+0xec/0x184 spi_finalize_current_message from spi_transfer_one_message+0x2a8/0x474 spi_transfer_one_message from __spi_pump_transfer_message+0x104/0x230 __spi_pump_transfer_message from __spi_transfer_message_noqueue+0x30/0xc4 __spi_transfer_message_noqueue from __spi_sync+0x204/0x248 __spi_sync from spi_sync+0x24/0x3c spi_sync from mcp251xfd_regmap_crc_read+0x124/0x28c [mcp251xfd] mcp251xfd_regmap_crc_read [mcp251xfd] from _regmap_raw_read+0xf8/0x154 _regmap_raw_read from _regmap_bus_read+0x44/0x70 _regmap_bus_read from _regmap_read+0x60/0xd8 _regmap_read from regmap_read+0x3c/0x5c regmap_read from mcp251xfd_alloc_can_err_skb+0x1c/0x54 [mcp251xfd] mcp251xfd_alloc_can_err_skb [mcp251xfd] from mcp251xfd_irq+0x194/0xe70 [mcp251xfd] mcp251xfd_irq [mcp251xfd] from irq_thread_fn+0x1c/0x78 irq_thread_fn from irq_thread+0x118/0x1f4 irq_thread from kthread+0xd8/0xf4 kthread from ret_from_fork+0x14/0x28 Fix this by also setting message->complete to NULL when the transfer is complete. Fixes: ae7d2346dc89 ("spi: Don't use the message queue if possible in spi_sync") Signed-off-by: Mans Rullgard <mans@mansr.com> Link: https://lore.kernel.org/r/20240430182705.13019-1-mans@mansr.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-01spi: use spi_valid_{tx,rx}buf() in stats functionDavid Lechner1-7/+5
There are macros spi_valid_txbuf() and spi_valid_rxbuf() for determining if an xfer actually intended to send or receive data. These checks were hard-coded in spi_statistics_add_transfer_stats(). We can make use of the macros instead to make the code more readable and more robust against potential future changes in case the definition of what valid means changes. The macro takes the spi_message as an argument, so we need to change spi_statistics_add_transfer_stats() to take the spi_message as an argument instead of the controller. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20240430201530.2138095-3-dlechner@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-30spi: xlp: use 'time_left' variable with wait_for_completion_timeout()Wolfram Sang1-4/+4
There is a confusing pattern in the kernel to use a variable named 'timeout' to store the result of wait_for_completion_timeout() causing patterns like: timeout = wait_for_completion_timeout(...) if (!timeout) return -ETIMEDOUT; with all kinds of permutations. Use 'time_left' as a variable to make the code self explaining. Fix to the proper variable type 'unsigned long' while here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20240430114142.28551-9-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-30spi: sun6i: use 'time_left' variable with wait_for_completion_timeout()Wolfram Sang1-8/+9
There is a confusing pattern in the kernel to use a variable named 'timeout' to store the result of wait_for_completion_timeout() causing patterns like: timeout = wait_for_completion_timeout(...) if (!timeout) return -ETIMEDOUT; with all kinds of permutations. Use 'time_left' as a variable to make the code self explaining. Fix to the proper variable type 'unsigned long' while here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20240430114142.28551-8-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-30spi: sun4i: use 'time_left' variable with wait_for_completion_timeout()Wolfram Sang1-4/+5
There is a confusing pattern in the kernel to use a variable named 'timeout' to store the result of wait_for_completion_timeout() causing patterns like: timeout = wait_for_completion_timeout(...) if (!timeout) return -ETIMEDOUT; with all kinds of permutations. Use 'time_left' as a variable to make the code self explaining. Fix to the proper variable type 'unsigned long' while here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20240430114142.28551-7-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-30spi: pic32: use 'time_left' variable with wait_for_completion_timeout()Wolfram Sang1-3/+3
There is a confusing pattern in the kernel to use a variable named 'timeout' to store the result of wait_for_completion_timeout() causing patterns like: timeout = wait_for_completion_timeout(...) if (!timeout) return -ETIMEDOUT; with all kinds of permutations. Use 'time_left' as a variable to make the code self explaining. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20240430114142.28551-6-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-30spi: pic32-sqi: use 'time_left' variable with wait_for_completion_timeout()Wolfram Sang1-3/+3
There is a confusing pattern in the kernel to use a variable named 'timeout' to store the result of wait_for_completion_timeout() causing patterns like: timeout = wait_for_completion_timeout(...) if (!timeout) return -ETIMEDOUT; with all kinds of permutations. Use 'time_left' as a variable to make the code self explaining. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20240430114142.28551-5-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-30spi: imx: use 'time_left' variable with wait_for_completion_timeout()Wolfram Sang1-10/+10
There is a confusing pattern in the kernel to use a variable named 'timeout' to store the result of wait_for_completion_timeout() causing patterns like: timeout = wait_for_completion_timeout(...) if (!timeout) return -ETIMEDOUT; with all kinds of permutations. Use 'time_left' as a variable to make the code self explaining. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20240430114142.28551-4-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-30spi: fsl-lpspi: use 'time_left' variable with wait_for_completion_timeout()Wolfram Sang1-7/+7
There is a confusing pattern in the kernel to use a variable named 'timeout' to store the result of wait_for_completion_timeout() causing patterns like: timeout = wait_for_completion_timeout(...) if (!timeout) return -ETIMEDOUT; with all kinds of permutations. Use 'time_left' as a variable to make the code self explaining. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20240430114142.28551-3-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-30spi: armada-3700: use 'time_left' variable with wait_for_completion_timeout()Wolfram Sang1-4/+4
There is a confusing pattern in the kernel to use a variable named 'timeout' to store the result of wait_for_completion_timeout() causing patterns like: timeout = wait_for_completion_timeout(...) if (!timeout) return -ETIMEDOUT; with all kinds of permutations. Use 'time_left' as a variable to make the code self explaining. Fix to the proper variable type 'unsigned long' while here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20240430114142.28551-2-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-30spi: airoha: add SPI-NAND Flash controller driverLorenzo Bianconi3-0/+1140
Introduce support for SPI-NAND driver of the Airoha NAND Flash Interface found on Airoha ARM SoCs. Tested-by: Rajeev Kumar <Rajeev.Kumar@airoha.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Reviewed-by: Andy Shevchenko <andy@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/6c9db20505b01a66807995374f2af475a23ce5b2.1714377864.git.lorenzo@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-26spi: cadence-qspi: add mobileye,eyeq5-ospi compatibleThéo Lebrun1-0/+10
Declare a new mobileye,eyeq5-ospi compatible. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://lore.kernel.org/r/20240423-cdns-qspi-mbly-v4-4-3d2a7b535ad0@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-26spi: cadence-qspi: add early busywait to cqspi_wait_for_bit()Théo Lebrun1-8/+23
Call readl_relaxed_poll_timeout() with no sleep at the start of cqspi_wait_for_bit(). If its short timeout expires, a sleeping readl_relaxed_poll_timeout() call takes the relay. The reason is to avoid hrtimer interrupts on the system. All read operations are expected to take less than 100µs. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://lore.kernel.org/r/20240423-cdns-qspi-mbly-v4-3-3d2a7b535ad0@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-26spi: cadence-qspi: add no-IRQ mode to indirect readsThéo Lebrun1-4/+9
Support reads through polling, without any IRQ. The main reason is performance; profiling shows that the first IRQ comes quickly on our specific hardware. Once this IRQ arrives, we poll until all data is retrieved. Avoid initial sleep to reduce IRQ count. Hide this behavior behind a quirk flag. This is confirmed through micro-benchmarks, but also end-to-end performance tests. Mobileye EyeQ5, octal flash, reading 235M on a UBIFS filesystem: - No optimizations, ~10.34s, ~22.7 MB/s, 199230 IRQs - CQSPI_SLOW_SRAM, ~10.34s, ~22.7 MB/s, 70284 IRQs - CQSPI_RD_NO_IRQ, ~9.37s, ~25.1 MB/s, 521 IRQs Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://lore.kernel.org/r/20240423-cdns-qspi-mbly-v4-2-3d2a7b535ad0@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-26spi: cadence-qspi: allow FIFO depth detectionThéo Lebrun1-7/+30
If FIFO depth DT property is provided, check it matches what hardware reports and warn otherwise. Else, use hardware provided value. Hardware exposes FIFO depth indirectly because CQSPI_REG_SRAMPARTITION is partially read-only. Move probe cqspi->ddata assignment prior to cqspi_of_get_pdata() call. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://lore.kernel.org/r/20240423-cdns-qspi-mbly-v4-1-3d2a7b535ad0@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-24spi: spi-s3c64xx.c: Remove of_node_put for auto cleanupShivani Gupta1-3/+3
Use the scope based of_node_put() cleanup in s3c64xx_spi_csinfo to automatically release the device node with the __free() cleanup handler Initialize data_np at the point of declaration for clarity of scope. This change reduces the risk of memory leaks and simplifies the code by removing manual node put call. Suggested-by: Julia Lawall <julia.lawall@inria.fr> Signed-off-by: Shivani Gupta <shivani07g@gmail.com> Link: https://lore.kernel.org/r/20240418000505.731724-1-shivani07g@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-23spi: mux: Fix master controller settings after mux selectHeikki Keranen1-0/+2
In some cases SPI child devices behind spi-mux require different settings like: max_speed_hz, mode and bits_per_word. Typically the slave device driver puts the settings in place and calls spi_setup() once during probe and assumes they stay in place for all following spi transfers. However spi-mux forwarded spi_setup() -call to SPI master driver only when slave driver calls spi_setup(). If second slave device was accessed meanwhile and that driver called spi_setup(), the settings did not change back to the first spi device. In case of wrong max_speed_hz this caused spi trasfers to fail. This commit adds spi_setup() call after mux is changed. This way the right device specific parameters are set to the master driver. The fix has been tested by using custom hardware and debugging spi master driver speed settings. Co-authored-by: Petri Tauriainen <petri.tauriainen@bittium.com> Signed-off-by: Heikki Keranen <heikki.keranen@bittium.com> Link: https://lore.kernel.org/r/20240422114150.84426-1-heikki.keranen@bittium.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-19spi: cs42l43: Correct name of ACPI propertyMaciej Strozek1-1/+1
Fixes: 439fbc97502a ("spi: cs42l43: Add bridged cs35l56 amplifiers") Signed-off-by: Maciej Strozek <mstrozek@opensource.cirrus.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20240418103315.1487267-1-mstrozek@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-17spi: oc-tiny: Remove unused of_gpio.hAndy Shevchenko1-2/+0
of_gpio.h is deprecated and subject to remove. The driver doesn't use it, simply remove the unused header. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20240417104730.2510856-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-17spi: cs42l43: Use devm_add_action_or_reset()Charles Keepax1-8/+4
Use devm_add_action_or_reset() rather than manually cleaning up on the error path. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240417093026.79396-1-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-17Add bridged amplifiers to cs42l43Mark Brown6-18/+139
Merge series from Charles Keepax <ckeepax@opensource.cirrus.com>: In some cs42l43 systems a couple of cs35l56 amplifiers are attached to the cs42l43's SPI and I2S. On Windows the cs42l43 is controlled by a SDCA class driver and these two amplifiers are controlled by firmware running on the cs42l43. However, under Linux the decision was made to interact with the cs42l43 directly, affording the user greater control over the audio system. However, this has resulted in an issue where these two bridged cs35l56 amplifiers are not populated in ACPI and must be added manually. There is at least an SDCA extension unit DT entry we can key off. The process of adding this is handled using a software node, firstly the ability to add native chip selects to software nodes must be added. Secondly, an additional flag for naming the SPI devices is added this allows the machine driver to key to the correct amplifier. Then finally, the cs42l43 SPI driver adds the two amplifiers directly onto its SPI bus. An additional series will follow soon to add the audio machine driver parts (in the sof-sdw driver), however that is fairly orthogonal to this part of the process, getting the actual amplifiers registered.
2024-04-16spi: More refacroings after multi-CS supportMark Brown1-30/+33
Merge series from Andy Shevchenko <andriy.shevchenko@linux.intel.com>: A couple of additional refactorings on top of the multi-CS support. One is to make sure that the comment and the code are not disrupted if additional changes come in the future and second one is f or the sake of deduplication. In both cases it also makes indentation level smaller in the affected pieces of the code. No functional changes intended.
2024-04-16spi: cs42l43: Add bridged cs35l56 amplifiersMaciej Strozek2-4/+120
On some cs42l43 systems a couple of cs35l56 amplifiers are attached to the cs42l43's SPI and I2S. On Windows the cs42l43 is controlled by a SDCA class driver and these two amplifiers are controlled by firmware running on the cs42l43. However, under Linux the decision was made to interact with the cs42l43 directly, affording the user greater control over the audio system. However, this has resulted in an issue where these two bridged cs35l56 amplifiers are not populated in ACPI and must be added manually. Check for the presence of the "01fa-cirrus-sidecar-instances" property in the SDCA extension unit's ACPI properties to confirm the presence of these two amplifiers and if they exist add them manually onto the SPI bus. Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Maciej Strozek <mstrozek@opensource.cirrus.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20240416100904.3738093-5-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-16spi: Update swnode based SPI devices to use the fwnode nameCharles Keepax1-0/+5
Update the name for software node based SPI devices to use the fwnode name as the device name. This is helpful since swnode devices are usually added within the kernel, and the kernel often then requires a predictable name such that it can refer back to the device. Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20240416100904.3738093-4-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-16spi: Switch to using is_acpi_device_node() in spi_dev_set_name()Charles Keepax1-3/+4
Use is_acpi_device_node() rather than checking ACPI_COMPANION(), such that when checking for other types of firmware node, the code can consistently do checks against the fwnode. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20240416100904.3738093-3-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-16spi: hisi-kunpeng: Delete the dump interface of data registers in debugfsDevyn Liu1-2/+0
Due to the reading of FIFO during the dump of data registers in debugfs, if SPI transmission is in progress, it will be affected and may result in transmission failure. Therefore, the dump interface of data registers in debugfs is removed. Fixes: 2b2142f247eb ("spi: hisi-kunpeng: Add debugfs support") Signed-off-by: Devyn Liu <liudingyuan@huawei.com> Reviewed-by: Jay Fang <f.fangjian@huawei.com> Link: https://lore.kernel.org/r/20240416015839.3323398-1-liudingyuan@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-16spi: Consistently use BIT for cs_index_mask (part 2)Andy Shevchenko1-7/+3
For some reason the commit 1209c5566f9b ("spi: Consistently use BIT for cs_index_mask") missed one place to change, do it here to finish the job. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20240415184757.1198149-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-16spi: Introduce spi_for_each_valid_cs() in order of deduplicationAndy Shevchenko1-7/+9
In order of deduplication and better maintenance introduce a new spi_for_each_valid_cs() helper macro. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20240415193340.1279360-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-16spi: Extract spi_toggle_csgpiod() helper for better maintananceAndy Shevchenko1-24/+25
The multi-CS support splits the comment and the code in the spi_set_cs(). To avoid this in the future extract spi_toggle_csgpiod() helper. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20240415193340.1279360-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-15spi: pxa2xx: Move number of CS pins validation out of conditionAndy Shevchenko1-8/+7
There is no need to allocate chip_data and then validate number of CS pins as it will have the same effect. Hence move number of CS pins validation out of condition in setup(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20240403171550.1074644-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-15spi: altera: Drop unneeded MODULE_ALIASKrzysztof Kozlowski1-1/+0
The ID table already has respective entry and MODULE_DEVICE_TABLE and creates proper alias for platform driver. Having another MODULE_ALIAS causes the alias to be duplicated. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240414154859.126931-1-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-14spi: axi-spi-engine: fix version format stringDavid Lechner1-1/+1
The version format string in the AXI SPI Engine driver was probably intended to print the version number in the same format as the DT compatible string (e.g. 1.00.a). However, the version just uses semantic versioning so formatting the patch number as a character is not correct and would result in printing control characters for patch numbers less than 32. Fixes: b1353d1c1d45 ("spi: Add Analog Devices AXI SPI Engine controller support") Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20240412-axi-spi-engine-version-printf-v1-1-95e1e842c1a6@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-10spi: cadence-xspi: use for_each_available_child_of_node_scoped()Kousik Sanagavarapu1-7/+1
Refactor code for "is the node's child available?" check by using the corresponding macro instead, which reads more clearly. While at it, use scope-based cleanup instead of manual of_node_put() calls when getting platform data through cdns_xspi_of_get_plat_data(). This removes the unnecessary "node_child" declaration out of the loop's scope and auto cleans up "node_child" when it goes out of scope, even when we return early due to error. Signed-off-by: Kousik Sanagavarapu <five231003@gmail.com> Link: https://msgid.link/r/20240410130205.179069-1-five231003@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-08spi: cadence-qspi: minimise register accesses on each op if !DTRThéo Lebrun1-2/+5
cqspi_enable_dtr() is called for each operation, commands or not, reads or writes. It writes CQSPI_REG_CONFIG then waits for idle (three successful reads). Skip that in the no-DTR case if DTR is already disabled. It cannot be skipped in the DTR case as cqspi_setup_opcode_ext() writes to a register and we must wait for idle state. According to ftrace, the average cqspi_exec_mem_op() call goes from 85.4µs to 83.6µs when reading 235M over UBIFS on an octal flash. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://msgid.link/r/20240405-cdns-qspi-mbly-v2-6-956679866d6d@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-08spi: cadence-qspi: store device data pointer in private structThéo Lebrun1-9/+6
Avoid of_device_get_match_data() call on each IRQ and each read operation. Store pointer in `struct cqspi_st` device instance. End-to-end performance measurements improve with this patch. On a given octal flash, reading 235M over UBIFS is ~3.4% faster. During that read, the average cqspi_exec_mem_op() call goes from 85.4µs to 80.7µs according to ftrace. The worst case goes from 622.4µs to 615.2µs. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://msgid.link/r/20240405-cdns-qspi-mbly-v2-4-956679866d6d@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-08spi: cadence-qspi: allow building for MIPSThéo Lebrun1-1/+1
The Cadence QSPI Controller driver is used on Mobileye EyeQ5 platform. Allow building on MIPS. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://msgid.link/r/20240405-cdns-qspi-mbly-v2-3-956679866d6d@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-03spi: mchp-pci1xxx: Fix a possible null pointer dereference in pci1xxx_spi_probeHuai-Yuan Liu1-0/+2
In function pci1xxxx_spi_probe, there is a potential null pointer that may be caused by a failed memory allocation by the function devm_kzalloc. Hence, a null pointer check needs to be added to prevent null pointer dereferencing later in the code. To fix this issue, spi_bus->spi_int[iter] should be checked. The memory allocated by devm_kzalloc will be automatically released, so just directly return -ENOMEM without worrying about memory leaks. Fixes: 1cc0cbea7167 ("spi: microchip: pci1xxxx: Add driver for SPI controller of PCI1XXXX PCIe switch") Signed-off-by: Huai-Yuan Liu <qq810974084@gmail.com> Link: https://msgid.link/r/20240403014221.969801-1-qq810974084@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-03spi: spi-fsl-lpspi: remove redundant spi_controller_put callCarlos Song1-8/+6
devm_spi_alloc_controller will allocate an SPI controller and automatically release a reference on it when dev is unbound from its driver. It doesn't need to call spi_controller_put explicitly to put the reference when lpspi driver failed initialization. Fixes: 2ae0ab0143fc ("spi: lpspi: Avoid potential use-after-free in probe()") Signed-off-by: Carlos Song <carlos.song@nxp.com> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Link: https://msgid.link/r/20240403084029.2000544-1-carlos.song@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-04-02spi: pxa2xx: Call pxa_ssp_free() after getting the SSP typeAndy Shevchenko1-1/+3
pxa_ssp_request() implies a reference counting, hence the pxa_ssp_free() must be called when we are done. Add missed call. Fixes: bb77c99ee6d3 ("spi: pxa2xx: Skip SSP initialization if it's done elsewhere") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240402144523.3402063-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-29spi: s3c64xx: Use DMA mode from fifo sizeJaewon Kim1-3/+2
If the SPI data size is smaller than FIFO, it operates in PIO mode, and if it is larger than FIFO size, it oerates in DMA mode. If the SPI data size is equal to fifo, it operates in PIO mode and it is separated to 2 transfers. To prevent it, it must operate in DMA mode from the case where the data size and the fifo size are the same. Fixes: 1ee806718d5e ("spi: s3c64xx: support interrupt based pio mode") Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20240329085840.65856-1-jaewon02.kim@samsung.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-29spi: more tx_buf/rx_buf removalMark Brown4-36/+19
Merge series from David Lechner <dlechner@baylibre.com>: I found a couple more controller drivers that were checking if the tx_buf and rx_buf fields in the spi_transfer structure were set by a peripheral driver that I missed in [1]. These checks can be removed as well. [1]: https://lore.kernel.org/linux-spi/20240325-spi-remove-is_dma_mapped-v2-1-d08d62b61f1c@baylibre.com/
2024-03-29Add multi mode support for omap-mcspiMark Brown1-21/+74
Merge series from Louis Chauvet <louis.chauvet@bootlin.com>: This series adds the support for the omap-mcspi multi mode which allows sending SPI messages with a shorter delay between CS and the message. One drawback of the multi-mode is that the CS is raised between each word, so it can only be used with messages containing 1 word transfers and asking for cs_change. Few devices, like FPGAs, may easily workaround this limitation. The first patch removes the current implementation, which is working, but don't comply with what is asked in the spi transfer (The CS is raised by the hardware regardless of cs_change state). No drivers or board file use this implementation upstream. The second patch adds the implementation of the multi-mode, which complies with what is asked in the SPI message. The third patch is the suggested optimization for using MULTI mode in more situations.
2024-03-28spi: fsl: remove is_dma_mapped checksDavid Lechner3-17/+9
There are no more peripheral drivers that set t->tx_dma or t->rx_dma. Therefore, is_dma_mapped is always false and can be removed. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://msgid.link/r/20240328-spi-more-tx-rx-buf-cleanup-v1-2-9ec1ceedf08c@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: au1550: t->{tx,rx}_dma checksDavid Lechner1-19/+10
There are no more peripheral drivers that set t->tx_dma or t->rx_dma so these will always == 0. Therefore, we can remove these checks since they are always true. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://msgid.link/r/20240328-spi-more-tx-rx-buf-cleanup-v1-1-9ec1ceedf08c@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: pxa2xx: Skip SSP initialization if it's done elsewhereAndy Shevchenko1-0/+9
If SSP has been enumerated elsewhere, skip its initialization in pxa2xx_spi_init_pdata(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240327193138.2385910-5-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: pxa2xx: Extract pxa2xx_spi_init_ssp() helperAndy Shevchenko1-28/+38
Refactor pxa2xx_spi_init_pdata() by extracting a new pxa2xx_spi_init_ssp() helper which makes code less twisted. It will be easier to continue refactoring for a new coming modification. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240327193138.2385910-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: pxa2xx: Drop ACPI_PTR() and of_match_ptr()Andy Shevchenko1-6/+3
Drop rather useless use of ACPI_PTR() and of_match_ptr(). It also removes the necessity to be dependent of.h inclusion. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240327193138.2385910-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: pxa2xx: Narrow the Kconfig option visibilityAndy Shevchenko1-1/+1
The PCI || ACPI dependency is the historical part of the x86 support. Narrow the Kconfig option visibility by limiting this dependency to x86. The drop of x86 for PCI case had happened in the commit 2b49ebda39d6 ("spi/pxa2xx: allow building on a 64-bit kernel"), while the ACPI was specifically added for Intel Lynx Point in the commit a3496855d9f1 ("spi/pxa2xx: add support for Lynxpoint SPI controllers"). Note that X86 covers both 32- and 64-bit variants. Suggested-by: Mark Brown <broonie@kernel.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240327193138.2385910-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: omap2-mcpsi: Enable MULTI-mode in more situationsLouis Chauvet1-1/+14
Enable multimode when a transfer of multiple small words can be transformed in a transfer with a single bigger word. This is allowed as long as the result on the cable is the same, so word_delay must be zero. Signed-off-by: Louis Chauvet <louis.chauvet@bootlin.com> Link: https://msgid.link/r/20240327-spi-omap2-mcspi-multi-mode-v3-3-c4ac329dd5a2@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: omap2-mcspi: Add support for MULTI-modeLouis Chauvet1-6/+61
Introduce support for MULTI-mode in the OMAP2 MCSPI driver. Currently, the driver always uses SINGLE mode to handle the chip select (CS). With this enhancement, MULTI-mode is enabled for specific messages, allowing for a shorter delay between CS enable and the message (some FPGA devices are sensitive to this delay). The OMAP2 MCSPI device can use two different mode to send messages, SINGLE and MULTI: In SINGLE mode, the controller only leverages one single FIFO, and the host system has to manually select the CS it wants to enable. In MULTI mode, each CS is bound to a FIFO, the host system then writes the data to the relevant FIFO, as the hardware will take care of the CS The drawback of multi-mode is that it's not possible to keep the CS enabled between each words. Therefore, this patch enables multi-mode only for specific messages: the spi_message must contain only spi_transfer of 1 word (of any size) with cs_change enabled. A new member is introduced in the omap2_mcspi structure to keep track of the current used mode. Signed-off-by: Louis Chauvet <louis.chauvet@bootlin.com> Link: https://msgid.link/r/20240327-spi-omap2-mcspi-multi-mode-v3-2-c4ac329dd5a2@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: spi-omap2-mcspi.c: revert "Toggle CS after each word"Louis Chauvet1-15/+0
Commit 5cbc7ca987fb ("spi: spi-omap2-mcspi.c: Toggle CS after each word") introduced the toggling of CS after each word for the omap2-mcspi controller. The implementation is not respectful of the actual spi_message content, so the CS can be raised after each word even if the transfer structure asks to keep the CS active for the whole operation. As it is not used anyway in the current Linux tree, it can be safely removed. Signed-off-by: Louis Chauvet <louis.chauvet@bootlin.com> Link: https://msgid.link/r/20240327-spi-omap2-mcspi-multi-mode-v3-1-c4ac329dd5a2@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: fsl-dspi: drop driver owner assignmentKrzysztof Kozlowski1-1/+0
Core in platform_driver_register() already sets the .owner, so driver does not need to. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://msgid.link/r/20240327174737.519637-3-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: coldfire-qspi: drop driver owner assignmentKrzysztof Kozlowski1-1/+0
Core in platform_driver_register() already sets the .owner, so driver does not need to. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://msgid.link/r/20240327174737.519637-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: loopback-test: drop driver owner assignmentKrzysztof Kozlowski1-1/+0
Core in spi_register_driver() already sets the .owner, so driver does not need to. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://msgid.link/r/20240327174737.519637-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-26spi: pxa2xx: Switch to use dev_err_probe()Andy Shevchenko1-12/+7
Switch to use dev_err_probe() to simplify the error path and unify a message template. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240326181027.1418989-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-25spi: remove struct spi_message::is_dma_mappedDavid Lechner3-24/+2
There are no more users of the deprecated is_dma_mapped in struct spi_message so it can be removed. References in documentation and comments are also removed. A few similar checks if xfer->tx_dma or xfer->rx_dma are not NULL are also removed since these are now guaranteed to be NULL because they were previously set only if is_dma_mapped was true. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://msgid.link/r/20240325-spi-remove-is_dma_mapped-v2-1-d08d62b61f1c@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-25spi: spi_amd: Add support for SPI MEM frameworkRaju Rangoju1-0/+112
Add support to the SPI controller driver to use SPI MEM framework. SPI subsystem utilizing the SPI memory operations allows to re-use SPI controller drivers for both SPI NOR devices, regular SPI devices as well as SPI NAND devices. Add below functions of spi_mem_ops to support SPI MEM framework - exec-op(): to execute the memory operations. - supports_op(): to check if the memory operation is supported. - adjust_op_size(): to split data transfers so that they don’t exceed the max transfer size supported by the controller. Suggested-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Co-developed-by: Krishnamoorthi M <krishnamoorthi.m@amd.com> Signed-off-by: Krishnamoorthi M <krishnamoorthi.m@amd.com> Co-developed-by: Akshata MukundShetty <akshata.mukundshetty@amd.com> Signed-off-by: Akshata MukundShetty <akshata.mukundshetty@amd.com> Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> Link: https://msgid.link/r/20240229134544.3461757-1-Raju.Rangoju@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-25spi: rspi: Get rid of unused struct rspi_plat_dataAndy Shevchenko1-11/+1
No in-kernel users of struct rspi_plat_data. If required, the software nodes should be used for such users. For now just get rid of it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240325142118.3210915-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-25spi: spi-mt65xx: Rename a variable in interrupt handlerFei Shao1-17/+15
All the spi_transfer variables in this file use the name "xfer" except the one in mtk_spi_interrupt(). Align the naming for consistency and easier searching. While at it, reformat one memcpy() usage since the coding style allows 100 column lines today. This commit has no functional change. Signed-off-by: Fei Shao <fshao@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://msgid.link/r/20240321070942.1587146-3-fshao@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-25spi: mt7621: allow GPIO chip select linesJustin Swartz1-50/+45
Extract a magic number, from mt7621_spi_probe(), used to declare the number of chip select lines (which co-incides with the native chip select count of 2) to a macro. Use the newly defined MT7621_NATIVE_CS_COUNT macro to instead populate both the spi_controller's max_native_cs and num_chipselect members. Declare that the spi_controller should use_gpio_descriptors if present in the device properties (such as those declared in the cs-gpio property of a "ralink,mt7621-spi" compatible device-tree node) so that the SPI core will recalculcate num_chipselect to account for the GPIO descriptors that it should have populated in the cs_gpiod array member. Remove the assignment of mt7621_spi_transfer_one_message() to the spi_controller's transfer_one_message hook. Refactor the mt7621_spi_transfer_one_message() logic into mt7621_spi_prepare_message() and mt7621_spi_transfer_one() and assign both to the spi_controller's prepare_message and transfer_one hooks respectively. Migrate the call mt7621_spi_transfer_one_message() made to mt7621_spi_flush() just before chip select deactivation, to the end of mt7621_spi_write_half_duplex() to ensure that any pending data is shifted out of MOSI before the SPI core deactivates the chip select line. As chip select activation is now taken care of by the SPI core, due to the use of the transfer_one hook instead of transfer_one_message, the calls to mt7621_spi_set_cs() from mt7621_spi_transfer_one_message() have fallen away. And although the SPI core will handle activation for GPIO chip select lines behind the scenes, it requires a callback to allow the driver to perform controller-specific operations to control its native chip select lines. Rename mt7621_spi_set_cs() to mt7621_spi_set_native_cs() and make sure that it takes into account the activation polarity of the chip select line it's acting upon, as the passed enable parameter represents the desired line level and not the desired activation state, and then assign mt7621_set_cs() to the spi_controller's set_cs hook. Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za> Link: https://msgid.link/r/20240316010302.20776-1-justin.swartz@risingedge.co.za Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-22Merge tag 'spi-fix-v6.9-merge-window' of ↵Linus Torvalds6-29/+35
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "A small collection of fixes that came in since the merge window. Most of it is relatively minor driver specific fixes, there's also fixes for error handling with SPI flash devices and a fix restoring delay control functionality for non-GPIO chip selects managed by the core" * tag 'spi-fix-v6.9-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: spi-mt65xx: Fix NULL pointer access in interrupt handler spi: docs: spidev: fix echo command format spi: spi-imx: fix off-by-one in mx51 CPU mode burst length spi: lm70llp: fix links in doc and comments spi: Fix error code checking in spi_mem_exec_op() spi: Restore delays for non-GPIO chip select spi: lpspi: Avoid potential use-after-free in probe()
2024-03-21spi: spi-mt65xx: Fix NULL pointer access in interrupt handlerFei Shao1-10/+12
The TX buffer in spi_transfer can be a NULL pointer, so the interrupt handler may end up writing to the invalid memory and cause crashes. Add a check to trans->tx_buf before using it. Fixes: 1ce24864bff4 ("spi: mediatek: Only do dma for 4-byte aligned buffers") Signed-off-by: Fei Shao <fshao@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://msgid.link/r/20240321070942.1587146-2-fshao@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-18spi: spi-imx: fix off-by-one in mx51 CPU mode burst lengthAdam Butcher1-2/+2
c712c05e46c8 ("spi: imx: fix the burst length at DMA mode and CPU mode") corrects three cases of setting the ECSPI burst length but erroneously leaves the in-range CPU case one bit to big (in that field a value of 0 means 1 bit). The effect was that transmissions that should have been 8-bit bytes appeared as 9-bit causing failed communication with SPI devices. Link: https://lore.kernel.org/all/20240201105451.507005-1-carlos.song@nxp.com/ Link: https://lore.kernel.org/all/20240204091912.36488-1-carlos.song@nxp.com/ Fixes: c712c05e46c8 ("spi: imx: fix the burst length at DMA mode and CPU mode") Signed-off-by: Adam Butcher <adam@jessamine.co.uk> Link: https://msgid.link/r/20240318175119.3334-1-adam@jessamine.co.uk Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-18spi: Merge up v6.8 releaseMark Brown7-153/+40
An i.MX fix depends on other fixes that were sent to v6.8.
2024-03-18spi: lm70llp: fix links in doc and commentsKousik Sanagavarapu1-2/+2
Update links in the documentation and in-code comments which point to the datasheet and schematic. The current links don't work because National Semiconductor (which is the manufacturer of this board and lm70) has been a part of Texas Instruments since 2011 and hence http://www.national.com/ doesn't work anymore. Fixes: 78961a574037 ("spi_lm70llp parport adapter driver") Fixes: 2b7300513b98 ("hwmon: (lm70) Code streamlining and cleanup") Signed-off-by: Kousik Sanagavarapu <five231003@gmail.com> Link: https://msgid.link/r/20240318154540.90613-2-five231003@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-14Merge tag 'mfd-next-6.9' of ↵Linus Torvalds1-0/+2
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Device Support: - Add support for Watchdog to ChromeOS Embedded Controller - Add support for GPIOs to ChromeOS Embedded Controller - Add supprt for Sound to MediaTek MT6357 CODEC New Functionality: - Add power-off functionality to Texas Instruments TWL series CODECs Fix-ups: - Device Tree binding adaptions/conversions/creation - Use/convert to new/better APIs/helpers/MACROs instead of hand-rolling implementations - Trivial; spelling, whitespace, clean-ups, etc - Remove superfluous code and simplify overall - Fix include lists; alphabetise, remove unused, explicitly add used - Use dev_err_probe() to clean-up error paths - Convert used cache type over to the Maple Tree in many instances - Constify a bunch of static structs - Refrain from over-riding resources provided via the firmware Bug Fixes: - Fix a clock related firmware bug on Dell XPS 9530 et al. - Repair incorrect IRQ designations - Increase buffer sizes to omit various snprintf compiler errors - Ensure errors are handled properly - Balance references and prevent resource leaks - Rectify Power Key interrupt processing - Fix Kconfig related build errors - Correct a bunch of register start-up default values" * tag 'mfd-next-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (65 commits) mfd: cs42l43: Fix wrong GPIO_FN_SEL and SPI_CLK_CONFIG1 defaults mfd: cs42l43: Fix wrong register defaults mfd: mt6397-core: Register mt6357 sound codec dt-bindings: mfd: syscon: Add ti,am62-usb-phy-ctrl compatible dt-bindings: mfd: dlg,da9063: Make #interrupt-cells required dt-bindings: mfd: Convert atmel-flexcom to json-schema mfd: kempld-core: Don't replace resources provided by ACPI mfd: cros_ec_dev: Add GPIO device if feature present on EC dt-bindings: mfd: cros-ec: Add properties for GPIO controller mfd: twl: Select MFD_CORE mfd: core: Constify the struct device_type usage mfd: rk8xx-core: Fix interrupt processing order for power key button mfd: twl4030-power: Accept standard property for power controller mfd: twl-core: Add power off implementation for twl603x dt-bindings: mfd: ti,twl: Document system-power-controller mfd: altera-sysmgr: Call of_node_put() only when of_parse_phandle() takes a ref mfd: syscon: Remove extern from function prototypes mfd: syscon: Call of_node_put() only when of_parse_phandle() takes a ref mfd: mc13xxx: Use bitfield helpers mfd: rc5t583: Convert to use maple tree register cache ...
2024-03-14spi: Fix error code checking in spi_mem_exec_op()Florian Fainelli1-1/+1
After commit cff49d58f57e ("spi: Unify error codes by replacing -ENOTSUPP with -EOPNOTSUPP"), our SPI NOR flashes would stop probing with the following visible in the kernel log: [ 2.196300] brcmstb_qspi f0440920.qspi: using bspi-mspi mode [ 2.210295] spi-nor: probe of spi1.0 failed with error -95 It turns out that the check in spi_mem_exec_op() was changed to check for -ENOTSUPP (old error code) or -EOPNOTSUPP (new error code), but this means that for drivers that were converted, the second condition is now true, and we stop falling through like we used to. Fix the error to check for neither error being neither -ENOTSUPP *nor* -EOPNOTSUPP. Fixes: cff49d58f57e ("spi: Unify error codes by replacing -ENOTSUPP with -EOPNOTSUPP") Reviewed-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240313194530.3150446-1-florian.fainelli@broadcom.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-13Merge tag 'spi-v6.9' of ↵Linus Torvalds38-563/+1294
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "This release sees some exciting changes from David Lechner which implements some optimisations that have been talked about for a long time which allows client drivers to pre-prepare SPI messages for repeated or low latency use. This lets us move work out of latency sensitive paths and avoid repeating work for frequently performed operations. As well as being useful in itself this will also be used in future to allow controllers to directly trigger SPI operations (eg, from interrupts). Otherwise this release has mostly been focused on cleanups, plus a couple of new devices: - Support for pre-optimising messages - A big set of updates from Uwe Kleine-König moving drivers to use APIs with more modern terminology for controllers - Major overhaul of the s3c64xx driver - Support for Google GS101 and Samsung Exynos850" * tag 'spi-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (122 commits) spi: Introduce SPI_INVALID_CS and is_valid_cs() spi: Fix types of the last chip select storage variables spi: Consistently use BIT for cs_index_mask spi: Exctract spi_dev_check_cs() helper spi: Exctract spi_set_all_cs_unused() helper spi: s3c64xx: switch exynos850 to new port config data spi: s3c64xx: switch gs101 to new port config data spi: s3c64xx: deprecate fifo_lvl_mask, rx_lvl_offset and port_id spi: s3c64xx: get rid of the OF alias ID dependency spi: s3c64xx: introduce s3c64xx_spi_set_port_id() spi: s3c64xx: let the SPI core determine the bus number spi: s3c64xx: allow FIFO depth to be determined from the compatible spi: s3c64xx: retrieve the FIFO depth from the device tree spi: s3c64xx: determine the fifo depth only once spi: s3c64xx: allow full FIFO masks spi: s3c64xx: define a magic value spi: dt-bindings: introduce FIFO depth properties spi: axi-spi-engine: use struct_size() macro spi: axi-spi-engine: use __counted_by() attribute spi: axi-spi-engine: remove p from struct spi_engine_message_state ...
2024-03-12spi: Restore delays for non-GPIO chip selectJanne Grunau1-10/+14
SPI controller with integrated chip select handling still need to adhere to SPI device's CS setup, hold and inactive delays. For controller without set_cs_timing spi core shall handle the delays to avoid duplicated delay handling in each controller driver. Fixes a regression for the out of tree SPI controller and SPI HID transport on Apple M1/M1 Pro/Max notebooks. Fixes: 4d8ff6b0991d ("spi: Add multi-cs memories support in SPI core") Signed-off-by: Janne Grunau <j@jannau.net> Link: https://msgid.link/r/20240311-spi-cs-delays-regression-v1-1-0075020a90b2@jannau.net Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-12spi: lpspi: Avoid potential use-after-free in probe()Alexander Sverdlin1-4/+4
fsl_lpspi_probe() is allocating/disposing memory manually with spi_alloc_host()/spi_alloc_target(), but uses devm_spi_register_controller(). In case of error after the latter call the memory will be explicitly freed in the probe function by spi_controller_put() call, but used afterwards by "devm" management outside probe() (spi_unregister_controller() <- devm_spi_unregister() below). Unable to handle kernel NULL pointer dereference at virtual address 0000000000000070 ... Call trace: kernfs_find_ns kernfs_find_and_get_ns sysfs_remove_group sysfs_remove_groups device_remove_attrs device_del spi_unregister_controller devm_spi_unregister release_nodes devres_release_all really_probe driver_probe_device __device_attach_driver bus_for_each_drv __device_attach device_initial_probe bus_probe_device deferred_probe_work_func process_one_work worker_thread kthread ret_from_fork Fixes: 5314987de5e5 ("spi: imx: add lpspi bus driver") Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Link: https://msgid.link/r/20240312112050.2503643-1-alexander.sverdlin@siemens.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-07spi: Introduce SPI_INVALID_CS and is_valid_cs()Andy Shevchenko1-16/+23
The SPI core inconsistently uses the marker value for unused chip select pin. Define a constant (with appropriate type) and introduce is_valid_cs() helper function to avoid spreading this inconsistency in the future. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240307150256.3789138-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-07spi: Consistently use BIT for cs_index_maskAndy Shevchenko1-24/+11
Some of the parts related to the chip select are using BIT() macro the rest are using plain numbers. Unify all of them to use BIT(). While at it, make the (repetitive) comment clearer when assigning cs_index_mask during SPI target device enumeration. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240307150256.3789138-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-06spi: Exctract spi_dev_check_cs() helperAndy Shevchenko1-20/+27
It seems a few functions implement the similar for-loop to validate chip select pins for uniqueness. Let's deduplicate that code in order to have a single place of that for better maintenance. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240306160114.3471398-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-06spi: Exctract spi_set_all_cs_unused() helperAndy Shevchenko1-50/+24
It seems a few functions implement the similar for-loop to mark all chip select pins unused. Let's deduplicate that code in order to have a single place of that for better maintenance. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240306160114.3471398-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-06spi: cs42l43: Don't limit native CS to the first chip selectCharles Keepax1-2/+1
As the chip selects can be configured through ACPI/OF/swnode, and the set_cs() callback will only be called when a native chip select is being used, there is no reason for the driver to only support the native chip select as the first chip select. Remove the check that introduces this limitation. Fixes: ef75e767167a ("spi: cs42l43: Add SPI controller support") Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://msgid.link/r/20240306161004.2205113-1-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: switch exynos850 to new port config dataTudor Ambarus1-4/+3
Exynos850 has the same version of USI SPI (v2.1) as GS101. Drop the fifo_lvl_mask and rx_lvl_offset and switch to the new port config data. Backward compatibility with DT is not broken because when alises are set: - the SPI core will set the bus number according to the alias ID - the FIFO depth is always the same size for exynos850 (64 bytes) no matter the alias ID number. Advantages of the change: - drop dependency on the OF alias ID. - FIFO depth is inferred from the compatible. Exynos850 integrates 3 SPI IPs, all with 64 bytes FIFO depths. - use full mask for SPI_STATUS.{RX, TX}_FIFO_LVL fields. Using partial masks is misleading and can hide problems of the driver logic. Just compiled tested. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-13-tudor.ambarus@linaro.org Tested-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: switch gs101 to new port config dataTudor Ambarus1-6/+6
Drop the fifo_lvl_mask and rx_lvl_offset and switch to the new port config data. Advantages of the change: - drop dependency on the OF alias ID. - FIFO depth is inferred from the compatible. GS101 integrates 16 SPI IPs, all with 64 bytes FIFO depths. - use full mask for SPI_STATUS.{RX, TX}_FIFO_LVL fields. Using partial masks is misleading and can hide problems of the driver logic. S3C64XX_SPI_ST_TX_FIFO_RDY_V2 was defined based on the USI's SPI_VERSION.USI_IP_VERSION register field, which has value 2 at reset. MAX_SPI_PORTS is updated to reflect the maximum number of ports for the rest of the compatibles. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-12-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: deprecate fifo_lvl_mask, rx_lvl_offset and port_idTudor Ambarus1-3/+23
Deprecate fifo_lvl_mask, rx_lvl_offset and port_id. One shall use {rx, tx}_fifomask instead. Add messages to each port configuration. Suggested-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-11-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: get rid of the OF alias ID dependencyTudor Ambarus1-0/+4
Compatibles that set ``port_conf->{rx, tx}_fifomask`` are now safe to get rid of the OF alias ID dependency. Let the driver probe even without the alias for these. With this we also protect the FIFO_LVL_MASK calls from s3c64xx_spi_set_fifomask(). Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-10-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: introduce s3c64xx_spi_set_port_id()Tudor Ambarus1-12/+25
Prepare driver to get rid of the of alias ID dependency. Split the port_id logic into a dedicated method. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-9-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: let the SPI core determine the bus numberTudor Ambarus1-2/+2
Let the core determine the bus number, either by getting the alias ID (as the driver forces now), or by allocating a dynamic bus number when the alias is absent. Prepare the driver to allow dt aliases to be absent. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-8-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: allow FIFO depth to be determined from the compatibleTudor Ambarus1-2/+6
There are SoCs that use the same FIFO depth for all the instances of the SPI IP. See the fifo_lvl_mask defined for gs101 for example: .fifo_lvl_mask = { 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f}, Instead of specifying the FIFO depth with the same value for all 16 nodes in this case, allow such SoCs to infer the FIFO depth from the compatible. There are other SoCs than can benefit of this, see: {gs101, fsd, exynos850, s3c641, s3c2443}_spi_port_config. The FIFO depth inferred from the compatible has a higher precedence than the one that might be specified via device tree, the driver shall know better. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-7-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: retrieve the FIFO depth from the device treeTudor Ambarus1-1/+3
There are SoCs that configure different FIFO depths for their instances of the SPI IP. See the fifo_lvl_mask defined for exynos4_spi_port_config for example: .fifo_lvl_mask = { 0x1ff, 0x7F, 0x7F }, The first instance of the IP is configured with 256 bytes FIFOs, whereas the last two are configured with 64 bytes FIFOs. Instead of mangling with the .fifo_lvl_mask and its dependency of the DT alias ID, allow such SoCs to determine the FIFO depth via the ``fifo-depth`` DT property. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-6-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: determine the fifo depth only onceTudor Ambarus1-5/+9
Determine the FIFO depth only once, at probe time. ``sdd->fifo_depth`` can be set later on with the FIFO depth specified in the device tree. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-5-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: allow full FIFO masksTudor Ambarus1-4/+36
The driver is wrong because is using partial register field masks for the SPI_STATUS.{RX, TX}_FIFO_LVL register fields. We see s3c64xx_spi_port_config.fifo_lvl_mask with different values for different instances of the same IP. Take s5pv210_spi_port_config for example, it defines: .fifo_lvl_mask = { 0x1ff, 0x7F }, fifo_lvl_mask is used to determine the FIFO depth of the instance of the IP. In this case, the integrator uses a 256 bytes FIFO for the first SPI instance of the IP, and a 64 bytes FIFO for the second instance. While the first mask reflects the SPI_STATUS.{RX, TX}_FIFO_LVL register fields, the second one is two bits short. Using partial field masks is misleading and can hide problems of the driver's logic. Allow platforms to specify the full FIFO mask, regardless of the FIFO depth. Introduce {rx, tx}_fifomask to represent the SPI_STATUS.{RX, TX}_FIFO_LVL register fields. It's a shifted mask defining the field's length and position. We'll be able to deprecate the use of @rx_lvl_offset, as the shift value can be determined from the mask. The existing compatibles shall start using {rx, tx}_fifomask so that they use the full field mask and to avoid shifting the mask to position, and then shifting it back to zero in the {TX, RX}_FIFO_LVL macros. @rx_lvl_offset will be deprecated in a further patch, after we have the infrastructure to deprecate @fifo_lvl_mask as well. No functional change intended. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-4-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: define a magic valueTudor Ambarus1-1/+3
Define a magic value, it will be used in the next patch as well. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-3-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-04spi: axi-spi-engine: use struct_size() macroDavid Lechner1-3/+2
This makes use of the struct_size() macro to calculate the size of the struct axi_spi_engine when allocating it. Suggested-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://msgid.link/r/20240304-mainline-axi-spi-engine-small-cleanups-v2-3-5b14ed729a31@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-04spi: axi-spi-engine: use __counted_by() attributeDavid Lechner1-3/+4
This adds the __counted_by() attribute to the flex array at the end of struct spi_engine_program in the AXI SPI Engine controller driver. The assignment of the length field has to be reordered to be before the access to the flex array in order to avoid potential compiler warnings/errors due to adding the __counted_by() attribute. Suggested-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://msgid.link/r/20240304-mainline-axi-spi-engine-small-cleanups-v2-2-5b14ed729a31@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-04spi: axi-spi-engine: remove p from struct spi_engine_message_stateDavid Lechner1-3/+0
The program pointer p in struct spi_engine_message_state in the AXI SPI Engine controller driver was assigned but never read so it can be removed. Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://msgid.link/r/20240304-mainline-axi-spi-engine-small-cleanups-v2-1-5b14ed729a31@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-29spi: stm32-qspi: Replace of_gpio.h by proper oneAndy Shevchenko1-1/+1
of_gpio.h is deprecated and subject to remove. The driver doesn't use it directly, replace it with what is really being used. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240228194632.3606563-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-29spi: pic32: Replace of_gpio.h by proper oneAndy Shevchenko1-1/+1
of_gpio.h is deprecated and subject to remove. The driver doesn't use it directly, replace it with what is really being used. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240228194818.3606841-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-27spi: ppc4xx: Fix fallout from rename in struct spi_bitbangUwe Kleine-König1-7/+7
I failed to adapt this driver because it's not enabled in a powerpc allmodconfig build and also wasn't hit by my grep expertise. Fix accordingly. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202402100815.XQXw9XCF-lkp@intel.com/ Fixes: 2259233110d9 ("spi: bitbang: Follow renaming of SPI "master" to "controller"") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://msgid.link/r/20240210164006.208149-7-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-27spi: Drop mismerged fixMark Brown1-7/+7
One patch of a series of three that was sent fixing issues with the ppc4xx driver was targeted at -next, unfortunately it being sandwiched between two others that targeted mainline tripped up my workflow and caused it to get merged along with the others. The ppc4xx driver is only buildable in very limited configurations so none of the CI catches issues with it. Fixes: de4af897ddf2 ("spi: ppc4xx: Fix fallout from rename in struct spi_bitbang") Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-26spi: add support for pre-cooking messagesMark Brown3-80/+247
Merge series from David Lechner <dlechner@baylibre.com>: This is a follow-up to [1] where it was suggested to break down the proposed SPI offload support into smaller series. This takes on the first suggested task of introducing an API to "pre-cook" SPI messages. This idea was first discussed extensively in 2013 [2][3] and revisited more briefly 2022 [4]. The goal here is to be able to improve performance (higher throughput, and reduced CPU usage) by allowing peripheral drivers that use the same struct spi_message repeatedly to "pre-cook" the message once to avoid repeating the same validation, and possibly other operations each time the message is sent. This series includes __spi_validate() and the automatic splitting of xfers in the optimizations. Another frequently suggested optimization is doing DMA mapping only once. This is not included in this series, but can be added later (preferably by someone with a real use case for it). To show how this all works and get some real-world measurements, this series includes the core changes, optimization of a SPI controller driver, and optimization of an ADC driver. This test case was only able to take advantage of the single validation optimization, since it didn't require splitting transfers. With these changes, CPU usage of the threaded interrupt handler, which calls spi_sync(), was reduced from 83% to 73% while at the same time the sample rate (frequency of SPI xfers) was increased from 20kHz to 25kHz. [1]: https://lore.kernel.org/linux-spi/20240109-axi-spi-engine-series-3-v1-1-e42c6a986580@baylibre.com/T/ [2]: https://lore.kernel.org/linux-spi/E81F4810-48DD-41EE-B110-D0D848B8A510@martin.sperl.org/T/ [3]: https://lore.kernel.org/linux-spi/39DEC004-10A1-47EF-9D77-276188D2580C@martin.sperl.org/T/ [4]: https://lore.kernel.org/linux-spi/20220525163946.48ea40c9@erd992/T/
2024-02-26spi: spi-mem: add statistics support to ->exec_op() callsThéo Lebrun1-1/+48
Current behavior is that spi-mem operations do not increment statistics, neither per-controller nor per-device, if ->exec_op() is used. For operations that do NOT use ->exec_op(), stats are increased as the usual spi_sync() is called. The newly implemented spi_mem_add_op_stats() function is strongly inspired by spi_statistics_add_transfer_stats(); locking logic and l2len computation comes from there. Statistics that are being filled: bytes{,_rx,_tx}, messages, transfers, errors, timedout, transfer_bytes_histo_*. Note about messages & transfers counters: in the fallback to spi_sync() case, there are from 1 to 4 transfers per message. We only register one big transfer in the ->exec_op() case as that is closer to reality. This patch is NOT touching: - spi_async, spi_sync, spi_sync_immediate: those counters describe precise function calls, incrementing them would be lying. I believe comparing the messages counter to spi_async+spi_sync is a good way to detect ->exec_op() calls, but I might be missing edge cases knowledge. - transfers_split_maxsize: splitting cannot happen if ->exec_op() is provided. Reviewed-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216-spi-mem-stats-v2-1-9256dfe4887d@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-26spi: axi-spi-engine: move message compile to optimize_messageDavid Lechner1-23/+17
In the AXI SPI Engine driver, compiling the message is an expensive operation. Previously, it was done per message transfer in the prepare_message hook. This patch moves the message compile to the optimize_message hook so that it is only done once per message in cases where the peripheral driver calls spi_optimize_message(). This can be a significant performance improvement for some peripherals. For example, the ad7380 driver saw a 13% improvement in throughput when using the AXI SPI Engine driver with this patch. Since we now need two message states, one for the optimization stage that doesn't change for the lifetime of the message and one that is reset on each transfer for managing the current transfer state, the old msg->state is split into msg->opt_state and spi_engine->msg_state. The latter is included in the driver struct now since there is only one current message at a time that can ever use it and it is in a hot path so avoiding allocating a new one on each message transfer saves a few cpu cycles and lets us get rid of the prepare_message callback. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://msgid.link/r/20240219-mainline-spi-precook-message-v2-4-4a762c6701b9@baylibre.com Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-26spi: stm32: move splitting transfers to optimize_messageDavid Lechner1-12/+16
Since splitting transfers was moved to spi_optimize_message() in the core SPI code, we now need to use the optimize_message callback in the STM32 SPI driver to ensure that the operation is only performed once when spi_optimize_message() is used by peripheral drivers explicitly. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://msgid.link/r/20240219-mainline-spi-precook-message-v2-3-4a762c6701b9@baylibre.com Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-26spi: move splitting transfers to spi_optimize_message()David Lechner1-42/+68
Splitting transfers is an expensive operation so we can potentially optimize it by doing it only once per optimization of the message instead of repeating each time the message is transferred. The transfer splitting functions are currently the only user of spi_res_alloc() so spi_res_release() can be safely moved at this time from spi_finalize_current_message() to spi_unoptimize_message(). The doc comments of the public functions for splitting transfers are also updated so that callers will know when it is safe to call them to ensure proper resource management. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://msgid.link/r/20240219-mainline-spi-precook-message-v2-2-4a762c6701b9@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-26spi: add spi_optimize_message() APIsDavid Lechner1-4/+147
This adds a new spi_optimize_message() function that can be used to optimize SPI messages that are used more than once. Peripheral drivers that use the same message multiple times can use this API to perform SPI message validation and controller-specific optimizations once and then reuse the message while avoiding the overhead of revalidating the message on each spi_(a)sync() call. Internally, the SPI core will also call this function for each message if the peripheral driver did not explicitly call it. This is done to so that controller drivers don't have to have multiple code paths for optimized and non-optimized messages. A hook is provided for controller drivers to perform controller-specific optimizations. Suggested-by: Martin Sperl <kernel@martin.sperl.org> Link: https://lore.kernel.org/linux-spi/39DEC004-10A1-47EF-9D77-276188D2580C@martin.sperl.org/ Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://msgid.link/r/20240219-mainline-spi-precook-message-v2-1-4a762c6701b9@baylibre.com Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-23spi: cs42l43: Tidy up header includesCharles Keepax1-0/+2
Including some missing headers. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20240129152557.3221212-1-ckeepax@opensource.cirrus.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-02-22spi: cadence-qspi: add system-wide suspend and resume callbacksThéo Lebrun1-2/+18
Each SPI controller is expected to call the spi_controller_suspend() and spi_controller_resume() callbacks at system-wide suspend and resume. It (1) handles the kthread worker for queued controllers and (2) marks the controller as suspended to have spi_sync() fail while the controller is unavailable. Those two operations do not require the controller to be active, we do not need to increment the runtime PM usage counter. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://msgid.link/r/20240222-cdns-qspi-pm-fix-v4-4-6b6af8bcbf59@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-22spi: cadence-qspi: put runtime in runtime PM hooks namesThéo Lebrun1-4/+4
Follow kernel naming convention with regards to power-management callback function names. The convention in the kernel is: - prefix_suspend means the system-wide suspend callback; - prefix_runtime_suspend means the runtime PM suspend callback. The same applies to resume callbacks. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Link: https://msgid.link/r/20240222-cdns-qspi-pm-fix-v4-3-6b6af8bcbf59@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-22spi: cadence-qspi: remove system-wide suspend helper calls from runtime PM hooksThéo Lebrun1-7/+2
The ->runtime_suspend() and ->runtime_resume() callbacks are not expected to call spi_controller_suspend() and spi_controller_resume(). Remove calls to those in the cadence-qspi driver. Those helpers have two roles currently: - They stop/start the queue, including dealing with the kworker. - They toggle the SPI controller SPI_CONTROLLER_SUSPENDED flag. It requires acquiring ctlr->bus_lock_mutex. Step one is irrelevant because cadence-qspi is not queued. Step two however has two implications: - A deadlock occurs, because ->runtime_resume() is called in a context where the lock is already taken (in the ->exec_op() callback, where the usage count is incremented). - It would disallow all operations once the device is auto-suspended. Here is a brief call tree highlighting the mutex deadlock: spi_mem_exec_op() ... spi_mem_access_start() mutex_lock(&ctlr->bus_lock_mutex) cqspi_exec_mem_op() pm_runtime_resume_and_get() cqspi_resume() spi_controller_resume() mutex_lock(&ctlr->bus_lock_mutex) ... spi_mem_access_end() mutex_unlock(&ctlr->bus_lock_mutex) ... Fixes: 0578a6dbfe75 ("spi: spi-cadence-quadspi: add runtime pm support") Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://msgid.link/r/20240222-cdns-qspi-pm-fix-v4-2-6b6af8bcbf59@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-22spi: cadence-qspi: fix pointer reference in runtime PM hooksThéo Lebrun1-4/+2
dev_get_drvdata() gets used to acquire the pointer to cqspi and the SPI controller. Neither embed the other; this lead to memory corruption. On a given platform (Mobileye EyeQ5) the memory corruption is hidden inside cqspi->f_pdata. Also, this uninitialised memory is used as a mutex (ctlr->bus_lock_mutex) by spi_controller_suspend(). Fixes: 2087e85bb66e ("spi: cadence-quadspi: fix suspend-resume implementations") Reviewed-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://msgid.link/r/20240222-cdns-qspi-pm-fix-v4-1-6b6af8bcbf59@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-21spi: cadence-qspi: report correct number of chip-selectThéo Lebrun1-2/+6
Set the ->num_chipselect field in struct cqspi_st and struct spi_controller to the current number of chip-select. The value is dependent on declared flashes in devicetree. Previously, the num-cs property from devicetree or the maximum value was being reported. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://msgid.link/r/20240209-cdns-qspi-cs-v1-3-a4f9dfed9ab4@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-21spi: cadence-qspi: set maximum chip-select to 4Théo Lebrun1-1/+3
Change the maximum chip-select count in cadence-qspi to 4 instead of 16. The value gets used as default ->num_chipselect when the num-cs DT property isn't received from devicetree. It also determines the cqspi->f_pdata array size. Hardware only supports values up to 4; see cqspi_chipselect() that sets CS using a one-bit-per-CS 4-bit register field. Add a static_assert() call as a defensive measure to ensure we stay under the SPI subsystem limit. It got set to 4 when introduced in 4d8ff6b0991d ("spi: Add multi-cs memories support in SPI core") and later increased to 16 in 2f8c7c3715f2 ("spi: Raise limit on number of chip selects"). Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://msgid.link/r/20240209-cdns-qspi-cs-v1-2-a4f9dfed9ab4@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-21spi: cadence-qspi: assert each subnode flash CS is validThéo Lebrun1-1/+1
Check each flash CS against the num-cs property from devicetree. Fallback to the driver max supported value (CQSPI_MAX_CHIPSELECT) if num-cs isn't present. cqspi->num_chipselect is set in cqspi_of_get_pdata() to the num-cs devicetree property, or to CQSPI_MAX_CHIPSELECT if num-cs is not set. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Link: https://msgid.link/r/20240209-cdns-qspi-cs-v1-1-a4f9dfed9ab4@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-15spi: dw: remove redundant assignment to variable lenColin Ian King1-1/+1
The variable id len being initialized with a value that is never read, it is being re-assigned later on in a for-loop. The initialization is redundant and can be removed. Cleans up clang scan build warning: drivers/spi/spi-dw-dma.c:580:17: warning: Although the value stored to 'len' is used in the enclosing expression, the value is never actually read from 'len' [deadcode.DeadStores] Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Acked-by: Serge Semin <fancer.lancer@gmail.com> Link: https://msgid.link/r/20240215131603.2062332-1-colin.i.king@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-13spi: mchp-pci1xxxx: release resources on error in probe()Dan Carpenter1-1/+1
Call pci_release_regions(pdev) before returning on this error path. Fixes: 3e7cfd6ad29a ("spi: mchp-pci1xxxx: Add support for DMA in SPI") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://msgid.link/r/efc92197-4023-4bfe-bc63-452e7ed112e8@moroto.mountain Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-13spi-mxs: Fix chipselect glitchRalf Schlatterbeck1-1/+2
There was a change in the mxs-dma engine that uses a new custom flag. The change was not applied to the mxs spi driver. This results in chipselect being deasserted too early. This fixes the chipselect problem by using the new flag in the mxs-spi driver. Fixes: ceeeb99cd821 ("dmaengine: mxs: rename custom flag") Signed-off-by: Ralf Schlatterbeck <rsc@runtux.com> Link: https://msgid.link/r/20240202115330.wxkbfmvd76sy3a6a@runtux.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-12spi: intel-pci: Add support for Lunar Lake-M SPI serial flashMika Westerberg1-0/+1
Add Intel Lunar Lake-M PCI ID to the driver list of supported devices. This is the same controller found in previous generations. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://msgid.link/r/20240212082027.2462849-1-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-12spi: omap2-mcspi: Revert FIFO support without DMAVaishnav Achath1-129/+8
MCSPI controller have few limitations regarding the transaction size when the FIFO buffer is enabled and the WCNT feature is used to find the end of word, in this case if WCNT is not a multiple of the FIFO Almost Empty Level (AEL), then the FIFO empty event is not generated correctly. In addition to this limitation, few other unknown sequence of events that causes the FIFO empty status to not reflect the exact status were found when FIFO is being used without DMA enabled during extended testing in AM65x platform. Till the exact root cause is found and fixed, revert the FIFO support without DMA. See J721E Technical Reference Manual (SPRUI1C), section 12.1.5 for further details: http://www.ti.com/lit/pdf/spruil1 This reverts commit 75223bbea840e ("spi: omap2-mcspi: Add FIFO support without DMA") Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Link: https://msgid.link/r/20240212120049.438495-1-vaishnav.a@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-11spi: ppc4xx: Drop write-only variableUwe Kleine-König1-5/+0
Since commit 24778be20f87 ("spi: convert drivers to use bits_per_word_mask") the bits_per_word variable is only written to. The check that was there before isn't needed any more as the spi core ensures that only 8 bit transfers are used, so the variable can go away together with all assignments to it. Fixes: 24778be20f87 ("spi: convert drivers to use bits_per_word_mask") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20240210164006.208149-8-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-11spi: ppc4xx: Fix fallout from rename in struct spi_bitbangUwe Kleine-König1-7/+7
I failed to adapt this driver because it's not enabled in a powerpc allmodconfig build and also wasn't hit by my grep expertise. Fix accordingly. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202402100815.XQXw9XCF-lkp@intel.com/ Fixes: 2259233110d9 ("spi: bitbang: Follow renaming of SPI "master" to "controller"") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20240210164006.208149-7-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-11spi: ppc4xx: Fix fallout from include cleanupUwe Kleine-König1-0/+1
The driver uses several symbols declared in <linux/platform_device.h>, e.g module_platform_driver(). Include this header explicitly now that <linux/of_platform.h> doesn't include <linux/platform_device.h> any more. Fixes: ef175b29a242 ("of: Stop circularly including of_device.h and of_platform.h") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20240210164006.208149-6-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-09spi: spi-ppc4xx: include missing platform_device.hChristian Lamparter1-0/+1
the driver currently fails to compile on 6.8-rc3 due to: | spi-ppc4xx.c: In function ‘spi_ppc4xx_of_probe’: | @346:36: error: invalid use of undefined type ‘struct platform_device’ | 346 | struct device_node *np = op->dev.of_node; | | ^~ | ... (more similar errors) it was working with 6.7. Looks like it only needed the include and its compiling fine! Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Link: https://lore.kernel.org/r/3eb3f9c4407ba99d1cd275662081e46b9e839173.1707490664.git.chunkeey@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: straightforward cleanupMark Brown1-40/+41
Merge series from Tudor Ambarus <tudor.ambarus@linaro.org>: Various simple cleanups for the s3c64xx driver. Tested with gs101-spi.
2024-02-08spi: get rid of some legacy macrosMark Brown27-100/+109
Merge series from Uwe Kleine-König <u.kleine-koenig@pengutronix.de>: This series finishes off the removal of some of the legacy names for SPI controllers and devices.
2024-02-08spi: s3c64xx: add support for google,gs101-spiMark Brown1-15/+70
Merge series from Tudor Ambarus <tudor.ambarus@linaro.org>: The Google GCS101 uses a variant of the Samsung SPI controller IP.
2024-02-08spi: mchp-pci1xxxx: DMA support for copying data to and from SPI BufThangaraj Samynathan1-27/+338
pci1xxxx_spi_transfer_with_dma adds DMA support to copy the data between host cpu buffer and SPI IO Buffer. On DMA Completion interrupt, the next SPI transaction is initiated in isr. Helper functions pci1xxxx_spi_setup, pci1xxxx_spi_setup_dma_from_io, pci1xxxx_spi_setup_dma_to_io and pci1xxxx_start_spi_xfer are added for setting up spi, setting up dma operations, and to start spi transfer respectively. In the existing implementation, codes are replaced with helper functions wherever applicable. Signed-off-by: Thangaraj Samynathan <thangaraj.s@microchip.com> Link: https://lore.kernel.org/r/20240207080621.30742-3-thangaraj.s@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: mchp-pci1xxxx: Add support for DMA in SPIThangaraj Samynathan1-0/+145
In PCI1xxxx C0, support for DMA in PCIe endpoint is added to enhance the SPI performance. With this support, the performance is improved from 6Mbps to 17Mbps with 20Mhz clock. - DMA Supports two Channels, 0 and 1 - SPI Instance 0 uses chan 0 and SPI Instance 1 uses chan 1 - DMA can be used only if SPI is mapped to PF0 in the multi function endpoint and the MSI interrupt is supported - MSI interrupt of one of the SPI instance is assigned to the DMA and both channels 0 and 1 share the same irq, the MSI address and MSI Data of the irq is obtained and stored in DMA registers to generate interrupt Signed-off-by: Thangaraj Samynathan <thangaraj.s@microchip.com> Link: https://lore.kernel.org/r/20240207080621.30742-2-thangaraj.s@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: add support for google,gs101-spiTudor Ambarus1-1/+17
Add support for GS101 SPI. GS101 integrates 16 SPI nodes, all with 64 bytes FIFOs. GS101 allows just 32 bit register accesses, otherwise a Serror Interrupt is raised. Do the write reg accesses in 32 bits. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207111516.2563218-5-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: add s3c64xx_iowrite{8,16}_32_rep accessorsTudor Ambarus1-2/+34
Allow SoCs that require 32 bits register accesses to write data in chunks of 8 or 16 bits. One SoC that requires 32 bit register accesses is the google gs101. The operation is rare, thus open code it in the driver rather than making it generic (through asm-generic/io.h). Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207111516.2563218-4-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: prepare for a different flavor of iowrite repTudor Ambarus1-14/+21
There are SoCs (gs101) that allow only 32 bit register accesses. As the requirement is rare enough, for those SoCs we'll open code in the driver some s3c64xx_iowrite{8,16}_32_rep() accessors. Prepare for such addition. Suggested-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20240207111516.2563218-3-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: drop a superfluous bitwise NOT operationTudor Ambarus1-1/+0
val &= ~mask; val |= mask; is equivalent to: val |= mask; Drop the superfluous bitwise NOT operation. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-18-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: remove duplicated definitionTudor Ambarus1-3/+1
S3C64XX_SPI_TRAILCNT brings no benefit in terms of name over S3C64XX_SPI_MAX_TRAILCNT. Remove the duplicated definition. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-17-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: downgrade dev_warn to dev_dbg for optional dt propsTudor Ambarus1-2/+2
"samsung,spi-src-clk" and "num-cs" are optional dt properties. Downgrade the message from warning to debug message. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-16-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: drop blank line between declarationsTudor Ambarus1-1/+2
Drop the blank line and move the logical operation in the body of the function rather than in initialization list. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-15-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: return ETIMEDOUT for wait_for_completion_timeout()Tudor Ambarus1-3/+3
ETIMEDOUT is more specific than EIO, use it for wait_for_completion_timeout(). Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-14-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: rename prepare_dma() to s3c64xx_prepare_dma()Tudor Ambarus1-4/+4
Don't monopolize the name. Prepend the driver prefix to the function name. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-13-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: propagate the dma_submit_error() error codeTudor Ambarus1-1/+1
DMA submit should just add the dma descriptor to a queue, without firing it. EIO is misleading and hides what happens in DMA. Propagate the dma_submit_error() error code, don't overwrite it. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-12-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: check return code of dmaengine_slave_config()Tudor Ambarus1-1/+3
Check the return code of dmaengine_slave_config(). Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-11-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: move common code outside if elseTudor Ambarus1-4/+2
Move common code outside if else to avoid code duplication. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-10-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: remove else after returnTudor Ambarus1-4/+2
Else case is not needed after a return, remove it. Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-9-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: remove unneeded (void *) casts in of_match_tableTudor Ambarus1-9/+9
of_device_id::data is an opaque pointer. No explicit cast is needed. Remove unneeded (void *) casts in of_match_table. Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-8-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: fix typo, s/configuartion/configurationTudor Ambarus1-1/+1
Fix typo, s/configuartion/configuration. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-7-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: avoid possible negative array indexTudor Ambarus1-0/+3
The platform id is used as an index into the fifo_lvl_mask array. Platforms can come with a negative device ID, PLATFORM_DEVID_NONE (-1), thus we risked a negative array index. Catch such cases and fail to probe. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-6-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: explicitly include <linux/types.h>Tudor Ambarus1-0/+1
The driver uses u32 and relies on an implicit inclusion of <linux/types.h>. It is good practice to directly include all headers used, it avoids implicit dependencies and spurious breakage if someone rearranges headers and causes the implicit include to vanish. Include the missing header. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-5-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: explicitly include <linux/bits.h>Tudor Ambarus1-0/+1
The driver uses GENMASK() but does not include <linux/bits.h>. It is good practice to directly include all headers used, it avoids implicit dependencies and spurious breakage if someone rearranges headers and causes the implicit include to vanish. Include the missing header. Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-4-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: explicitly include <linux/io.h>Tudor Ambarus1-0/+1
The driver uses readl() but does not include <linux/io.h>. It is good practice to directly include all headers used, it avoids implicit dependencies and spurious breakage if someone rearranges headers and causes the implicit include to vanish. Include the missing header. Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-3-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: sort headers alphabeticallyTudor Ambarus1-7/+6
Sorting headers alphabetically helps locating duplicates, and makes it easier to figure out where to insert new headers. Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-2-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: Drop compat layer from renaming "master" to "controller"Uwe Kleine-König1-1/+1
Now that all in-tree users followed the rename, the compat stuff can go away. This completes the renaming started with commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/ad1d949325b61a4682e8d6ecf9d05da751e6a99f.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: fsl-lib: Follow renaming of SPI "master" to "controller"Uwe Kleine-König1-7/+7
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into this driver. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/b3d724ca2b641f1d717a7ddb9810bdf27168dc35.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: spidev: Follow renaming of SPI "master" to "controller"Uwe Kleine-König1-1/+1
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into this driver. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/15ebfdf58a6590962bdd51b49b2e85a69b3bf443.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: slave-mt27xx: Follow renaming of SPI "master" to "controller"Uwe Kleine-König1-1/+1
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into this driver. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/184a5263af2ec01fd5ad9b8db667ae4d6cbec948.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: loopback-test: Follow renaming of SPI "master" to "controller"Uwe Kleine-König1-2/+2
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into this driver. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/2f57c89d601d0875cd245a2e95c915b9bfcfc47d.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: geni-qcom: Follow renaming of SPI "master" to "controller"Uwe Kleine-König1-1/+1
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into this driver. This was already tried before in commit 8726bdcef62e ("spi: geni-qcom: switch to use modern name"), that's why this change is so small. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/895f9a42691dcea037b30dcce5e61be0b44e3a25.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: cavium: Follow renaming of SPI "master" to "controller"Uwe Kleine-König2-4/+4
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into this driver. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/8aa122cffa6c8c18cc3367def872f81cd9471f2a.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: cadence-quadspi: Follow renaming of SPI "master" to "controller"Uwe Kleine-König1-1/+1
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into this driver. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/d741960846b7f4896eeff91a4c8c7dfa8a6f8b7b.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: cadence-quadspi: Don't emit error message on allocation errorUwe Kleine-König1-3/+2
Drivers are not supposed to emit an error message when a memory allocation fails, as the kernel is very loud in this case already anyhow. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/8da90785395664bf17d16428f46e84b95ef5cc3b.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: bitbang: Follow renaming of SPI "master" to "controller"Uwe Kleine-König12-58/+58
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into the SPI bitbang controller drivers. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/f7f949feb803acb8bea75798f41371a13287f4e8.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-07spi: axi-spi-engine: move msg finalization out of irq handlerDavid Lechner1-25/+15
As a general principal, it is best to do as little as possible in an interrupt handler. This patch reworks the AXI SPI Engine driver to move timer_delete_sync() and spi_finalize_current_message() out of the interrupt handler. Instead, spi_finalize_current_message() is moved to the transfer_one_message function (similar to nearly all other SPI controllers). A completion is now used to wait for the sync interrupt that indicates that the message is complete. The watchdog timer is no longer needed since we can use the wait_for_completion_timeout() function to wait for the message to complete with the same effect. As a bonus, these changes also improve throughput of the SPI controller. For example, this was tested on a ZynqMP with a 80MHz SCLK reading 4 byte samples from an ADC. The max measured throughput increased from 26k to 28k samples per second. Reviewed-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20240207-axi-spi-engine-round-2-1-v2-2-40c0b4e85352@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-07spi: axi-spi-engine: remove use of ida for sync idDavid Lechner1-22/+6
Profiling has shown that ida_alloc_range() accounts for about 10% of the time spent in spi_sync() when using the AXI SPI Engine controller. This call is used to create a unique id for each SPI message to match to an IRQ when the message is complete. Since the core SPI code serializes messages in a message queue, we can only have one message in flight at a time, namely host->cur_msg. This means that we can use a fixed value instead of a unique id for each message since there can never be more than one message pending at a time. This patch removes the use of ida for the sync id and replaces it with a constant value. This simplifies the driver and improves performance. Reviewed-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20240207-axi-spi-engine-round-2-1-v2-1-40c0b4e85352@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-07spi: drop gpf arg from __spi_split_transfer_maxsize()David Lechner2-17/+9
The __spi_split_transfer_maxsize() function has a gpf argument to allow callers to specify the type of memory allocation that needs to be used. However, this function only allocates struct spi_transfer and is not intended to be used from atomic contexts so this type should always be GFP_KERNEL, so we can just drop the argument. Some callers of these functions also passed GFP_DMA, but since only struct spi_transfer is allocated and not any tx/rx buffers, this is not actually necessary and is removed in this commit. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20240206200648.1782234-1-dlechner@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-06spi: fsl-dspi: A couple of error handlingMark Brown1-10/+5
Merge series from andy.shevchenko@gmail.com: A couple of error handling improvements here: - unshadowing error code from dmaengine_slave_config() - making error messages uniform
2024-02-05spi: spi-rockchip: Fix max_native_csLuis de Arquer1-3/+2
Signed-off-by: Luis de Arquer <luis.dearquer@inertim.com> Link: https://lore.kernel.org/r/4d18808e85b85077761c5655083f20ebfd7d3770.camel@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-05spi: spi-rockchip: Fix out of bounds array accessLuis de Arquer1-8/+0
Since spi-rockchip enables use_gpio_descriptors and the SPI_CONTROLLER_GPIO_SS flag, the spi subsytem may call set_cs() for spi devices with indexes above ROCKCHIP_SPI_MAX_CS_NUM Remove array cs_asserted[] which held a shadow copy of the state of the chip select lines with the only purpose of optimizing out rewriting a chip select line to the current state (no-op) This case is already handled by spi.c Signed-off-by: Luis de Arquer <luis.dearquer@inertim.com> Link: https://lore.kernel.org/r/d0a0c4b94f933f7f43973c34765214303ee82b77.camel@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-05spi: intel: Keep the BIOS partition inside the first chipMika Westerberg1-4/+11
If there are two flash chips connected flash regions can refer to the second chip too. In this case we may see the following warning: mtd: partition "BIOS" extends beyond the end of device "0000:00:1f.5" -- size truncated to 0x400000 For this reason, check the BIOS partition size against the chip size and make sure it stays within the that. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20240201121638.207632-2-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-05spi: intel: Add default partition and name to the second chipMika Westerberg1-1/+18
This should make it easier to identify the second chip and also allows using "mtdparts=" and the like with this chip too. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20240201121638.207632-1-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-05spi: axi-spi-engine: use common AXI macrosDavid Lechner1-11/+6
This avoid duplicating the same macros in multiple drivers by reusing the common AXI macros for the version register. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sa <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20240202213132.3863124-2-dlechner@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-05spi: bcm2835: implement ctlr->max_transfer_sizeDavid Lechner1-13/+14
The core SPI code will handle splitting transfers if needed as long as ctlr->max_transfer_size is implemented. It does this in __spi_pump_transfer_message() immediately before calling ctlr->prepare_message. So effectively, this change does not alter the behavior of the driver. Also, several peripheral drivers make use of spi_max_transfer_size(), so this should improve compatibility with those drivers. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20240126220024.3926403-2-dlechner@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-05spi: move split xfers for CS_WORD emulationDavid Lechner1-32/+31
This moves splitting transfers for CS_WORD software emulation to the same place where we split transfers for controller-specific reasons. This fixes a few subtle bugs. The calculation for maxsize was wrong for bit sizes between 17 and 24. This is fixed by making use of spi_split_transfers_maxwords() which already has the correct calculation. Also, since this indirectly calls spi_res_alloc(), to avoid leaking resources, spi_finalize_current_message() would need to be called on all error paths in __spi_validate() and callers of __spi_validate() would need to do the same. This is fixed by moving the call to __spi_pump_transfer_message() where it is already splitting transfers for other reasons and correctly releases resources in the subsequent error paths. Fixes: cbaa62e0094a ("spi: add software implementation for SPI_CS_WORD") Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20240126212358.3916280-2-dlechner@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-05spi: fsl-dspi: Unify error messaging in dspi_request_dma()andy.shevchenko@gmail.com1-8/+5
Use dev_err_probe() for all messages in dspi_request_dma() for the sake of making them uniform. While at it, fix indentation issue reported by Vladimir Oltean. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20240204203127.1186621-3-andy.shevchenko@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-05spi: fsl-dspi: Preserve error code returned by dmaengine_slave_config()andy.shevchenko@gmail.com1-2/+0
dmaengine_slave_config() may return different error codes based on the circumstances. Preserve it instead of shadowing to -EINVAL. Suggested-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20240204203127.1186621-2-andy.shevchenko@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-05spi: imx: fix the burst length at DMA mode and CPU modeCarlos Song1-4/+5
For DMA mode, the bus width of the DMA is equal to the size of data word, so burst length should be configured as bits per word. For CPU mode, because of the spi transfer len is in byte, so calculate the total number of words according to spi transfer len and bits per word, burst length should be configured as total data bits. Signed-off-by: Carlos Song <carlos.song@nxp.com> Reviewed-by: Clark Wang <xiaoning.wang@nxp.com> Fixes: e9b220aeacf1 ("spi: spi-imx: correctly configure burst length when using dma") Fixes: 5f66db08cbd3 ("spi: imx: Take in account bits per word instead of assuming 8-bits") Link: https://lore.kernel.org/r/20240204091912.36488-1-carlos.song@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-02spi: cs42l43: Clean up of firmware nodeCharles Keepax1-6/+16
As we get a child node in the OF case, we should also clean up the reference, add code to do so. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://msgid.link/r/20240202103430.951598-1-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-01-30spi: sh-msiof: avoid integer overflow in constantsWolfram Sang1-8/+8
cppcheck rightfully warned: drivers/spi/spi-sh-msiof.c:792:28: warning: Signed integer overflow for expression '7<<29'. [integerOverflow] sh_msiof_write(p, SIFCTR, SIFCTR_TFWM_1 | SIFCTR_RFWM_1); Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://msgid.link/r/20240130094053.10672-1-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-01-29spi: Kconfig: cap[c]abilityAhelenia Ziemiańska1-1/+1
Signed-off-by: Ahelenia Ziemiańska <nabijaczleweli@nabijaczleweli.xyz> Link: https://msgid.link/r/lq6gstev3sd7i4iw2btiq3gg7lhsraj5w74fkbp6lpbl6nkyff@tarta.nabijaczleweli.xyz Signed-off-by: Mark Brown <broonie@kernel.org>
2024-01-26spi: avoid double validation in __spi_sync()David Lechner1-52/+6
The __spi_sync() function calls __spi_validate() early in the function. Later, it can call spi_async_locked() which calls __spi_validate() again. __spi_validate() is an expensive function, so we can improve performance measurably by avoiding calling it twice. Instead of calling spi_async_locked(), we can call __spi_async() with the spin lock held. spi_async_locked() is removed since there are no more callers. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://msgid.link/r/20240125234732.3530278-2-dlechner@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-01-25spi: fix finalize message on error returnDavid Lechner1-0/+4
In __spi_pump_transfer_message(), the message was not finalized in the first error return as it is in the other error return paths. Not finalizing the message could cause anything waiting on the message to complete to hang forever. This adds the missing call to spi_finalize_current_message(). Fixes: ae7d2346dc89 ("spi: Don't use the message queue if possible in spi_sync") Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://msgid.link/r/20240125205312.3458541-2-dlechner@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-01-25spi: cs42l43: Handle error from devm_pm_runtime_enable()Charles Keepax1-1/+4
As it devm_pm_runtime_enable() can fail due to memory allocations, it is best to handle the error. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://msgid.link/r/20240125103426.2622549-1-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-01-24arm64: exynos: Enable SPI for Exynos850Mark Brown1-0/+14
Merge series from Sam Protsenko <semen.protsenko@linaro.org>: This series enables SPI for Exynos850 SoC, there are also some dependencies that will be needed at runtime which were sent as part of the same series but will be separately applied: 1. Enable PDMA, it's needed for SPI (dts, clk) 2. Propagate SPI src clock rate change up to DIV clocks, to make it possible to change SPI frequency (clk driver) 4. Add SPI nodes to Exynos850 SoC dtsi All SPI instances were tested using `spidev_test' tool in all 3 possible modes: - Polling mode: xfer_size <= 32 - IRQ mode: 64 >= xfer_size >= 32 - DMA mode: xfer_size > 64 with 200 kHz ... 49.9 MHz SPI frequencies. The next 3 approaches were used: 1. Software loopback ('-l' option for `spidev_test' tool) 2. Hardware loopback (by connecting MISO line to MOSI) 3. By communicating with ATMega found on Sensors Mezzanine board [1], programmed to act as an SPI device and all the transactions were additionally checked on my Logic Analyzer to make sure the SCK frequencies were actually correct. [1] https://www.96boards.org/product/sensors-mezzanine/
2024-01-24spi: cs42l43: Handle error from devm_pm_runtime_enableCharles Keepax1-1/+4
As it devm_pm_runtime_enable can fail due to memory allocations, it is best to handle the error. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://msgid.link/r/20240124174101.2270249-1-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-01-24spi: consolidate setting message->spiDavid Lechner1-7/+2
Previously, __spi_sync() and __spi_async() set message->spi to the spi device independently after calling __spi_validate(). __spi_validate() also would conditionally set this if it needed to split the message since it wasn't set yet. Since both __spi_sync() and __spi_async() call __spi_validate(), we can consolidate this into only setting message->spi once (unconditionally) in __spi_validate(). This will also save any future callers of __spi_validate() from also needing to set message->spi. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://msgid.link/r/20240123214946.2616786-1-dlechner@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-01-24spi: s3c64xx: Add Exynos850 supportSam Protsenko1-0/+14
Add SPI port configuration for Exynos850 SoC. It has 3 USI blocks which can be configured in SPI mode: * spi_0: BLK_PERI_SPI_0 (0x13940000) * spi_1: BLK_ALIVE_USI_CMGP00 (0x11d00000) * spi_2: BLK_ALIVE_USI_CMGP01 (0x11d20000) SPI FIFO depth is 64 bytes for all those SPI blocks, so the .fifo_lvl_mask value is set to 0x7f. All blocks have DIV_4 as the default internal clock divider, and an internal loopback mode to run a loopback test. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240120012948.8836-6-semen.protsenko@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-01-23spi: hisi-sfc-v3xx: Return IRQ_NONE if no interrupts were detectedDevyn Liu1-0/+5
Return IRQ_NONE from the interrupt handler when no interrupt was detected. Because an empty interrupt will cause a null pointer error: Unable to handle kernel NULL pointer dereference at virtual address 0000000000000008 Call trace: complete+0x54/0x100 hisi_sfc_v3xx_isr+0x2c/0x40 [spi_hisi_sfc_v3xx] __handle_irq_event_percpu+0x64/0x1e0 handle_irq_event+0x7c/0x1cc Signed-off-by: Devyn Liu <liudingyuan@huawei.com> Link: https://msgid.link/r/20240123071149.917678-1-liudingyuan@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-01-23spi: spi-cadence: Reverse the order of interleaved write and read operationsAmit Kumar Mahapatra1-8/+9
In the existing implementation, when executing interleaved write and read operations in the ISR for a transfer length greater than the FIFO size, the TXFIFO write precedes the RXFIFO read. Consequently, the initially received data in the RXFIFO is pushed out and lost, leading to a failure in data integrity. To address this issue, reverse the order of interleaved operations and conduct the RXFIFO read followed by the TXFIFO write. Fixes: 6afe2ae8dc48 ("spi: spi-cadence: Interleave write of TX and read of RX FIFO") Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Link: https://msgid.link/r/20231218090652.18403-1-amit.kumar-mahapatra@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>