Add PowerVR Series5 SGX GPUs for the TI SoCs

With the Imagination Rogue GPU binding added, let's also add the devicetree
binding for earlier SGX GPUs. Let's also patch the TI SoCs for the related
SGX GPU nodes.

Based on the mailing list discussions, the conclusion was that we need two
separate device tree bindings, one for Rogue and upcoming GPUS, and one for
the older SGX GPUs.

For merging the changes, I applied the binding changes together with the
TI SoC related changes into a branch leaving out the sun6i and mips changes
as suggested by Rob.

These changes are mostly 32-bit SoCs, but also contains one arm64 change.
It does not cause any merge conflicts.
-----BEGIN PGP SIGNATURE-----

iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmXcZiwRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNyoBAAgI4qgIZWMNuccDnSwn+UCTDySqa+EBCK
l7M9jrrLJ8Z+8Wz498lGp6hMD+3fa1bUHYmf8WE9+hWvUL4YcTpAxueTMJ8lvQE0
b6SM85G08p8Golm+PNXjz+JrJed83bfjZeZQJZqYZsrRyS8fw1Q/dpilydZhURpR
gm8Sh7V1Q1FXHyh/j3C4Yo5m048bG50PmAp3Cqw8Pu5UvW+mNPMFc+3c06O6wtWy
jgNb6JiNFkRlNkpnnx+JTjXaZcrsB2k1uodOMYBJjc8fndRlhKPuNYvA9ZEAhgQU
W4L4BL/uJODciRY9yIciB8Qn5ulsjTJOW+pwQfhRnPAjf4h5/Dw68GJLLtBAtSbt
2Kt2t+Ma1CBDxumvCpj6FK48rmCKeF3i+HVbgQyqMjh3izDvXLlMCaDXuw5ema3j
7ihNEw+am0Upy84meT4qzksX73QnVF/3reWGnH97I+fpxW/ec4UcjeU1zEJvSwZ1
+GwEzl4eufFyBph70pJrU7RUpI52kMm8gdM3Wlcr4I+IkSQITx8pm0ed+l4lKJTI
YFCZq9RZaf8uGPIi6fUXBeZOHjEJRVpqyrMIBI8Vb4KZAMk8tj1o0UjmxLiU2pLF
tOzd0s/LJrsKOCDDXWVxk2Y33L+mPm65LV0U3ZJA3k3BVi8k+n/FGqxaSIKmrsEd
eWjzriVh43w=
=4Z+H
-----END PGP SIGNATURE-----