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authorTony Lindgren <tony@atomide.com>2024-03-27 09:10:37 +0200
committerTony Lindgren <tony@atomide.com>2024-04-10 09:15:38 +0300
commitde36994d7639024cde1f7d1dd6d9d69e7243572f (patch)
tree66d51c4c726eee9c7cc2a976e4d6691a275980f3
parent4bad3598a8a685ea7a0953cdb9cc2e2ac69ae26b (diff)
downloadlinux-omap-de36994d7639024cde1f7d1dd6d9d69e7243572f.tar.gz
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_DSP
With the clkcsel binding we can drop the custom ti,bit-shift devicetree property in favor of the standard reg property and reduce the number of clocks to update for the make W-1 dtbs warnings. Let's also add a comment for the clocksel clock that matches the documentation. Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi22
1 files changed, 15 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi b/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi
index 10f452152b0c8..e4f15453adfa9 100644
--- a/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi
@@ -376,13 +376,21 @@
clock-div = <1>;
};
- dpll_dsp_byp_mux: clock-dpll-dsp-byp-mux-23@240 {
- #clock-cells = <0>;
- compatible = "ti,mux-clock";
- clock-output-names = "dpll_dsp_byp_mux";
- clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>;
- ti,bit-shift = <23>;
- reg = <0x0240>;
+ /* CM_CLKSEL_DPLL_DSP */
+ clock@240 {
+ compatible = "ti,clksel";
+ reg = <0x240>;
+ #clock-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dpll_dsp_byp_mux: clock@23 {
+ reg = <23>;
+ compatible = "ti,mux-clock";
+ clock-output-names = "dpll_dsp_byp_mux";
+ clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>;
+ #clock-cells = <0>;
+ };
};
dpll_dsp_ck: clock@234 {