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| author | Sean Christopherson <seanjc@google.com> | 2021-02-03 16:01:14 -0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-02-04 09:27:29 -0500 |
| commit | 6f8e65a60168567cc59f9b99980ea9112d4152f5 (patch) | |
| tree | 3f391ed7c7b93f97ce720dede0a4cf4f1145aa5c | |
| parent | 5b7f575ccd29eb1a0b013961bee5957574046094 (diff) | |
| download | powerpc-6f8e65a60168567cc59f9b99980ea9112d4152f5.tar.gz | |
KVM: x86/mmu: Add helper to generate mask of reserved HPA bits
Add a helper to generate the mask of reserved PA bits in the host.
No functional change intended.
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20210204000117.3303214-10-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | arch/x86/kvm/mmu/mmu.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index d462db3bc74230..86af5829427207 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -4123,6 +4123,11 @@ static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu, vcpu->arch.reserved_gpa_bits, execonly); } +static inline u64 reserved_hpa_bits(void) +{ + return rsvd_bits(shadow_phys_bits, 63); +} + /* * the page table on host is the shadow page table for the page * table in guest or amd nested guest, its mmu features completely @@ -4142,7 +4147,7 @@ reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context) */ shadow_zero_check = &context->shadow_zero_check; __reset_rsvds_bits_mask(vcpu, shadow_zero_check, - rsvd_bits(shadow_phys_bits, 63), + reserved_hpa_bits(), context->shadow_root_level, uses_nx, guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES), is_pse(vcpu), true); @@ -4179,14 +4184,13 @@ reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, if (boot_cpu_is_amd()) __reset_rsvds_bits_mask(vcpu, shadow_zero_check, - rsvd_bits(shadow_phys_bits, 63), + reserved_hpa_bits(), context->shadow_root_level, false, boot_cpu_has(X86_FEATURE_GBPAGES), true, true); else __reset_rsvds_bits_mask_ept(shadow_zero_check, - rsvd_bits(shadow_phys_bits, 63), - false); + reserved_hpa_bits(), false); if (!shadow_me_mask) return; @@ -4206,7 +4210,7 @@ reset_ept_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context, bool execonly) { __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, - rsvd_bits(shadow_phys_bits, 63), execonly); + reserved_hpa_bits(), execonly); } #define BYTE_MASK(access) \ |