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-rw-r--r--target-riscv.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/target-riscv.c b/target-riscv.c
index cbec7623..09edfd7a 100644
--- a/target-riscv.c
+++ b/target-riscv.c
@@ -3,6 +3,14 @@
#include "machine.h"
+static void init_riscv(const struct target *self)
+{
+ if (arch_cmodel == CMODEL_UNKNOWN)
+ arch_cmodel = CMODEL_MEDLOW;
+ if (fpic)
+ arch_cmodel = CMODEL_PIC;
+}
+
const struct target target_riscv32 = {
.mach = MACH_RISCV32,
.bitness = ARCH_LP32,
@@ -10,6 +18,8 @@ const struct target target_riscv32 = {
.unsigned_char = 1,
.target_64bit = &target_riscv64,
+
+ .init = init_riscv,
};
const struct target target_riscv64 = {
@@ -19,4 +29,6 @@ const struct target target_riscv64 = {
.unsigned_char = 1,
.target_32bit = &target_riscv32,
+
+ .init = init_riscv,
};