ChangeSet 1.994.1.5, 2003/03/28 14:17:04-08:00, david-b@pacbell.net [PATCH] USB: ohci-hcd, pci posting paranoia Flushes some posted PCI writes in case of trouble. Lack of these hasn't been seen to be a problem; the update mostly affects run-once init paths. Thanks to Arjan for the code-review comments. drivers/usb/host/ohci-hcd.c | 8 ++++++++ drivers/usb/host/ohci-q.c | 2 ++ 2 files changed, 10 insertions(+) diff -Nru a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c --- a/drivers/usb/host/ohci-hcd.c Mon Apr 7 15:15:13 2003 +++ b/drivers/usb/host/ohci-hcd.c Mon Apr 7 15:15:13 2003 @@ -429,6 +429,8 @@ ohci->hc_control = readl (&ohci->regs->control); ohci->hc_control &= OHCI_CTRL_RWC; /* hcfs 0 = RESET */ writel (ohci->hc_control, &ohci->regs->control); + // flush those pci writes + (void) readl (&ohci->regs->control); wait_ms (50); /* HC Reset requires max 10 us delay */ @@ -450,6 +452,8 @@ * this if we write fmInterval after we're OPERATIONAL. */ writel (ohci->hc_control, &ohci->regs->control); + // flush those pci writes + (void) readl (&ohci->regs->control); return 0; } @@ -524,6 +528,8 @@ writel (tmp, &ohci->regs->roothub.a); writel (RH_HS_LPSC, &ohci->regs->roothub.status); writel (0, &ohci->regs->roothub.b); + // flush those pci writes + (void) readl (&ohci->regs->control); // POTPGT delay is bits 24-31, in 2 ms units. mdelay ((roothub_a (ohci) >> 23) & 0x1fe); @@ -610,6 +616,8 @@ writel (ints, ®s->intrstatus); writel (OHCI_INTR_MIE, ®s->intrenable); + // flush those pci writes + (void) readl (&ohci->regs->control); } /*-------------------------------------------------------------------------*/ diff -Nru a/drivers/usb/host/ohci-q.c b/drivers/usb/host/ohci-q.c --- a/drivers/usb/host/ohci-q.c Mon Apr 7 15:15:13 2003 +++ b/drivers/usb/host/ohci-q.c Mon Apr 7 15:15:13 2003 @@ -446,6 +446,8 @@ if (!ohci->sleeping) { writel (OHCI_INTR_SF, &ohci->regs->intrstatus); writel (OHCI_INTR_SF, &ohci->regs->intrenable); + // flush those pci writes + (void) readl (&ohci->regs->control); } }