diff -urN ref/arch/alpha/kernel/pci_impl.h iommu/arch/alpha/kernel/pci_impl.h
--- ref/arch/alpha/kernel/pci_impl.h	Sun Apr  1 01:17:07 2001
+++ iommu/arch/alpha/kernel/pci_impl.h	Tue May 22 16:48:36 2001
@@ -135,6 +135,7 @@
 {
 	spinlock_t lock;
 	struct pci_controller *hose;
+#define IOMMU_INVALID_PTE 0x2 /* 32:63 bits MBZ */
 	unsigned long *ptes;
 	dma_addr_t dma_base;
 	unsigned int size;
diff -urN ref/arch/alpha/kernel/pci_iommu.c iommu/arch/alpha/kernel/pci_iommu.c
--- ref/arch/alpha/kernel/pci_iommu.c	Sun Apr  1 01:17:07 2001
+++ iommu/arch/alpha/kernel/pci_iommu.c	Tue May 22 17:01:53 2001
@@ -115,12 +136,12 @@
 		}
 	}
 
-	/* Success.  Mark them all in use, ie not zero.  Typically
-	   bit zero is the valid bit, so write ~1 into everything.
+	/* Success.  Mark them all in use, ie not zero and invalid
+	   for the iommu tlb that could load them from under us.
 	   The chip specific bits will fill this in with something
 	   kosher when we return.  */
 	for (i = 0; i < n; ++i)
-		ptes[p+i] = ~1UL;
+		ptes[p+i] = IOMMU_INVALID_PTE;
 
 	arena->next_entry = p + n;
 	spin_unlock_irqrestore(&arena->lock, flags);