From: Pat Gefre More code clean up = mostly pcibr_slot.c --- 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c | 388 ++----------------------- 25-akpm/include/asm-ia64/sn/klconfig.h | 1 25-akpm/include/asm-ia64/sn/sn2/sn_private.h | 78 ++--- 3 files changed, 86 insertions(+), 381 deletions(-) diff -puN arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c~sn60 arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c --- 25/arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c~sn60 Thu Jan 8 15:25:26 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c Thu Jan 8 15:25:26 2004 @@ -23,6 +23,8 @@ extern pcibr_info_t pcibr_device_inf extern int pcibr_slot_initial_rrb_alloc(vertex_hdl_t,pciio_slot_t); extern int pcibr_pcix_rbars_calc(pcibr_soft_t); +extern char *pci_space[]; + int pcibr_slot_info_init(vertex_hdl_t pcibr_vhdl, pciio_slot_t slot); int pcibr_slot_info_free(vertex_hdl_t pcibr_vhdl, pciio_slot_t slot); int pcibr_slot_addr_space_init(vertex_hdl_t pcibr_vhdl, pciio_slot_t slot); @@ -54,15 +56,6 @@ extern vertex_hdl_t baseio_pci_vhdl; int scsi_ctlr_nums_add(vertex_hdl_t, vertex_hdl_t); -/* For now .... */ -/* - * PCI Hot-Plug Capability Flags - - */ -#define D_PCI_HOT_PLUG_ATTACH 0x200 /* Driver supports PCI hot-plug attach */ -#define D_PCI_HOT_PLUG_DETACH 0x400 /* Driver supports PCI hot-plug detach */ - - /* * PCI-X Max Outstanding Split Transactions translation array and Max Memory * Read Byte Count translation array, as defined in the PCI-X Specification. @@ -73,158 +66,6 @@ int scsi_ctlr_nums_add(vertex_hdl_t, ver int max_splittrans_to_numbuf[MAX_SPLIT_TABLE] = {1, 2, 3, 4, 8, 12, 16, 32}; int max_readcount_to_bufsize[MAX_READCNT_TABLE] = {512, 1024, 2048, 4096 }; - -/*========================================================================== - * BRIDGE PCI SLOT RELATED IOCTLs - */ - -/* - * pcibr_slot_startup - * Software start-up the PCI slot. - */ - -#ifdef PIC_LATER - -int -pcibr_slot_startup(vertex_hdl_t pcibr_vhdl, pcibr_slot_req_t reqp) -{ - pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl); - pciio_slot_t slot; - int error = 0; - char l1_msg[BRL1_QSIZE+1]; - struct pcibr_slot_up_resp_s tmp_up_resp; - - /* Make sure that we are dealing with a bridge device vertex */ - if (!pcibr_soft) { - return(PCI_NOT_A_BRIDGE); - } - - /* req_slot is the 'external' slot number, convert for internal use */ - slot = PCIBR_SLOT_TO_DEVICE(pcibr_soft, reqp->req_slot); - - /* Check for the valid slot */ - if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) - return(PCI_NOT_A_SLOT); - -#ifdef PIC_LATER - /* Acquire update access to the bus */ - mrlock(pcibr_soft->bs_bus_lock, MR_UPDATE, PZERO); -#endif - - if (pcibr_soft->bs_slot[slot].slot_status & SLOT_STARTUP_CMPLT) { - error = PCI_SLOT_ALREADY_UP; - goto startup_unlock; - } - - error = pcibr_slot_attach(pcibr_vhdl, slot, D_PCI_HOT_PLUG_ATTACH, - l1_msg, &tmp_up_resp.resp_sub_errno); - - strncpy(tmp_up_resp.resp_l1_msg, l1_msg, L1_QSIZE); - tmp_up_resp.resp_l1_msg[L1_QSIZE] = '\0'; - - if (COPYOUT(&tmp_up_resp, reqp->req_respp.up, reqp->req_size)) { - return(EFAULT); - } - - startup_unlock: - -#ifdef PIC_LATER - /* Release the bus lock */ - mrunlock(pcibr_soft->bs_bus_lock); -#endif - return(error); -} - -/* - * pcibr_slot_shutdown - * Software shut-down the PCI slot - */ -int -pcibr_slot_shutdown(vertex_hdl_t pcibr_vhdl, pcibr_slot_req_t reqp) -{ - pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl); - bridge_t *bridge; - pciio_slot_t slot; - int error = 0; - char l1_msg[BRL1_QSIZE+1]; - struct pcibr_slot_down_resp_s tmp_down_resp; - pciio_slot_t tmp_slot; - - /* Make sure that we are dealing with a bridge device vertex */ - if (!pcibr_soft) { - return(PCI_NOT_A_BRIDGE); - } - - /* req_slot is the 'external' slot number, convert for internal use */ - slot = PCIBR_SLOT_TO_DEVICE(pcibr_soft, reqp->req_slot); - - bridge = pcibr_soft->bs_base; - - /* Check for valid slot */ - if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) - return(PCI_NOT_A_SLOT); - -#ifdef PIC_LATER - /* Acquire update access to the bus */ - mrlock(pcibr_soft->bs_bus_lock, MR_UPDATE, PZERO); -#endif - - if ((pcibr_soft->bs_slot[slot].slot_status & SLOT_SHUTDOWN_CMPLT) || - ((pcibr_soft->bs_slot[slot].slot_status & SLOT_STATUS_MASK) == 0)) { - error = PCI_SLOT_ALREADY_DOWN; - /* - * RJR - Should we invoke an L1 slot power-down command just in case - * a previous shut-down failed to power-down the slot? - */ - goto shutdown_unlock; - } - - /* Do not allow a multi-function card to be hot-plug removed */ - if (pcibr_soft->bs_slot[slot].bss_ninfo > 1) { - tmp_down_resp.resp_sub_errno = EPERM; - error = PCI_MULTI_FUNC_ERR; - goto shutdown_copyout; - } - - /* Do not allow the last 33 MHz card to be removed */ - if ((bridge->b_wid_control & BRIDGE_CTRL_BUS_SPEED_MASK) == - BRIDGE_CTRL_BUS_SPEED_33) { - for (tmp_slot = pcibr_soft->bs_first_slot; - tmp_slot <= pcibr_soft->bs_last_slot; tmp_slot++) - if (tmp_slot != slot) - if (pcibr_soft->bs_slot[tmp_slot].slot_status & SLOT_POWER_UP) { - error++; - break; - } - if (!error) { - error = PCI_EMPTY_33MHZ; - goto shutdown_unlock; - } - } - - error = pcibr_slot_detach(pcibr_vhdl, slot, D_PCI_HOT_PLUG_DETACH, - l1_msg, &tmp_down_resp.resp_sub_errno); - - strncpy(tmp_down_resp.resp_l1_msg, l1_msg, L1_QSIZE); - tmp_down_resp.resp_l1_msg[L1_QSIZE] = '\0'; - - shutdown_copyout: - - if (COPYOUT(&tmp_down_resp, reqp->req_respp.down, reqp->req_size)) { - return(EFAULT); - } - - shutdown_unlock: - -#ifdef PIC_LATER - /* Release the bus lock */ - mrunlock(pcibr_soft->bs_bus_lock); -#endif - - return(error); -} -#endif /* PIC_LATER */ - char *pci_space_name[] = {"NONE", "ROM", "IO", @@ -435,17 +276,7 @@ pcibr_slot_query(vertex_hdl_t pcibr_vhdl if (size < sizeof(*respp)) { return(PCI_RESP_AREA_TOO_SMALL); } - -#ifdef PIC_LATER - /* Acquire read access to the bus */ - mrlock(pcibr_soft->bs_bus_lock, MR_ACCESS, PZERO); -#endif error = pcibr_slot_info_return(pcibr_soft, slot, respp); - -#ifdef PIC_LATER - /* Release the bus lock */ - mrunlock(pcibr_soft->bs_bus_lock); -#endif return(error); } @@ -456,17 +287,7 @@ pcibr_slot_query(vertex_hdl_t pcibr_vhdl if (size < sizeof(*respp)) { return(PCI_RESP_AREA_TOO_SMALL); } - -#ifdef PIC_LATER - /* Acquire read access to the bus */ - mrlock(pcibr_soft->bs_bus_lock, MR_ACCESS, PZERO); -#endif error = pcibr_slot_info_return(pcibr_soft, tmp_slot, respp); - -#ifdef PCI_LATER - /* Release the bus lock */ - mrunlock(pcibr_soft->bs_bus_lock); -#endif if (error) { return(error); } @@ -478,9 +299,6 @@ pcibr_slot_query(vertex_hdl_t pcibr_vhdl return(error); } -#define PROBE_LOCK 0 /* FIXME: we're attempting to lock around accesses - * to b_int_enable. This hangs pcibr_probe_slot() - */ /* * pcibr_slot_info_init @@ -534,14 +352,8 @@ pcibr_slot_info_init(vertex_hdl_t pcibr /* Try to read the device-id/vendor-id from the config space */ cfgw = pcibr_slot_config_addr(bridge, slot, 0); -#if PROBE_LOCK - s = pcibr_lock(pcibr_soft); -#endif if (pcibr_probe_slot(bridge, cfgw, &idword)) return(ENODEV); -#if PROBE_LOCK - pcibr_unlock(pcibr_soft, s); -#endif slotp = &pcibr_soft->bs_slot[slot]; slotp->slot_status |= SLOT_POWER_UP; @@ -572,16 +384,10 @@ pcibr_slot_info_init(vertex_hdl_t pcibr if (htype & 0x80) { /* MULTIFUNCTION */ for (func = 1; func < 8; ++func) { cfgw = pcibr_func_config_addr(bridge, 0, slot, func, 0); -#if PROBE_LOCK - s = pcibr_lock(pcibr_soft); -#endif if (pcibr_probe_slot(bridge, cfgw, &idwords[func])) { pfail |= 1 << func; continue; } -#if PROBE_LOCK - pcibr_unlock(pcibr_soft, s); -#endif vendor = 0xFFFF & idwords[func]; if (vendor == 0xFFFF) { pfail |= 1 << func; @@ -626,39 +432,9 @@ pcibr_slot_info_init(vertex_hdl_t pcibr } PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_CONFIG, pcibr_vhdl, - "pcibr_slot_info_init: slot=%d, func=%d, cfgw=0x%x\n", + "pcibr_slot_info_init: slot=%d, func=%d, cfgw=0x%lx\n", PCIBR_DEVICE_TO_SLOT(pcibr_soft,slot), func, cfgw)); -#ifdef PIC_LATER - /* - * Check for a Quad ATM PCI "card" and return all the PCI bus - * memory and I/O space. This will work-around an apparent - * hardware problem with the Quad ATM XIO card handling large - * PIO addresses. Releasing all the space for use by the card - * will lower the PIO addresses with the PCI bus address space. - * This is OK since the PROM did not assign any BAR addresses. - * - * Only release all the PCI bus addresses once. - * - */ - if ((vendor == LINC_VENDOR_ID_NUM) && (device == LINC_DEVICE_ID_NUM)) { - iopaddr_t prom_base_addr = pcibr_soft->bs_xid << 24; - int prom_base_size = 0x1000000; - - if (!(pcibr_soft->bs_bus_addr_status & PCIBR_BUS_ADDR_MEM_FREED)) { - pciio_device_win_populate(&pcibr_soft->bs_mem_win_map, - prom_base_addr, prom_base_size); - pcibr_soft->bs_bus_addr_status |= PCIBR_BUS_ADDR_MEM_FREED; - } - - if (!(pcibr_soft->bs_bus_addr_status & PCIBR_BUS_ADDR_IO_FREED)) { - pciio_device_win_populate(&pcibr_soft->bs_io_win_map, - prom_base_addr, prom_base_size); - pcibr_soft->bs_bus_addr_status |= PCIBR_BUS_ADDR_IO_FREED; - } - } -#endif /* PIC_LATER */ - /* * If the latency timer has already been set, by prom or by the * card itself, use that value. Otherwise look at the device's @@ -742,7 +518,7 @@ pcibr_slot_info_init(vertex_hdl_t pcibr continue; } PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_CONFIG, pcibr_vhdl, - "pcibr_slot_info_init: PCI-X capability at 0x%x for " + "pcibr_slot_info_init: PCI-X capability at 0x%lx for " "slot=%d, func=%d\n", pcix_cap, PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func)); } else { @@ -958,7 +734,6 @@ pcibr_slot_pcix_rbar_init(pcibr_soft_t p { pcibr_info_h pcibr_infoh; pcibr_info_t pcibr_info; - char tmp_str[256]; int nfunc; int func; @@ -1032,21 +807,14 @@ pcibr_slot_pcix_rbar_init(pcibr_soft_t p pcibr_soft->bs_pcix_rbar_avail -= num_rbar; pcix_cmdreg_p->max_mem_read_cnt = pcix_statreg_p->max_mem_read_cnt; } - /* - * The kernel only allows functions to have so many variable args, - * attempting to call PCIBR_DEBUG_ALWAYS() with more than 5 printf - * arguments fails so sprintf() it into a temporary string. - */ - if (pcibr_debug_mask & PCIBR_DEBUG_RBAR) { - sprintf(tmp_str,"\t %d/%d \t %d \t %d \t %d \t %d\n", - PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func, - max_splittrans_to_numbuf[pcix_statreg_p->max_out_split], - max_splittrans_to_numbuf[pcix_cmdreg_p->max_split], - pcibr_soft->bs_pcix_rbar_inuse, - pcibr_soft->bs_pcix_rbar_avail); - PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RBAR, pcibr_soft->bs_vhdl, - "%s", tmp_str)); - } + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RBAR, pcibr_soft->bs_vhdl, + "\t %d/%d \t %d \t %d \t %d \t %d\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func, + max_splittrans_to_numbuf[pcix_statreg_p->max_out_split], + max_splittrans_to_numbuf[pcix_cmdreg_p->max_split], + pcibr_soft->bs_pcix_rbar_inuse, + pcibr_soft->bs_pcix_rbar_avail)); } return(0); } @@ -1111,8 +879,7 @@ pcibr_slot_addr_space_init(vertex_hdl_t * the entire "lo" area is only a * megabyte, total ... */ - align_slot = 0x100000; - align = align_slot; + align_slot = (slot < 2) ? 0x200000 : 0x100000; for (func = 0; func < nfunc; ++func) { cfg_p cfgw; @@ -1120,9 +887,6 @@ pcibr_slot_addr_space_init(vertex_hdl_t pciio_space_t space; iopaddr_t base; size_t size; -#ifdef PCI_LATER - char tmp_str[256]; -#endif unsigned pci_cfg_cmd_reg; unsigned pci_cfg_cmd_reg_add = 0; @@ -1151,22 +915,14 @@ pcibr_slot_addr_space_init(vertex_hdl_t continue; if (base >= size) { - /* - * The kernel only allows functions to have so many variable - * args attempting to call PCIBR_DEBUG_ALWAYS() with more than - * 5 printf arguments fails so sprintf() it into a temporary - * string (tmp_str). - */ -#if defined(SUPPORT_PRINTING_R_FORMAT) - if (pcibr_debug_mask & PCIBR_DEBUG_BAR) { - sprintf(tmp_str, "pcibr_slot_addr_space_init: slot=%d, " - "func=%d win %d is in %r [0x%x..0x%x], allocated by " - "prom\n", PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), - func, win, space, space_desc, base, base + size - 1); - PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl, - "%s",tmp_str)); - } -#endif /* SUPPORT_PRINTING_R_FORMAT */ + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl, + "pcibr_slot_addr_space_init: slot=%d, " + "func=%d win %d is in space %s [0x%lx..0x%lx], " + "allocated by prom\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func, win, + pci_space[space], (uint64_t)base, + (uint64_t)(base + size - 1))); + continue; /* already allocated */ } @@ -1217,28 +973,20 @@ pcibr_slot_addr_space_init(vertex_hdl_t pcibr_info->f_window[win].w_base = base; do_pcibr_config_set(wptr, (win * 4), 4, base); -#if defined(SUPPORT_PRINTING_R_FORMAT) - if (pcibr_debug_mask & PCIBR_DEBUG_BAR) { - if (base >= size) { - sprintf(tmp_str,"pcibr_slot_addr_space_init: slot=%d, func=" - "%d, win %d is in %r[0x%x..0x%x], " - "allocated by pcibr\n", - PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), - func, win, space, space_desc, base, - base + size - 1); - PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl, - "%s",tmp_str)); - } - else { - sprintf(tmp_str,"pcibr_slot_addr_space_init: slot=%d, func=" - "%d, win %d, unable to alloc 0x%x in %r\n", - PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), - func, win, size, space, space_desc); - PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl, - "%s",tmp_str)); - } + if (base >= size) { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl, + "pcibr_slot_addr_space_init: slot=%d, func=%d. win %d " + "is in space %s [0x%lx..0x%lx], allocated by pcibr\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func, win, + pci_space[space], (uint64_t)base, + (uint64_t)(base + size - 1))); + } else { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl, + "pcibr_slot_addr_space_init: slot=%d, func=%d, win %d, " + "unable to alloc 0x%lx in space %s\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func, win, + (uint64_t)size, pci_space[space])); } -#endif /* SUPPORT_PRINTING_R_FORMAT */ } /* next base */ /* @@ -1298,11 +1046,6 @@ pcibr_slot_addr_space_init(vertex_hdl_t pci_cfg_cmd_reg_add |= PCI_CMD_BUS_MASTER; pci_cfg_cmd_reg = do_pcibr_config_get(cfgw, PCI_CFG_COMMAND, 4); - -#if PCI_FBBE /* XXX- check here to see if dev can do fast-back-to-back */ - if (!((pci_cfg_cmd_reg >> 16) & PCI_STAT_F_BK_BK_CAP)) - fast_back_to_back_enable = 0; -#endif pci_cfg_cmd_reg &= 0xFFFF; if (pci_cfg_cmd_reg_add & ~pci_cfg_cmd_reg) do_pcibr_config_set(cfgw, PCI_CFG_COMMAND, 4, @@ -1354,12 +1097,6 @@ pcibr_slot_device_init(vertex_hdl_t pcib devreg |= BRIDGE_DEV_COH | BRIDGE_DEV_VIRTUAL_EN; pcibr_soft->bs_slot[slot].bss_device = devreg; bridge->b_device[slot].reg = devreg; - -#ifdef PIC_LATER - PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DEVREG, pcibr_vhdl, - "pcibr_slot_device_init: Device(%d): %R\n", - slot, devreg, device_bits)); -#endif return(0); } @@ -1451,16 +1188,10 @@ pcibr_slot_call_device_attach(vertex_hdl pcibr_info_t pcibr_info; int func; vertex_hdl_t xconn_vhdl, conn_vhdl; -#ifdef PIC_LATER - vertex_hdl_t scsi_vhdl; -#endif int nfunc; int error_func; int error_slot = 0; int error = ENODEV; -#ifdef PIC_LATER - int hwg_err; -#endif pcibr_soft = pcibr_soft_get(pcibr_vhdl); @@ -1491,43 +1222,13 @@ pcibr_slot_call_device_attach(vertex_hdl conn_vhdl = pcibr_info->f_vertex; - error_func = pciio_device_attach(conn_vhdl, drv_flags); -#ifdef PIC_LATER - /* - * Try to assign well-known SCSI controller numbers for hot-plug - * insert - */ - if (drv_flags) { - - hwg_err = hwgraph_path_lookup(conn_vhdl, EDGE_LBL_SCSI_CTLR "/0", - &scsi_vhdl, NULL); - - if (hwg_err == GRAPH_SUCCESS) - scsi_ctlr_nums_add(baseio_pci_vhdl, scsi_vhdl); - - /* scsi_vhdl will be the final vertex in either the complete path - * on success or a partial path on failure; in either case, - * unreference that vertex. - */ - hwgraph_vertex_unref(scsi_vhdl); - - hwg_err = hwgraph_path_lookup(conn_vhdl, EDGE_LBL_SCSI_CTLR "/1", - &scsi_vhdl, NULL); - - if (hwg_err == GRAPH_SUCCESS) - scsi_ctlr_nums_add(baseio_pci_vhdl, scsi_vhdl); - - /* scsi_vhdl will be the final vertex in either the complete path - * on success or a partial path on failure; in either case, - * unreference that vertex. - */ - hwgraph_vertex_unref(scsi_vhdl); - - } -#endif /* PIC_LATER */ - + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DEV_ATTACH, pcibr_vhdl, + "pcibr_slot_call_device_attach: slot=%d, func=%d " + "drv_flags=0x%x, pciio_device_attach returned %d\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func, + drv_flags, error_func)); pcibr_info->f_att_det_error = error_func; if (error_func) @@ -1606,6 +1307,12 @@ pcibr_slot_call_device_detach(vertex_hdl error_func = pciio_device_detach(conn_vhdl, drv_flags); + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DEV_DETACH, pcibr_vhdl, + "pcibr_slot_call_device_detach: slot=%d, func=%d " + "drv_flags=0x%x, pciio_device_detach returned %d\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func, + drv_flags, error_func)); + pcibr_info->f_att_det_error = error_func; if (error_func) @@ -1646,9 +1353,6 @@ pcibr_slot_attach(vertex_hdl_t pcibr_vhd int *sub_errorp) { pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl); -#ifdef PIC_LATER - timespec_t ts; -#endif int error; /* Do not allow a multi-function card to be hot-plug inserted */ @@ -1780,7 +1484,7 @@ pcibr_device_info_free(vertex_hdl_t pcib int nfunc = slotp->bss_ninfo; int bar; int devio_index; - int s; + unsigned long s; unsigned cmd_reg; diff -puN include/asm-ia64/sn/klconfig.h~sn60 include/asm-ia64/sn/klconfig.h --- 25/include/asm-ia64/sn/klconfig.h~sn60 Thu Jan 8 15:25:26 2004 +++ 25-akpm/include/asm-ia64/sn/klconfig.h Thu Jan 8 15:25:26 2004 @@ -689,7 +689,6 @@ extern int config_find_nic_hub(nasid_t, extern int config_find_xbow(nasid_t, lboard_t **, klxbow_t**); extern int update_klcfg_cpuinfo(nasid_t, int); extern void board_to_path(lboard_t *brd, char *path); -extern moduleid_t get_module_id(nasid_t nasid); extern void nic_name_convert(char *old_name, char *new_name); extern int module_brds(nasid_t nasid, lboard_t **module_brds, int n); extern lboard_t *brd_from_key(uint64_t key); diff -puN include/asm-ia64/sn/sn2/sn_private.h~sn60 include/asm-ia64/sn/sn2/sn_private.h --- 25/include/asm-ia64/sn/sn2/sn_private.h~sn60 Thu Jan 8 15:25:26 2004 +++ 25-akpm/include/asm-ia64/sn/sn2/sn_private.h Thu Jan 8 15:25:26 2004 @@ -24,7 +24,8 @@ extern __psunsigned_t get_master_bridge_ extern int check_nasid_equiv(nasid_t, nasid_t); extern char get_console_pcislot(void); -extern int is_master_baseio_nasid_widget(nasid_t test_nasid, xwidgetnum_t test_wid); +extern int is_master_baseio_nasid_widget(nasid_t test_nasid, + xwidgetnum_t test_wid); /* memsupport.c */ extern void poison_state_alter_range(__psunsigned_t start, int len, int poison); @@ -42,7 +43,7 @@ extern int is_POISONED_dir_state(paddr_t extern int is_UNOWNED_dir_state(paddr_t); #ifdef LATER extern void get_dir_ent(paddr_t paddr, int *state, - uint64_t *vec_ptr, hubreg_t *elo); + uint64_t * vec_ptr, hubreg_t * elo); #endif /* intr.c */ @@ -56,10 +57,11 @@ extern void setrtvector(intr_func_t); extern void install_cpuintr(cpuid_t cpu); extern void install_dbgintr(cpuid_t cpu); extern void install_tlbintr(cpuid_t cpu); -extern void hub_migrintr_init(cnodeid_t /*cnode*/); -extern int cause_intr_connect(int level, intr_func_t handler, uint intr_spl_mask); +extern void hub_migrintr_init(cnodeid_t /*cnode */ ); +extern int cause_intr_connect(int level, intr_func_t handler, + unsigned int intr_spl_mask); extern int cause_intr_disconnect(int level); -extern void intr_dumpvec(cnodeid_t cnode, void (*pf)(char *, ...)); +extern void intr_dumpvec(cnodeid_t cnode, void (*pf) (char *, ...)); /* error_dump.c */ extern char *hub_rrb_err_type[]; @@ -89,10 +91,10 @@ extern void setup_replication_mask(int m /* init.c */ extern cnodeid_t get_compact_nodeid(void); /* get compact node id */ -extern void init_platform_nodepda(nodepda_t *npda, cnodeid_t node); +extern void init_platform_nodepda(nodepda_t * npda, cnodeid_t node); extern int is_fine_dirmode(void); extern void update_node_information(cnodeid_t); - + /* shubio.c */ extern void hubio_init(void); extern void hub_merge_clean(nasid_t nasid); @@ -100,14 +102,14 @@ extern void hub_set_piomode(nasid_t nasi /* shuberror.c */ extern void hub_error_init(cnodeid_t); -extern void dump_error_spool(cpuid_t cpu, void (*pf)(char *, ...)); +extern void dump_error_spool(cpuid_t cpu, void (*pf) (char *, ...)); extern void hubni_error_handler(char *, int); extern int check_ni_errors(void); /* Used for debugger to signal upper software a breakpoint has taken place */ -extern void *debugger_update; -extern __psunsigned_t debugger_stopped; +extern void *debugger_update; +extern __psunsigned_t debugger_stopped; /* * piomap, created by shub_pio_alloc. @@ -115,11 +117,11 @@ extern __psunsigned_t debugger_stopped; * xtalk_piomap_s by generic xtalk routines. */ struct hub_piomap_s { - struct xtalk_piomap_s hpio_xtalk_info;/* standard crosstalk pio info */ - vertex_hdl_t hpio_hub; /* which shub's mapping registers are set up */ - short hpio_holdcnt; /* count of current users of bigwin mapping */ - char hpio_bigwin_num;/* if big window map, which one */ - int hpio_flags; /* defined below */ + struct xtalk_piomap_s hpio_xtalk_info; /* standard crosstalk pio info */ + vertex_hdl_t hpio_hub; /* which shub's mapping registers are set up */ + short hpio_holdcnt; /* count of current users of bigwin mapping */ + char hpio_bigwin_num; /* if big window map, which one */ + int hpio_flags; /* defined below */ }; /* hub_piomap flags */ #define HUB_PIOMAP_IS_VALID 0x1 @@ -136,9 +138,9 @@ struct hub_piomap_s { * xtalk_dmamap_s by generic xtalk routines. */ struct hub_dmamap_s { - struct xtalk_dmamap_s hdma_xtalk_info;/* standard crosstalk dma info */ - vertex_hdl_t hdma_hub; /* which shub we go through */ - int hdma_flags; /* defined below */ + struct xtalk_dmamap_s hdma_xtalk_info; /* standard crosstalk dma info */ + vertex_hdl_t hdma_hub; /* which shub we go through */ + int hdma_flags; /* defined below */ }; /* shub_dmamap flags */ #define HUB_DMAMAP_IS_VALID 0x1 @@ -151,29 +153,29 @@ struct hub_dmamap_s { * xtalk_intr_s by generic xtalk routines. */ struct hub_intr_s { - struct xtalk_intr_s i_xtalk_info; /* standard crosstalk intr info */ - cpuid_t i_cpuid; /* which cpu */ - int i_bit; /* which bit */ - int i_flags; + struct xtalk_intr_s i_xtalk_info; /* standard crosstalk intr info */ + cpuid_t i_cpuid; /* which cpu */ + int i_bit; /* which bit */ + int i_flags; }; /* flag values */ #define HUB_INTR_IS_ALLOCED 0x1 /* for debug: allocated */ #define HUB_INTR_IS_CONNECTED 0x4 /* for debug: connected to a software driver */ typedef struct hubinfo_s { - nodepda_t *h_nodepda; /* pointer to node's private data area */ - cnodeid_t h_cnodeid; /* compact nodeid */ - nasid_t h_nasid; /* nasid */ + nodepda_t *h_nodepda; /* pointer to node's private data area */ + cnodeid_t h_cnodeid; /* compact nodeid */ + nasid_t h_nasid; /* nasid */ /* structures for PIO management */ - xwidgetnum_t h_widgetid; /* my widget # (as viewed from xbow) */ - struct hub_piomap_s h_small_window_piomap[HUB_WIDGET_ID_MAX+1]; - wait_queue_head_t h_bwwait; /* wait for big window to free */ - spinlock_t h_bwlock; /* guard big window piomap's */ - spinlock_t h_crblock; /* gaurd CRB error handling */ - int h_num_big_window_fixed; /* count number of FIXED maps */ - struct hub_piomap_s h_big_window_piomap[HUB_NUM_BIG_WINDOW]; - hub_intr_t hub_ii_errintr; + xwidgetnum_t h_widgetid; /* my widget # (as viewed from xbow) */ + struct hub_piomap_s h_small_window_piomap[HUB_WIDGET_ID_MAX + 1]; + wait_queue_head_t h_bwwait; /* wait for big window to free */ + spinlock_t h_bwlock; /* guard big window piomap's */ + spinlock_t h_crblock; /* gaurd CRB error handling */ + int h_num_big_window_fixed; /* count number of FIXED maps */ + struct hub_piomap_s h_big_window_piomap[HUB_NUM_BIG_WINDOW]; + hub_intr_t hub_ii_errintr; } *hubinfo_t; #define hubinfo_get(vhdl, infoptr) ((void)hwgraph_info_get_LBL \ @@ -191,10 +193,10 @@ typedef struct hubinfo_s { (&hinfo->h_big_window_piomap[win]) #define hubinfo_swin_piomap_get(hinfo, win) \ (&hinfo->h_small_window_piomap[win]) - + /* cpu-specific information stored under INFO_LBL_CPU_INFO */ typedef struct cpuinfo_s { - cpuid_t ci_cpuid; /* CPU ID */ + cpuid_t ci_cpuid; /* CPU ID */ } *cpuinfo_t; #define cpuinfo_get(vhdl, infoptr) ((void)hwgraph_info_get_LBL \ @@ -230,15 +232,15 @@ extern void sysctlr_keepalive(void); */ #define paddr_dimm(_pa) ((_pa & MD_BANK_MASK) >> MD_BANK_SHFT) #define paddr_cnode(_pa) (NASID_TO_COMPACT_NODEID(NASID_GET(_pa))) -extern void membank_pathname_get(paddr_t,char *); +extern void membank_pathname_get(paddr_t, char *); /* To redirect the output into the error buffer */ #define errbuf_print(_s) printf("#%s",_s) -extern void crbx(nasid_t nasid, void (*pf)(char *, ...)); +extern void crbx(nasid_t nasid, void (*pf) (char *, ...)); void bootstrap(void); /* sndrv.c */ extern int sndrv_attach(vertex_hdl_t vertex); -#endif /* _ASM_IA64_SN_SN2_SN_PRIVATE_H */ +#endif /* _ASM_IA64_SN_SN2_SN_PRIVATE_H */ _