From: Pat Gefre Fix the last patch - missed an IS_PIC_SOFT and needed the CG definition Header file clean up Added some __init definitions for functions that were init only Removed some 'porting' code - replaced it with linux calls/defintions Cleaned up some of the types we were using (ones that had been added) Fixed include files that had the wrong path in their ifdef'd names --- 25-akpm/arch/ia64/sn/io/machvec/pci_bus_cvlink.c | 80 ++++++------------ 25-akpm/arch/ia64/sn/io/machvec/pci_dma.c | 22 ----- 25-akpm/arch/ia64/sn/io/sn2/klgraph.c | 56 ++++++------ 25-akpm/arch/ia64/sn/io/sn2/ml_SN_init.c | 2 25-akpm/arch/ia64/sn/io/sn2/ml_iograph.c | 29 ++---- 25-akpm/arch/ia64/sn/io/sn2/module.c | 14 +-- 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_ate.c | 23 ----- 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_config.c | 15 --- 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c | 32 +------ 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_error.c | 29 ++---- 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_hints.c | 10 -- 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_intr.c | 22 +---- 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_rrb.c | 10 -- 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c | 19 ---- 25-akpm/arch/ia64/sn/io/sn2/pciio.c | 12 +- 25-akpm/arch/ia64/sn/io/sn2/pic.c | 20 +--- 25-akpm/arch/ia64/sn/io/sn2/shub.c | 5 - 25-akpm/arch/ia64/sn/io/sn2/shuberror.c | 2 25-akpm/arch/ia64/sn/io/sn2/xtalk.c | 4 25-akpm/arch/ia64/sn/kernel/irq.c | 1 25-akpm/arch/ia64/sn/kernel/sn2/cache.c | 5 - 25-akpm/include/asm-ia64/sn/addrs.h | 20 ---- 25-akpm/include/asm-ia64/sn/cdl.h | 2 25-akpm/include/asm-ia64/sn/clksupport.h | 3 25-akpm/include/asm-ia64/sn/dmamap.h | 26 ------ 25-akpm/include/asm-ia64/sn/geo.h | 6 - 25-akpm/include/asm-ia64/sn/hcl.h | 4 25-akpm/include/asm-ia64/sn/hcl_util.h | 2 25-akpm/include/asm-ia64/sn/hwgfs.h | 8 - 25-akpm/include/asm-ia64/sn/ioconfig_bus.h | 5 + 25-akpm/include/asm-ia64/sn/ioerror_handling.h | 4 25-akpm/include/asm-ia64/sn/klconfig.h | 6 - 25-akpm/include/asm-ia64/sn/ksys/elsc.h | 6 - 25-akpm/include/asm-ia64/sn/ksys/l1.h | 6 - 25-akpm/include/asm-ia64/sn/nodepda.h | 1 25-akpm/include/asm-ia64/sn/pci/bridge.h | 5 - 25-akpm/include/asm-ia64/sn/pci/pci_bus_cvlink.h | 6 - 25-akpm/include/asm-ia64/sn/pci/pci_defs.h | 70 +++++++--------- 25-akpm/include/asm-ia64/sn/pci/pcibr.h | 18 ++-- 25-akpm/include/asm-ia64/sn/pci/pcibr_private.h | 21 +--- 25-akpm/include/asm-ia64/sn/pci/pciio.h | 33 ++++++- 25-akpm/include/asm-ia64/sn/pci/pciio_private.h | 8 - 25-akpm/include/asm-ia64/sn/pci/pic.h | 26 +----- 25-akpm/include/asm-ia64/sn/pda.h | 1 25-akpm/include/asm-ia64/sn/pio.h | 4 25-akpm/include/asm-ia64/sn/sgi.h | 95 +--------------------- 25-akpm/include/asm-ia64/sn/sn2/addrs.h | 15 +-- 25-akpm/include/asm-ia64/sn/sn2/geo.h | 6 - 25-akpm/include/asm-ia64/sn/sn2/shub_md.h | 7 - 25-akpm/include/asm-ia64/sn/xtalk/xbow.h | 6 - 25-akpm/include/asm-ia64/sn/xtalk/xbow_info.h | 4 25-akpm/include/asm-ia64/sn/xtalk/xswitch.h | 6 - 25-akpm/include/asm-ia64/sn/xtalk/xtalk.h | 10 +- 25-akpm/include/asm-ia64/sn/xtalk/xtalk_private.h | 6 - 25-akpm/include/asm-ia64/sn/xtalk/xtalkaddrs.h | 6 - 25-akpm/include/asm-ia64/sn/xtalk/xwidget.h | 10 +- 56 files changed, 292 insertions(+), 582 deletions(-) diff -puN arch/ia64/sn/io/machvec/pci_bus_cvlink.c~sn18 arch/ia64/sn/io/machvec/pci_bus_cvlink.c --- 25/arch/ia64/sn/io/machvec/pci_bus_cvlink.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/machvec/pci_bus_cvlink.c Thu Jan 8 15:18:51 2004 @@ -6,36 +6,11 @@ * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ -#include -#include -#include -#include -#include -#include -#include -#include +#include #include -#include -#include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include #include -#include #include -#include extern int bridge_rev_b_data_check_disable; @@ -195,12 +170,13 @@ printk("set_flush_addresses: xbow_buf_sy struct sn_flush_nasid_entry flush_nasid_list[MAX_NASIDS]; -// Initialize the data structures for flushing write buffers after a PIO read. -// The theory is: -// Take an unused int. pin and associate it with a pin that is in use. -// After a PIO read, force an interrupt on the unused pin, forcing a write buffer flush -// on the in use pin. This will prevent the race condition between PIO read responses and -// DMA writes. +/* Initialize the data structures for flushing write buffers after a PIO read. + * The theory is: + * Take an unused int. pin and associate it with a pin that is in use. + * After a PIO read, force an interrupt on the unused pin, forcing a write buffer flush + * on the in use pin. This will prevent the race condition between PIO read responses and + * DMA writes. + */ void sn_dma_flush_init(unsigned long start, unsigned long end, int idx, int pin, int slot) { nasid_t nasid; @@ -293,8 +269,9 @@ sn_dma_flush_init(unsigned long start, u } } - // if it's IO9, bus 1, we don't care about slots 1, 3, and 4. This is - // because these are the IOC4 slots and we don't flush them. + /* if it's IO9, bus 1, we don't care about slots 1 and 4. This is + * because these are the IOC4 slots and we don't flush them. + */ if (isIO9(nasid) && bus == 0 && (slot == 1 || slot == 4)) { return; } @@ -331,23 +308,24 @@ sn_dma_flush_init(unsigned long start, u } b = (bridge_t *)(NODE_SWIN_BASE(nasid, wid_num) | (bus << 23) ); - // If it's IO9, then slot 2 maps to slot 7 and slot 6 maps to slot 8. - // To see this is non-trivial. By drawing pictures and reading manuals and talking - // to HW guys, we can see that on IO9 bus 1, slots 7 and 8 are always unused. - // Further, since we short-circuit slots 1, 3, and 4 above, we only have to worry - // about the case when there is a card in slot 2. A multifunction card will appear - // to be in slot 6 (from an interrupt point of view) also. That's the most we'll - // have to worry about. A four function card will overload the interrupt lines in - // slot 2 and 6. - // We also need to special case the 12160 device in slot 3. Fortunately, we have - // a spare intr. line for pin 4, so we'll use that for the 12160. - // All other buses have slot 3 and 4 and slots 7 and 8 unused. Since we can only - // see slots 1 and 2 and slots 5 and 6 coming through here for those buses (this - // is true only on Pxbricks with 2 physical slots per bus), we just need to add - // 2 to the slot number to find an unused slot. - // We have convinced ourselves that we will never see a case where two different cards - // in two different slots will ever share an interrupt line, so there is no need to - // special case this. + /* If it's IO9, then slot 2 maps to slot 7 and slot 6 maps to slot 8. + * To see this is non-trivial. By drawing pictures and reading manuals and talking + * to HW guys, we can see that on IO9 bus 1, slots 7 and 8 are always unused. + * Further, since we short-circuit slots 1, 3, and 4 above, we only have to worry + * about the case when there is a card in slot 2. A multifunction card will appear + * to be in slot 6 (from an interrupt point of view) also. That's the most we'll + * have to worry about. A four function card will overload the interrupt lines in + * slot 2 and 6. + * We also need to special case the 12160 device in slot 3. Fortunately, we have + * a spare intr. line for pin 4, so we'll use that for the 12160. + * All other buses have slot 3 and 4 and slots 7 and 8 unused. Since we can only + * see slots 1 and 2 and slots 5 and 6 coming through here for those buses (this + * is true only on Pxbricks with 2 physical slots per bus), we just need to add + * 2 to the slot number to find an unused slot. + * We have convinced ourselves that we will never see a case where two different cards + * in two different slots will ever share an interrupt line, so there is no need to + * special case this. + */ if (isIO9(nasid) && wid_num == 0xc && bus == 0) { if (slot == 2) { diff -puN arch/ia64/sn/io/machvec/pci_dma.c~sn18 arch/ia64/sn/io/machvec/pci_dma.c --- 25/arch/ia64/sn/io/machvec/pci_dma.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/machvec/pci_dma.c Thu Jan 8 15:18:51 2004 @@ -9,24 +9,7 @@ * a description of how these routines should be used. */ -#include -#include -#include -#include -#include -#include #include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include #include /* @@ -128,10 +111,7 @@ find_sn_dma_map(dma_addr_t dma_addr, uns * * This interface is usually used for "command" streams (e.g. the command * queue for a SCSI controller). See Documentation/DMA-mapping.txt for - * more information. Note that this routine will always put a 32 bit - * DMA address into @dma_handle. This is because most devices - * that are capable of 64 bit PCI DMA transactions can't do 64 bit _coherent_ - * DMAs, and unfortunately this interface has to cater to the LCD. Oh well. + * more information. * * Also known as platform_pci_alloc_consistent() by the IA64 machvec code. */ diff -puN arch/ia64/sn/io/sn2/klgraph.c~sn18 arch/ia64/sn/io/sn2/klgraph.c --- 25/arch/ia64/sn/io/sn2/klgraph.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/klgraph.c Thu Jan 8 15:18:51 2004 @@ -14,19 +14,15 @@ #include #include +#include #include #include -#include #include #include -#include -#include -#include -#include -#include #include +#include -// #define KLGRAPH_DEBUG 1 +/* #define KLGRAPH_DEBUG 1 */ #ifdef KLGRAPH_DEBUG #define GRPRINTF(x) printk x #define CE_GRPANIC CE_PANIC @@ -43,7 +39,7 @@ void mark_cpuvertex_as_cpu(vertex_hdl_t /* ARGSUSED */ -void +static void __init klhwg_add_hub(vertex_hdl_t node_vertex, klhub_t *hub, cnodeid_t cnode) { vertex_hdl_t myhubv; @@ -62,7 +58,7 @@ klhwg_add_hub(vertex_hdl_t node_vertex, } /* ARGSUSED */ -void +static void __init klhwg_add_disabled_cpu(vertex_hdl_t node_vertex, cnodeid_t cnode, klcpu_t *cpu, slotid_t slot) { vertex_hdl_t my_cpu; @@ -83,7 +79,7 @@ klhwg_add_disabled_cpu(vertex_hdl_t node } /* ARGSUSED */ -void +static void __init klhwg_add_cpu(vertex_hdl_t node_vertex, cnodeid_t cnode, klcpu_t *cpu) { vertex_hdl_t my_cpu, cpu_dir; @@ -112,7 +108,7 @@ klhwg_add_cpu(vertex_hdl_t node_vertex, } -void +static void __init klhwg_add_xbow(cnodeid_t cnode, nasid_t nasid) { lboard_t *brd; @@ -123,6 +119,7 @@ klhwg_add_xbow(cnodeid_t cnode, nasid_t vertex_hdl_t xbow_v, hubv; /*REFERENCED*/ graph_error_t err; + extern int is_specified(char *s); if ((brd = find_lboard((lboard_t *)KL_CONFIG_INFO(nasid), KLTYPE_IOBRICK_XBOW)) == NULL) return; @@ -161,7 +158,7 @@ klhwg_add_xbow(cnodeid_t cnode, nasid_t printk(KERN_WARNING "klhwg_add_xbow: Check for " "working routers and router links!"); - PRINT_PANIC("klhwg_add_xbow: Failed to add " + panic("klhwg_add_xbow: Failed to add " "edge: vertex 0x%p to vertex 0x%p," "error %d\n", (void *)hubv, (void *)xbow_v, err); @@ -187,7 +184,7 @@ klhwg_add_xbow(cnodeid_t cnode, nasid_t /* ARGSUSED */ -void +static void __init klhwg_add_node(vertex_hdl_t hwgraph_root, cnodeid_t cnode) { nasid_t nasid; @@ -217,7 +214,7 @@ klhwg_add_node(vertex_hdl_t hwgraph_root rv = hwgraph_path_add(hwgraph_root, path_buffer, &node_vertex); if (rv != GRAPH_SUCCESS) - PRINT_PANIC("Node vertex creation failed. " + panic("Node vertex creation failed. " "Path == %s", path_buffer); @@ -290,7 +287,7 @@ klhwg_add_node(vertex_hdl_t hwgraph_root /* ARGSUSED */ -void +static void __init klhwg_add_all_routers(vertex_hdl_t hwgraph_root) { nasid_t nasid; @@ -333,7 +330,7 @@ klhwg_add_all_routers(vertex_hdl_t hwgra rv = hwgraph_path_add(hwgraph_root, path_buffer, &node_vertex); if (rv != GRAPH_SUCCESS) - PRINT_PANIC("Router vertex creation " + panic("Router vertex creation " "failed. Path == %s", path_buffer); @@ -349,7 +346,7 @@ klhwg_add_all_routers(vertex_hdl_t hwgra } /* ARGSUSED */ -void +static void __init klhwg_connect_one_router(vertex_hdl_t hwgraph_root, lboard_t *brd, cnodeid_t cnode, nasid_t nasid) { @@ -385,7 +382,7 @@ klhwg_connect_one_router(vertex_hdl_t hw /* We don't know what to do with multiple router components */ if (brd->brd_numcompts != 1) { - PRINT_PANIC("klhwg_connect_one_router: %d cmpts on router\n", + panic("klhwg_connect_one_router: %d cmpts on router\n", brd->brd_numcompts); return; } @@ -419,7 +416,7 @@ klhwg_connect_one_router(vertex_hdl_t hw if (rc != GRAPH_SUCCESS) { if (is_specified(arg_maxnodes) && KL_CONFIG_DUPLICATE_BOARD(dest_brd)) continue; - PRINT_PANIC("Can't find router: %s", dest_path); + panic("Can't find router: %s", dest_path); } GRPRINTF(("klhwg_connect_one_router: Link from %s/%d to %s\n", path_buffer, port, dest_path)); @@ -436,14 +433,14 @@ klhwg_connect_one_router(vertex_hdl_t hw } if (rc != GRAPH_SUCCESS && !is_specified(arg_maxnodes)) - PRINT_PANIC("Can't create edge: %s/%s to vertex 0x%p error 0x%x\n", + panic("Can't create edge: %s/%s to vertex 0x%p error 0x%x\n", path_buffer, dest_path, (void *)dest_hndl, rc); } } -void +static void __init klhwg_connect_routers(vertex_hdl_t hwgraph_root) { nasid_t nasid; @@ -476,7 +473,7 @@ klhwg_connect_routers(vertex_hdl_t hwgra -void +static void __init klhwg_connect_hubs(vertex_hdl_t hwgraph_root) { nasid_t nasid; @@ -534,7 +531,7 @@ klhwg_connect_hubs(vertex_hdl_t hwgraph_ if (rc != GRAPH_SUCCESS) { if (is_specified(arg_maxnodes) && KL_CONFIG_DUPLICATE_BOARD(dest_brd)) continue; - PRINT_PANIC("Can't find board: %s", dest_path); + panic("Can't find board: %s", dest_path); } else { char buf[1024]; @@ -549,7 +546,7 @@ klhwg_connect_hubs(vertex_hdl_t hwgraph_ rc = hwgraph_edge_add(hub_hndl, dest_hndl, buf); if (rc != GRAPH_SUCCESS) - PRINT_PANIC("Can't create edge: %s/%s to vertex 0x%p, error 0x%x\n", + panic("Can't create edge: %s/%s to vertex 0x%p, error 0x%x\n", path_buffer, dest_path, (void *)dest_hndl, rc); } @@ -561,7 +558,7 @@ klhwg_connect_hubs(vertex_hdl_t hwgraph_ * hints which can later be used by the drivers using the device/driver * admin interface. */ -void +static void __init klhwg_device_disable_hints_add(void) { cnodeid_t cnode; /* node we are looking at */ @@ -620,7 +617,7 @@ klhwg_device_disable_hints_add(void) } } -void +void __init klhwg_add_all_modules(vertex_hdl_t hwgraph_root) { cmoduleid_t cm; @@ -654,14 +651,13 @@ klhwg_add_all_modules(vertex_hdl_t hwgra ASSERT_ALWAYS(rc == GRAPH_SUCCESS); rc = rc; - hwgraph_info_add_LBL(vhdl, - INFO_LBL_ELSC, - (arbitrary_info_t) (__psint_t) 1); + hwgraph_info_add_LBL(vhdl, INFO_LBL_ELSC, + (arbitrary_info_t)1); } } -void +void __init klhwg_add_all_nodes(vertex_hdl_t hwgraph_root) { cnodeid_t cnode; diff -puN arch/ia64/sn/io/sn2/ml_iograph.c~sn18 arch/ia64/sn/io/sn2/ml_iograph.c --- 25/arch/ia64/sn/io/sn2/ml_iograph.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/ml_iograph.c Thu Jan 8 15:18:51 2004 @@ -6,27 +6,16 @@ * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ -#include -#include #include #include #include -#include -#include #include #include #include -#include -#include -#include -#include #include -#include -#include -#include -#include -#include +#include #include +#include /* #define IOGRAPH_DEBUG */ #ifdef IOGRAPH_DEBUG @@ -47,7 +36,7 @@ * xswitch vertex is created. */ typedef struct xswitch_vol_s { - mutex_t xswitch_volunteer_mutex; + struct semaphore xswitch_volunteer_mutex; int xswitch_volunteer_count; vertex_hdl_t xswitch_volunteer[NUM_XSWITCH_VOLUNTEER]; } *xswitch_vol_t; @@ -110,7 +99,7 @@ volunteer_for_widgets(vertex_hdl_t xswit return; } - mutex_lock(&xvolinfo->xswitch_volunteer_mutex); + down(&xvolinfo->xswitch_volunteer_mutex); ASSERT(xvolinfo->xswitch_volunteer_count < NUM_XSWITCH_VOLUNTEER); xvolinfo->xswitch_volunteer[xvolinfo->xswitch_volunteer_count] = master; xvolinfo->xswitch_volunteer_count++; @@ -128,7 +117,7 @@ volunteer_for_widgets(vertex_hdl_t xswit xvolinfo->xswitch_volunteer[1] = hubv; } } - mutex_unlock(&xvolinfo->xswitch_volunteer_mutex); + up(&xvolinfo->xswitch_volunteer_mutex); } extern int xbow_port_io_enabled(nasid_t nasid, int widgetnum); @@ -203,7 +192,7 @@ assign_widgets_to_volunteers(vertex_hdl_ if (nasid == get_master_baseio_nasid()) goto do_assignment; } - PRINT_PANIC("Nasid == %d, console nasid == %d", + panic("Nasid == %d, console nasid == %d", nasid, get_master_baseio_nasid()); } @@ -293,7 +282,7 @@ early_probe_for_widget(vertex_hdl_t hubv * */ -void +static void io_xswitch_widget_init(vertex_hdl_t xswitchv, vertex_hdl_t hubv, xwidgetnum_t widgetnum) @@ -742,13 +731,13 @@ io_init_node(cnodeid_t cnodeid) /* Signal that we're done */ if (peer_sema) { - mutex_unlock(peer_sema); + up(peer_sema); } } else { /* Wait 'til master is done assigning widgets. */ - mutex_lock(&npdap->xbow_sema); + down(&npdap->xbow_sema); } #ifdef PROBE_TEST diff -puN arch/ia64/sn/io/sn2/ml_SN_init.c~sn18 arch/ia64/sn/io/sn2/ml_SN_init.c --- 25/arch/ia64/sn/io/sn2/ml_SN_init.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/ml_SN_init.c Thu Jan 8 15:18:51 2004 @@ -66,7 +66,7 @@ void init_platform_nodepda(nodepda_t *np npda->npda_rip_last = &npda->npda_rip_first; npda->geoid.any.type = GEO_TYPE_INVALID; - mutex_init_locked(&npda->xbow_sema); /* init it locked? */ + init_MUTEX_LOCKED(&npda->xbow_sema); /* init it locked? */ } void diff -puN arch/ia64/sn/io/sn2/module.c~sn18 arch/ia64/sn/io/sn2/module.c --- 25/arch/ia64/sn/io/sn2/module.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/module.c Thu Jan 8 15:18:51 2004 @@ -8,13 +8,14 @@ #include #include +#include +#include #include #include #include #include #include #include -#include #include #include #include @@ -119,8 +120,8 @@ module_t *module_lookup(moduleid_t id) * * The node number is added to the list of nodes in the module. */ - -module_t *module_add_node(geoid_t geoid, cnodeid_t cnodeid) +static module_t * __init +module_add_node(geoid_t geoid, cnodeid_t cnodeid) { module_t *m; int i; @@ -140,7 +141,7 @@ module_t *module_add_node(geoid_t geoid, m->id = moduleid; spin_lock_init(&m->lock); - mutex_init_locked(&m->thdcnt); + init_MUTEX(&m->thdcnt); /* Insert in sorted order by module number */ @@ -160,7 +161,8 @@ module_t *module_add_node(geoid_t geoid, return m; } -int module_probe_snum(module_t *m, nasid_t nasid) +static int __init +module_probe_snum(module_t *m, nasid_t nasid) { lboard_t *board; klmod_serial_num_t *comp; @@ -228,7 +230,7 @@ int module_probe_snum(module_t *m, nasid } } -void +void __init io_module_init(void) { cnodeid_t node; diff -puN arch/ia64/sn/io/sn2/pcibr/pcibr_ate.c~sn18 arch/ia64/sn/io/sn2/pcibr/pcibr_ate.c --- 25/arch/ia64/sn/io/sn2/pcibr/pcibr_ate.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_ate.c Thu Jan 8 15:18:51 2004 @@ -1,5 +1,4 @@ /* - * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. @@ -8,29 +7,12 @@ */ #include -#include -#include #include -#include -#include -#include #include -#include -#include -#include -#include #include #include #include #include -#include -#include -#include -#include - -#ifndef LOCAL -#define LOCAL static -#endif /* * functions @@ -61,7 +43,7 @@ void ate_thaw(pcibr_dmamap_t pcibr_dmama #define ATE_NUM_ENTRIES(n) _ate_info[n] /* Possible choices for number of ATE entries in Bridge's SSRAM */ -LOCAL int _ate_info[] = +static int _ate_info[] = { 0, /* 0 entries */ 8 * 1024, /* 8K entries */ @@ -84,7 +66,6 @@ pcibr_init_ext_ate_ram(bridge_t *bridge) int num_entries, entry; int i, j; bridgereg_t old_enable, new_enable; - int s; /* Probe SSRAM to determine its size. */ old_enable = bridge->b_int_enable; @@ -111,12 +92,10 @@ pcibr_init_ext_ate_ram(bridge_t *bridge) * The read following the write is required for the Bridge war */ - s = splhi(); bridge->b_wid_control = (bridge->b_wid_control & ~BRIDGE_CTRL_SSRAM_SIZE_MASK) | BRIDGE_CTRL_SSRAM_SIZE(largest_working_size); bridge->b_wid_control; /* inval addr bug war */ - splx(s); num_entries = ATE_NUM_ENTRIES(largest_working_size); diff -puN arch/ia64/sn/io/sn2/pcibr/pcibr_config.c~sn18 arch/ia64/sn/io/sn2/pcibr/pcibr_config.c --- 25/arch/ia64/sn/io/sn2/pcibr/pcibr_config.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_config.c Thu Jan 8 15:18:51 2004 @@ -1,5 +1,4 @@ /* - * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. @@ -8,26 +7,12 @@ */ #include -#include -#include -#include #include -#include -#include -#include #include -#include -#include -#include -#include #include #include #include #include -#include -#include -#include -#include extern pcibr_info_t pcibr_info_get(vertex_hdl_t); diff -puN arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c~sn18 arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c --- 25/arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c Thu Jan 8 15:18:51 2004 @@ -6,30 +6,18 @@ * Copyright (C) 2001-2003 Silicon Graphics, Inc. All rights reserved. */ -#include -#include #include #include #include -#include #include #include -#include -#include -#include #include -#include -#include -#include -#include -#include #include #include #include #include -#include -#include -#include + +#include #include /* @@ -955,8 +943,6 @@ pcibr_attach2(vertex_hdl_t xconn_vhdl, b picreg_t int_enable_64; unsigned rrb_fixed = 0; - int spl_level; - #if PCI_FBBE int fast_back_to_back_enable; #endif @@ -1324,7 +1310,7 @@ pcibr_attach2(vertex_hdl_t xconn_vhdl, b * for the lowest hunk of memory. */ xbase = xtalk_dmatrans_addr(xconn_vhdl, 0, - paddr, _PAGESZ, 0); + paddr, PAGE_SIZE, 0); if (xbase != XIO_NOWHERE) { if (XIO_PACKED(xbase)) { @@ -1354,7 +1340,6 @@ pcibr_attach2(vertex_hdl_t xconn_vhdl, b * ensure that we write and read without any interruption. * The read following the write is required for the Bridge war */ - spl_level = splhi(); #if IOPGSIZE == 4096 bridge->p_wid_control_64 &= ~BRIDGE_CTRL_PAGE_SIZE; #elif IOPGSIZE == 16384 @@ -1363,7 +1348,6 @@ pcibr_attach2(vertex_hdl_t xconn_vhdl, b <<>>; #endif bridge->b_wid_control; /* inval addr bug war */ - splx(spl_level); /* Initialize internal mapping entries */ for (entry = 0; entry < pcibr_soft->bs_int_ate_size; entry++) { @@ -1616,7 +1600,7 @@ pcibr_attach2(vertex_hdl_t xconn_vhdl, b /* Setup the Bus's PCI IO Root Resource. */ pcibr_soft->bs_io_win_root_resource.start = PCIBR_BUS_IO_BASE; pcibr_soft->bs_io_win_root_resource.end = 0xffffffff; - res = (struct resource *) kmalloc( sizeof(struct resource), KM_NOSLEEP); + res = (struct resource *) kmalloc( sizeof(struct resource), GFP_KERNEL); if (!res) panic("PCIBR:Unable to allocate resource structure\n"); @@ -1628,13 +1612,13 @@ pcibr_attach2(vertex_hdl_t xconn_vhdl, b panic("PCIBR:Unable to request_resource()\n"); /* Setup the Small Window Root Resource */ - pcibr_soft->bs_swin_root_resource.start = _PAGESZ; + pcibr_soft->bs_swin_root_resource.start = PAGE_SIZE; pcibr_soft->bs_swin_root_resource.end = 0x000FFFFF; /* Setup the Bus's PCI Memory Root Resource */ pcibr_soft->bs_mem_win_root_resource.start = 0x200000; pcibr_soft->bs_mem_win_root_resource.end = 0xffffffff; - res = (struct resource *) kmalloc( sizeof(struct resource), KM_NOSLEEP); + res = (struct resource *) kmalloc( sizeof(struct resource), GFP_KERNEL); if (!res) panic("PCIBR:Unable to allocate resource structure\n"); @@ -1819,7 +1803,7 @@ pcibr_detach(vertex_hdl_t xconn) pciio_device_info_unregister(pcibr_vhdl, &(pcibr_soft->bs_noslot_info->f_c)); - spin_lock_destroy(&pcibr_soft->bs_lock); +/* spin_lock_destroy(&pcibr_soft->bs_lock); */ kfree(pcibr_soft->bs_name); /* Disconnect the error interrupt and free the xtalk resources @@ -2480,7 +2464,7 @@ pcibr_piospace_alloc(vertex_hdl_t pconn_ /* * Check for proper alignment */ - ASSERT(alignment >= NBPP); + ASSERT(alignment >= PAGE_SIZE); ASSERT((alignment & (alignment - 1)) == 0); align_mask = alignment - 1; diff -puN arch/ia64/sn/io/sn2/pcibr/pcibr_error.c~sn18 arch/ia64/sn/io/sn2/pcibr/pcibr_error.c --- 25/arch/ia64/sn/io/sn2/pcibr/pcibr_error.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_error.c Thu Jan 8 15:18:51 2004 @@ -7,28 +7,20 @@ */ #include -#include -#include +#include #include -#include #include -#include #include -#include -#include -#include -#include #include #include #include #include -#include -#include -#include -#include + extern int hubii_check_widget_disabled(nasid_t, int); +#define kdebug 0 + /* ===================================================================== * ERROR HANDLING @@ -41,12 +33,9 @@ extern int hubii_check_widget_disabled(n #define BRIDGE_PIOERR_TIMEOUT 40 /* Timeout in debug mode */ #endif #else -#define BRIDGE_PIOERR_TIMEOUT 1 /* Timeout in non-debug mode */ +#define BRIDGE_PIOERR_TIMEOUT 1 /* Timeout in non-debug mode */ #endif -/* PIC has 64bit interrupt error registers, but BRIDGE has 32bit registers. - * Thus 'bridge_errors_to_dump needs' to default to the larger of the two. - */ #ifdef DEBUG #ifdef ERROR_DEBUG uint64_t bridge_errors_to_dump = ~BRIDGE_ISR_INT_MSK; @@ -138,7 +127,7 @@ static struct reg_values space_v[] {PCIIO_SPACE_BAD, "BAD"}, {0} }; -static struct reg_desc space_desc[] = +struct reg_desc space_desc[] = { {0xFF, 0, "space", 0, space_v}, {0} @@ -658,7 +647,7 @@ pcibr_error_intr_handler(int irq, void * entry = pcibr_list; while (1) { if (entry == NULL) { - PRINT_PANIC("pcibr_error_intr_handler:\tmy parameter (0x%p) is not a pcibr_soft!", arg); + panic("pcibr_error_intr_handler:\tmy parameter (0x%p) is not a pcibr_soft!", arg); } if ((intr_arg_t) entry->bl_soft == arg) break; @@ -916,11 +905,11 @@ pcibr_error_intr_handler(int irq, void * (err_status & (BRIDGE_ISR_LLP_REC_SNERR | BRIDGE_ISR_LLP_REC_CBERR))) { printk("BRIDGE ERR_STATUS 0x%lx\n", err_status); pcibr_error_dump(pcibr_soft); - PRINT_PANIC("PCI Bridge Error interrupt killed the system"); + panic("PCI Bridge Error interrupt killed the system"); } if (err_status & BRIDGE_ISR_ERROR_FATAL) { - PRINT_PANIC("PCI Bridge Error interrupt killed the system"); + panic("PCI Bridge Error interrupt killed the system"); /*NOTREACHED */ } diff -puN arch/ia64/sn/io/sn2/pcibr/pcibr_hints.c~sn18 arch/ia64/sn/io/sn2/pcibr/pcibr_hints.c --- 25/arch/ia64/sn/io/sn2/pcibr/pcibr_hints.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_hints.c Thu Jan 8 15:18:51 2004 @@ -7,18 +7,8 @@ */ #include -#include -#include #include -#include -#include -#include #include -#include -#include -#include -#include -#include #include #include #include diff -puN arch/ia64/sn/io/sn2/pcibr/pcibr_intr.c~sn18 arch/ia64/sn/io/sn2/pcibr/pcibr_intr.c --- 25/arch/ia64/sn/io/sn2/pcibr/pcibr_intr.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_intr.c Thu Jan 8 15:18:51 2004 @@ -7,23 +7,14 @@ */ #include -#include #include #include -#include -#include #include #include -#include -#include -#include -#include #include #include #include #include -#include -#include #include #include @@ -100,7 +91,7 @@ pcibr_wrap_get(pcibr_intr_cbuf_t cbuf) pcibr_intr_wrap_t wrap; if (cbuf->ib_in == cbuf->ib_out) - PRINT_PANIC( "pcibr intr circular buffer empty, cbuf=0x%p, ib_in=ib_out=%d\n", + panic( "pcibr intr circular buffer empty, cbuf=0x%p, ib_in=ib_out=%d\n", (void *)cbuf, cbuf->ib_out); wrap = cbuf->ib_cbuf[cbuf->ib_out++]; @@ -115,22 +106,21 @@ void pcibr_wrap_put(pcibr_intr_wrap_t wrap, pcibr_intr_cbuf_t cbuf) { int in; - int s; /* * Multiple CPUs could be executing this code simultaneously * if a handler has registered multiple interrupt lines and * the interrupts are directed to different CPUs. */ - s = mutex_spinlock(&cbuf->ib_lock); + spin_lock(&cbuf->ib_lock); in = (cbuf->ib_in + 1) % IBUFSIZE; if (in == cbuf->ib_out) - PRINT_PANIC( "pcibr intr circular buffer full, cbuf=0x%p, ib_in=%d\n", + panic( "pcibr intr circular buffer full, cbuf=0x%p, ib_in=%d\n", (void *)cbuf, cbuf->ib_in); cbuf->ib_cbuf[cbuf->ib_in] = wrap; cbuf->ib_in = in; - mutex_spinunlock(&cbuf->ib_lock, s); + spin_unlock(&cbuf->ib_lock); return; } @@ -337,7 +327,7 @@ pcibr_intr_alloc(vertex_hdl_t pconn_vhdl pcibr_intr->bi_mustruncpu = CPU_NONE; pcibr_intr->bi_ibuf.ib_in = 0; pcibr_intr->bi_ibuf.ib_out = 0; - mutex_spinlock_init(&pcibr_intr->bi_ibuf.ib_lock); + spin_lock_init(&pcibr_intr->bi_ibuf.ib_lock); pcibr_int_bits = pcibr_soft->bs_intr_bits((pciio_info_t)pcibr_info, lines, PCIBR_NUM_SLOTS(pcibr_soft)); @@ -845,7 +835,7 @@ pcibr_setwidint(xtalk_intr_t intr) printk(KERN_WARNING "NEW=0x%x/0x%x OLD=0x%x/0x%x\n", NEW_b_wid_int_upper, NEW_b_wid_int_lower, OLD_b_wid_int_upper, OLD_b_wid_int_lower); - PRINT_PANIC("PCI Bridge interrupt targetting error\n"); + panic("PCI Bridge interrupt targetting error\n"); } } diff -puN arch/ia64/sn/io/sn2/pcibr/pcibr_rrb.c~sn18 arch/ia64/sn/io/sn2/pcibr/pcibr_rrb.c --- 25/arch/ia64/sn/io/sn2/pcibr/pcibr_rrb.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_rrb.c Thu Jan 8 15:18:51 2004 @@ -1,5 +1,4 @@ /* - * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. @@ -8,17 +7,8 @@ */ #include -#include -#include #include -#include -#include -#include #include -#include -#include -#include -#include #include #include #include diff -puN arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c~sn18 arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c --- 25/arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c Thu Jan 8 15:18:51 2004 @@ -7,25 +7,14 @@ */ #include -#include -#include -#include #include #include -#include -#include +#include #include -#include -#include -#include -#include #include #include #include #include -#include -#include -#include #include extern pcibr_info_t pcibr_info_get(vertex_hdl_t); @@ -383,7 +372,7 @@ pcibr_slot_info_return(pcibr_soft_t slotp->resp_p_int_enable = bridge->p_int_enable_64; slotp->resp_p_int_host = bridge->p_int_addr_64[slot]; - if (COPYOUT(slotp, respp, sizeof(*respp))) { + if (copy_to_user(respp, respp, sizeof(*respp))) { return(EFAULT); } @@ -1183,8 +1172,8 @@ pcibr_slot_addr_space_init(vertex_hdl_t align = (win) ? size : align_slot; - if (align < _PAGESZ) - align = _PAGESZ; /* ie. 0x00004000 */ + if (align < PAGE_SIZE) + align = PAGE_SIZE; /* ie. 0x00004000 */ switch (space) { case PCIIO_SPACE_IO: diff -puN arch/ia64/sn/io/sn2/pciio.c~sn18 arch/ia64/sn/io/sn2/pciio.c --- 25/arch/ia64/sn/io/sn2/pciio.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/pciio.c Thu Jan 8 15:18:51 2004 @@ -238,7 +238,7 @@ int pciio_slot_inuse #if !defined(DEV_FUNC) -static pciio_provider_t * +pciio_provider_t * pciio_to_provider_fns(vertex_hdl_t dev) { pciio_info_t card_info; @@ -261,9 +261,9 @@ pciio_to_provider_fns(vertex_hdl_t dev) if (provider_fns == NULL) #if defined(SUPPORT_PRINTING_V_FORMAT) - PRINT_PANIC("%v: provider_fns == NULL", dev); + panic("%v: provider_fns == NULL", dev); #else - PRINT_PANIC("0x%p: provider_fns == NULL", (void *)dev); + panic("0x%p: provider_fns == NULL", (void *)dev); #endif return provider_fns; @@ -394,8 +394,8 @@ pciio_piospace_alloc(vertex_hdl_t dev, / size_t byte_count, /* Size of mapping */ size_t align) { /* Alignment needed */ - if (align < NBPP) - align = NBPP; + if (align < PAGE_SIZE) + align = PAGE_SIZE; return DEV_FUNC(dev, piospace_alloc) (dev, dev_desc, space, byte_count, align); } @@ -1296,7 +1296,7 @@ pciio_device_win_alloc(struct resource * struct resource *new_res; int status = 0; - new_res = (struct resource *) kmalloc( sizeof(struct resource), KM_NOSLEEP); + new_res = (struct resource *) kmalloc( sizeof(struct resource), GFP_KERNEL); status = allocate_resource( root_resource, new_res, size, align /* Min start addr. */, diff -puN arch/ia64/sn/io/sn2/pic.c~sn18 arch/ia64/sn/io/sn2/pic.c --- 25/arch/ia64/sn/io/sn2/pic.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/pic.c Thu Jan 8 15:18:51 2004 @@ -6,25 +6,15 @@ * Copyright (C) 2001-2003 Silicon Graphics, Inc. All rights reserved. */ -#include -#include -#include -#include +#include #include -#include -#include #include -#include -#include -#include -#include +#include #include #include #include #include -#include -#include -#include +#include #include @@ -38,7 +28,7 @@ extern void pcibr_driver_unreg_callback( /* * copy xwidget_info_t from conn_v to peer_conn_v */ -int +static int pic_bus1_widget_info_dup(vertex_hdl_t conn_v, vertex_hdl_t peer_conn_v, cnodeid_t xbow_peer) { @@ -98,7 +88,7 @@ pic_bus1_widget_info_dup(vertex_hdl_t co * If not successful, return zero and both buses will attach to the * vertex passed into pic_attach(). */ -vertex_hdl_t +static vertex_hdl_t pic_bus1_redist(nasid_t nasid, vertex_hdl_t conn_v) { cnodeid_t cnode = NASID_TO_COMPACT_NODEID(nasid); diff -puN arch/ia64/sn/io/sn2/shub.c~sn18 arch/ia64/sn/io/sn2/shub.c --- 25/arch/ia64/sn/io/sn2/shub.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/shub.c Thu Jan 8 15:18:51 2004 @@ -9,11 +9,14 @@ #include #include #include +#include +#include #include #include #include #include #include +#include #include #include #include @@ -26,12 +29,12 @@ #include #include #include +#include #include #include #include #include #include -#include #define SHUB_NUM_ECF_REGISTERS 8 diff -puN arch/ia64/sn/io/sn2/shuberror.c~sn18 arch/ia64/sn/io/sn2/shuberror.c --- 25/arch/ia64/sn/io/sn2/shuberror.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/shuberror.c Thu Jan 8 15:18:51 2004 @@ -297,7 +297,7 @@ hubiio_crb_free(hubinfo_t hinfo, int crb * Wait till hub indicates it's done. */ while (REMOTE_HUB_L(hinfo->h_nasid, IIO_ICDR) & IIO_ICDR_PND) - us_delay(1); + udelay(1); } diff -puN arch/ia64/sn/io/sn2/xtalk.c~sn18 arch/ia64/sn/io/sn2/xtalk.c --- 25/arch/ia64/sn/io/sn2/xtalk.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/io/sn2/xtalk.c Thu Jan 8 15:18:51 2004 @@ -308,7 +308,7 @@ null_xtalk_early_piotrans_addr(xwidget_p unsigned flags) { #if DEBUG - PRINT_PANIC("null_xtalk_early_piotrans_addr"); + panic("null_xtalk_early_piotrans_addr"); #endif return NULL; } @@ -914,7 +914,7 @@ xwidget_unregister(vertex_hdl_t widget) /* Clean out the xwidget information */ (void)kfree(widget_info->w_name); - BZERO((void *)widget_info, sizeof(widget_info)); + memset((void *)widget_info, 0, sizeof(widget_info)); DEL(widget_info); return(0); diff -puN arch/ia64/sn/kernel/irq.c~sn18 arch/ia64/sn/kernel/irq.c --- 25/arch/ia64/sn/kernel/irq.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/kernel/irq.c Thu Jan 8 15:18:51 2004 @@ -20,7 +20,6 @@ #include #include #include -#include #include #include #include diff -puN arch/ia64/sn/kernel/sn2/cache.c~sn18 arch/ia64/sn/kernel/sn2/cache.c --- 25/arch/ia64/sn/kernel/sn2/cache.c~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/arch/ia64/sn/kernel/sn2/cache.c Thu Jan 8 15:18:51 2004 @@ -1,5 +1,4 @@ /* - * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. @@ -8,9 +7,7 @@ * */ -#include -#include -#include +#include /** * sn_flush_all_caches - flush a range of address from all caches (incl. L4) diff -puN include/asm-ia64/sn/addrs.h~sn18 include/asm-ia64/sn/addrs.h --- 25/include/asm-ia64/sn/addrs.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/addrs.h Thu Jan 8 15:18:51 2004 @@ -17,29 +17,15 @@ #include #endif -#ifndef __ASSEMBLY__ - -#define PS_UINT_CAST (__psunsigned_t) -#define UINT64_CAST (uint64_t) #define HUBREG_CAST (volatile mmr_t *) -#elif __ASSEMBLY__ - -#define PS_UINT_CAST -#define UINT64_CAST -#define HUBREG_CAST - -#endif - - - /* * The following macros are used to index to the beginning of a specific * node's address space. */ -#define NODE_OFFSET(_n) (UINT64_CAST (_n) << NASID_SHFT) +#define NODE_OFFSET(_n) ((uint64_t) (_n) << NASID_SHFT) #define NODE_CAC_BASE(_n) (CAC_BASE + NODE_OFFSET(_n)) #define NODE_HSPEC_BASE(_n) (HSPEC_BASE + NODE_OFFSET(_n)) @@ -55,7 +41,7 @@ #define RAW_NODE_SWIN_BASE(nasid, widget) \ - (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS)) + (NODE_IO_BASE(nasid) + ((uint64_t) (widget) << SWIN_SIZE_BITS)) #define WIDGETID_GET(addr) ((unsigned char)((addr >> SWIN_SIZE_BITS) & 0xff)) @@ -66,7 +52,7 @@ */ #define SWIN_SIZE_BITS 24 -#define SWIN_SIZE (1UL<<24) +#define SWIN_SIZE (1UL << 24) #define SWIN_SIZEMASK (SWIN_SIZE - 1) #define SWIN_WIDGET_MASK 0xF diff -puN include/asm-ia64/sn/cdl.h~sn18 include/asm-ia64/sn/cdl.h --- 25/include/asm-ia64/sn/cdl.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/cdl.h Thu Jan 8 15:18:51 2004 @@ -8,7 +8,9 @@ #ifndef _ASM_IA64_SN_CDL_H #define _ASM_IA64_SN_CDL_H +#ifdef __KERNEL__ #include +#endif struct cdl { int part_num; /* Part part number */ diff -puN include/asm-ia64/sn/clksupport.h~sn18 include/asm-ia64/sn/clksupport.h --- 25/include/asm-ia64/sn/clksupport.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/clksupport.h Thu Jan 8 15:18:51 2004 @@ -1,5 +1,4 @@ /* - * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. @@ -31,9 +30,7 @@ typedef long clkreg_t; extern unsigned long sn_rtc_cycles_per_second; -extern unsigned long sn_rtc_usec_per_cyc; extern unsigned long sn_rtc_per_itc; -extern unsigned long sn_rtc_delta; #include diff -puN include/asm-ia64/sn/dmamap.h~sn18 include/asm-ia64/sn/dmamap.h --- 25/include/asm-ia64/sn/dmamap.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/dmamap.h Thu Jan 8 15:18:51 2004 @@ -8,6 +8,8 @@ #ifndef _ASM_IA64_SN_DMAMAP_H #define _ASM_IA64_SN_DMAMAP_H +#include + #ifdef __cplusplus extern "C" { #endif @@ -38,31 +40,9 @@ typedef struct dmamap { int dma_index; /* Beginning map register to use */ int dma_size; /* Number of map registers to use */ paddr_t dma_addr; /* Corresponding bus addr for A24/A32 */ - caddr_t dma_virtaddr; /* Beginning virtual address that is mapped */ + unsigned long dma_virtaddr; /* Beginning virtual address that is mapped */ } dmamap_t; -struct alenlist_s; - -/* - * Prototypes of exported functions - */ -extern dmamap_t *dma_mapalloc(int, int, int, int); -extern void dma_mapfree(dmamap_t *); -extern int dma_map(dmamap_t *, caddr_t, int); -extern int dma_map2(dmamap_t *, caddr_t, caddr_t, int); -extern paddr_t dma_mapaddr(dmamap_t *, caddr_t); -extern int dma_map_alenlist(dmamap_t *, struct alenlist_s *, size_t); -extern uint ev_kvtoiopnum(caddr_t); - -/* - * These variables are defined in master.d/kernel - */ -extern struct map *a24map[]; -extern struct map *a32map[]; - -extern int a24_mapsize; -extern int a32_mapsize; - #ifdef __cplusplus } #endif diff -puN include/asm-ia64/sn/geo.h~sn18 include/asm-ia64/sn/geo.h --- 25/include/asm-ia64/sn/geo.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/geo.h Thu Jan 8 15:18:51 2004 @@ -6,8 +6,8 @@ * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ -#ifndef __SYS_GEO_H__ -#define __SYS_GEO_H__ +#ifndef _ASM_IA64_SN_GEO_H +#define _ASM_IA64_SN_GEO_H /* Include a platform-specific geo.h. It must define at least: * geoid_t: Geographic identifier data type @@ -42,4 +42,4 @@ extern void hwcfg_format_geoid_compt(cha extern geoid_t hwcfg_geo_get_self(geo_type_t type); extern geoid_t hwcfg_geo_get_by_nasid(geo_type_t type, nasid_t nasid); -#endif /* __SYS_GEO_H__ */ +#endif /* _ASM_IA64_SN_GEO_H */ diff -puN include/asm-ia64/sn/hcl.h~sn18 include/asm-ia64/sn/hcl.h --- 25/include/asm-ia64/sn/hcl.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/hcl.h Thu Jan 8 15:18:51 2004 @@ -103,8 +103,6 @@ extern int hwgraph_path_lookup(vertex_hd extern int hwgraph_info_export_LBL(vertex_hdl_t, char *, int); extern int hwgraph_info_unexport_LBL(vertex_hdl_t, char *); extern int hwgraph_info_remove_LBL(vertex_hdl_t, char *, arbitrary_info_t *); -extern char * vertex_to_name(vertex_hdl_t, char *, uint); - -extern int init_hcl(void); +extern char *vertex_to_name(vertex_hdl_t, char *, unsigned int); #endif /* _ASM_IA64_SN_HCL_H */ diff -puN include/asm-ia64/sn/hcl_util.h~sn18 include/asm-ia64/sn/hcl_util.h --- 25/include/asm-ia64/sn/hcl_util.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/hcl_util.h Thu Jan 8 15:18:51 2004 @@ -9,7 +9,7 @@ #ifndef _ASM_IA64_SN_HCL_UTIL_H #define _ASM_IA64_SN_HCL_UTIL_H -extern char * dev_to_name(vertex_hdl_t, char *, uint); +extern char * dev_to_name(vertex_hdl_t, char *, unsigned int); extern int device_master_set(vertex_hdl_t, vertex_hdl_t); extern vertex_hdl_t device_master_get(vertex_hdl_t); extern cnodeid_t master_node_get(vertex_hdl_t); diff -puN include/asm-ia64/sn/hwgfs.h~sn18 include/asm-ia64/sn/hwgfs.h --- 25/include/asm-ia64/sn/hwgfs.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/hwgfs.h Thu Jan 8 15:18:51 2004 @@ -1,3 +1,6 @@ +#ifndef _ASM_IA64_SN_HWGFS_H +#define _ASM_IA64_SN_HWGFS_H + /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -5,9 +8,6 @@ * * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ -#ifndef _ASM_IA64_SN_HWGFS_H -#define _ASM_IA64_SN_HWGFS_H - typedef struct dentry *hwgfs_handle_t; extern hwgfs_handle_t hwgfs_register(hwgfs_handle_t dir, const char *name, @@ -30,4 +30,4 @@ extern int hwgfs_generate_path(hwgfs_han extern void *hwgfs_get_info(hwgfs_handle_t de); extern int hwgfs_set_info(hwgfs_handle_t de, void *info); -#endif +#endif /* _ASM_IA64_SN_HWGFS_H */ diff -puN include/asm-ia64/sn/ioconfig_bus.h~sn18 include/asm-ia64/sn/ioconfig_bus.h --- 25/include/asm-ia64/sn/ioconfig_bus.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/ioconfig_bus.h Thu Jan 8 15:18:51 2004 @@ -6,6 +6,9 @@ * Copyright (C) 2003 Silicon Graphics, Inc. All Rights Reserved. */ +#ifndef _ASM_IA64_SN_IOCONFIG_BUS_H +#define _ASM_IA64_SN_IOCONFIG_BUS_H + #define IOCONFIG_PCIBUS "/boot/efi/ioconfig_pcibus" #define POUND_CHAR '#' #define MAX_LINE_LEN 128 @@ -20,3 +23,5 @@ struct ioconfig_parm { struct ascii_moduleid{ unsigned char io_moduleid[8]; /* pci path name */ }; + +#endif /* _ASM_IA64_SN_IOCONFIG_BUS_H */ diff -puN include/asm-ia64/sn/ioerror_handling.h~sn18 include/asm-ia64/sn/ioerror_handling.h --- 25/include/asm-ia64/sn/ioerror_handling.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/ioerror_handling.h Thu Jan 8 15:18:51 2004 @@ -8,7 +8,6 @@ #ifndef _ASM_IA64_SN_IOERROR_HANDLING_H #define _ASM_IA64_SN_IOERROR_HANDLING_H -#include #include #include @@ -255,12 +254,13 @@ error_skip_point_mark(vertex_hdl_t v) * one. */ if (v_error_skip_env_get(v, error_env) != GRAPH_SUCCESS) { - error_env = snia_kmem_zalloc(sizeof(label_t), KM_NOSLEEP); + error_env = kmalloc(sizeof(label_t), GFP_KERNEL); /* Unable to allocate memory for jum buffer. This should * be a very rare occurrence. */ if (!error_env) return(-1); + memset(error_env, 0, sizeof(label_t)); /* Store the jump buffer information on the vertex.*/ if (v_error_skip_env_set(v, error_env, 0) != GRAPH_SUCCESS) return(-2); diff -puN include/asm-ia64/sn/klconfig.h~sn18 include/asm-ia64/sn/klconfig.h --- 25/include/asm-ia64/sn/klconfig.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/klconfig.h Thu Jan 8 15:18:51 2004 @@ -11,12 +11,6 @@ #ifndef _ASM_IA64_SN_KLCONFIG_H #define _ASM_IA64_SN_KLCONFIG_H -#include - -/* - * klconfig.h - */ - /* * The KLCONFIG structures store info about the various BOARDs found * during Hardware Discovery. In addition, it stores info about the diff -puN include/asm-ia64/sn/ksys/elsc.h~sn18 include/asm-ia64/sn/ksys/elsc.h --- 25/include/asm-ia64/sn/ksys/elsc.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/ksys/elsc.h Thu Jan 8 15:18:51 2004 @@ -5,8 +5,8 @@ * * Copyright (C) 1992-1997, 2000-2003 Silicon Graphics, Inc. All Rights Reserved. */ -#ifndef _ASM_SN_KSYS_ELSC_H -#define _ASM_SN_KSYS_ELSC_H +#ifndef _ASM_IA64_SN_KSYS_ELSC_H +#define _ASM_IA64_SN_KSYS_ELSC_H /* * Error codes @@ -36,4 +36,4 @@ #define ELSC_ERROR_NVMAGIC (-124) /* Bad magic no. in NVRAM */ #define ELSC_ERROR_MODULE (-125) /* Moduleid processing err */ -#endif /* _ASM_SN_KSYS_ELSC_H */ +#endif /* _ASM_IA64_SN_KSYS_ELSC_H */ diff -puN include/asm-ia64/sn/ksys/l1.h~sn18 include/asm-ia64/sn/ksys/l1.h --- 25/include/asm-ia64/sn/ksys/l1.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/ksys/l1.h Thu Jan 8 15:18:51 2004 @@ -6,8 +6,8 @@ * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All Rights Reserved. */ -#ifndef _ASM_SN_KSYS_L1_H -#define _ASM_SN_KSYS_L1_H +#ifndef _ASM_IA64_SN_KSYS_L1_H +#define _ASM_IA64_SN_KSYS_L1_H #include @@ -128,4 +128,4 @@ int iobrick_rack_bay_type_get( nasid_t n int iobrick_module_get( nasid_t nasid ); -#endif /* _ASM_SN_KSYS_L1_H */ +#endif /* _ASM_IA64_SN_KSYS_L1_H */ diff -puN include/asm-ia64/sn/nodepda.h~sn18 include/asm-ia64/sn/nodepda.h --- 25/include/asm-ia64/sn/nodepda.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/nodepda.h Thu Jan 8 15:18:51 2004 @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include diff -puN include/asm-ia64/sn/pci/bridge.h~sn18 include/asm-ia64/sn/pci/bridge.h --- 25/include/asm-ia64/sn/pci/bridge.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/pci/bridge.h Thu Jan 8 15:18:51 2004 @@ -37,7 +37,6 @@ #include #include -extern int io_get_sh_swapper(nasid_t); #define BRIDGE_REG_GET32(reg) \ __swab32( *(volatile uint32_t *) (((uint64_t)reg)^4) ) @@ -46,11 +45,11 @@ extern int io_get_sh_swapper(nasid_t); /* I/O page size */ -#if _PAGESZ == 4096 +#if PAGE_SIZE == 4096 #define IOPFNSHIFT 12 /* 4K per mapped page */ #else #define IOPFNSHIFT 14 /* 16K per mapped page */ -#endif /* _PAGESZ */ +#endif /* PAGE_SIZE */ #define IOPGSIZE (1 << IOPFNSHIFT) #define IOPG(x) ((x) >> IOPFNSHIFT) diff -puN include/asm-ia64/sn/pci/pcibr.h~sn18 include/asm-ia64/sn/pci/pcibr.h --- 25/include/asm-ia64/sn/pci/pcibr.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/pci/pcibr.h Thu Jan 8 15:18:51 2004 @@ -5,8 +5,8 @@ * * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved. */ -#ifndef _ASM_SN_PCI_PCIBR_H -#define _ASM_SN_PCI_PCIBR_H +#ifndef _ASM_IA64_SN_PCI_PCIBR_H +#define _ASM_IA64_SN_PCI_PCIBR_H #if defined(__KERNEL__) @@ -421,7 +421,7 @@ struct pcibr_slot_info_resp_s { int resp_bss_ninfo; char resp_bss_devio_bssd_space[16]; iopaddr_t resp_bss_devio_bssd_base; - bridgereg_t resp_bss_device; + uint64_t resp_bss_device; int resp_bss_pmu_uctr; int resp_bss_d32_uctr; int resp_bss_d64_uctr; @@ -429,7 +429,7 @@ struct pcibr_slot_info_resp_s { unsigned resp_bss_d64_flags; iopaddr_t resp_bss_d32_base; unsigned resp_bss_d32_flags; - atomic_t resp_bss_ext_ates_active; + atomic_t resp_bss_ext_ates_active; volatile unsigned *resp_bss_cmd_pointer; unsigned resp_bss_cmd_shadow; int resp_bs_rrb_valid; @@ -437,10 +437,10 @@ struct pcibr_slot_info_resp_s { int resp_bs_rrb_valid_v2; int resp_bs_rrb_valid_v3; int resp_bs_rrb_res; - bridgereg_t resp_b_resp; - bridgereg_t resp_b_int_device; - bridgereg_t resp_b_int_enable; - bridgereg_t resp_b_int_host; + uint64_t resp_b_resp; + uint64_t resp_b_int_device; + uint64_t resp_b_int_enable; + uint64_t resp_b_int_host; picreg_t resp_p_int_enable; picreg_t resp_p_int_host; struct pcibr_slot_func_info_resp_s { @@ -507,4 +507,4 @@ struct pcibr_slot_info_resp_s { /* ERANGE 34 */ /* EUNATCH 42 */ -#endif /* _ASM_SN_PCI_PCIBR_H */ +#endif /* _ASM_IA64_SN_PCI_PCIBR_H */ diff -puN include/asm-ia64/sn/pci/pcibr_private.h~sn18 include/asm-ia64/sn/pci/pcibr_private.h --- 25/include/asm-ia64/sn/pci/pcibr_private.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/pci/pcibr_private.h Thu Jan 8 15:18:51 2004 @@ -5,8 +5,8 @@ * * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ -#ifndef _ASM_SN_PCI_PCIBR_PRIVATE_H -#define _ASM_SN_PCI_PCIBR_PRIVATE_H +#ifndef _ASM_IA64_SN_PCI_PCIBR_PRIVATE_H +#define _ASM_IA64_SN_PCI_PCIBR_PRIVATE_H /* * pcibr_private.h -- private definitions for pcibr @@ -271,9 +271,9 @@ struct pcibr_intr_wrap_s { #define PCIBR_BUS_IO_MAX 0x0FFFFFFF #define PCIBR_BUS_IO_PAGE 0x100000 -#define PCIBR_BUS_SWIN_BASE _PAGESZ +#define PCIBR_BUS_SWIN_BASE PAGE_SIZE #define PCIBR_BUS_SWIN_MAX 0x000FFFFF -#define PCIBR_BUS_SWIN_PAGE _PAGESZ +#define PCIBR_BUS_SWIN_PAGE PAGE_SIZE #define PCIBR_BUS_MEM_BASE 0x200000 #define PCIBR_BUS_MEM_MAX 0x3FFFFFFF @@ -435,7 +435,7 @@ struct pcibr_soft_s { /* Shadow value for Device(x) register, * so we don't have to go to the chip. */ - bridgereg_t bss_device; + uint64_t bss_device; /* Number of sets on GBR/REALTIME bit outstanding * Used by Priority I/O for tracking reservations @@ -650,17 +650,6 @@ struct pcibr_hints_s { #define pcibr_soft_set(v,i) (hwgraph_fastinfo_set((v), (arbitrary_info_t)(i))) /* - * mem alloc/free macros - */ -#define NEWAf(ptr,n,f) (ptr = snia_kmem_zalloc((n)*sizeof (*(ptr)), (f&PCIIO_NOSLEEP)?KM_NOSLEEP:KM_SLEEP)) -#define NEWA(ptr,n) (ptr = snia_kmem_zalloc((n)*sizeof (*(ptr)), KM_SLEEP)) -#define DELA(ptr,n) (kfree(ptr)) - -#define NEWf(ptr,f) NEWAf(ptr,1,f) -#define NEW(ptr) NEWA(ptr,1) -#define DEL(ptr) DELA(ptr,1) - -/* * Additional PIO spaces per slot are * recorded in this structure. */ diff -puN include/asm-ia64/sn/pci/pci_bus_cvlink.h~sn18 include/asm-ia64/sn/pci/pci_bus_cvlink.h --- 25/include/asm-ia64/sn/pci/pci_bus_cvlink.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/pci/pci_bus_cvlink.h Thu Jan 8 15:18:51 2004 @@ -5,8 +5,8 @@ * * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ -#ifndef _ASM_SN_PCI_CVLINK_H -#define _ASM_SN_PCI_CVLINK_H +#ifndef _ASM_IA64_SN_PCI_CVLINK_H +#define _ASM_IA64_SN_PCI_CVLINK_H #include #include @@ -69,4 +69,4 @@ struct ioports_to_tlbs_s { ig:11; }; -#endif /* _ASM_SN_PCI_CVLINK_H */ +#endif /* _ASM_IA64_SN_PCI_CVLINK_H */ diff -puN include/asm-ia64/sn/pci/pci_defs.h~sn18 include/asm-ia64/sn/pci/pci_defs.h --- 25/include/asm-ia64/sn/pci/pci_defs.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/pci/pci_defs.h Thu Jan 8 15:18:51 2004 @@ -5,10 +5,8 @@ * * Copyright (c) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved. */ -#ifndef _ASM_SN_PCI_PCI_DEFS_H -#define _ASM_SN_PCI_PCI_DEFS_H - -#include +#ifndef _ASM_IA64_SN_PCI_PCI_DEFS_H +#define _ASM_IA64_SN_PCI_PCI_DEFS_H /* defines for the PCI bus architecture */ @@ -244,7 +242,7 @@ #else -extern uint pci_read(void * address, int type); +extern unsigned int pci_read(void * address, int type); extern void pci_write(void * address, int data, int type); #define BYTE 1 @@ -328,24 +326,24 @@ typedef volatile struct pci_cfg_s { uint16_t dev_id; uint16_t cmd; uint16_t status; - uchar_t rev; - uchar_t prog_if; - uchar_t sub_class; - uchar_t class; - uchar_t line_size; - uchar_t lt; - uchar_t hdr_type; - uchar_t bist; + uint8_t rev; + uint8_t prog_if; + uint8_t sub_class; + uint8_t class; + uint8_t line_size; + uint8_t lt; + uint8_t hdr_type; + uint8_t bist; uint32_t bar[6]; uint32_t cardbus; uint16_t subsys_vendor_id; uint16_t subsys_dev_id; uint32_t exp_rom; uint32_t res[2]; - uchar_t int_line; - uchar_t int_pin; - uchar_t min_gnt; - uchar_t max_lat; + uint8_t int_line; + uint8_t int_pin; + uint8_t min_gnt; + uint8_t max_lat; } pci_cfg_t; /* @@ -356,21 +354,21 @@ typedef volatile struct pci_cfg1_s { uint16_t dev_id; uint16_t cmd; uint16_t status; - uchar_t rev; - uchar_t prog_if; - uchar_t sub_class; - uchar_t class; - uchar_t line_size; - uchar_t lt; - uchar_t hdr_type; - uchar_t bist; + uint8_t rev; + uint8_t prog_if; + uint8_t sub_class; + uint8_t class; + uint8_t line_size; + uint8_t lt; + uint8_t hdr_type; + uint8_t bist; uint32_t bar[2]; - uchar_t pri_bus_num; - uchar_t snd_bus_num; - uchar_t sub_bus_num; - uchar_t slt; - uchar_t io_base; - uchar_t io_limit; + uint8_t pri_bus_num; + uint8_t snd_bus_num; + uint8_t sub_bus_num; + uint8_t slt; + uint8_t io_base; + uint8_t io_limit; uint16_t snd_status; uint16_t mem_base; uint16_t mem_limit; @@ -382,8 +380,8 @@ typedef volatile struct pci_cfg1_s { uint16_t io_limit_upper; uint32_t res; uint32_t exp_rom; - uchar_t int_line; - uchar_t int_pin; + uint8_t int_line; + uint8_t int_pin; uint16_t ppb_control; } pci_cfg1_t; @@ -416,11 +414,11 @@ typedef volatile struct cap_pcix_stat_re } cap_pcix_stat_reg_t; typedef volatile struct cap_pcix_type0_s { - uchar_t pcix_cap_id; - uchar_t pcix_cap_nxt; + uint8_t pcix_cap_id; + uint8_t pcix_cap_nxt; cap_pcix_cmd_reg_t pcix_type0_command; cap_pcix_stat_reg_t pcix_type0_status; } cap_pcix_type0_t; #endif /* __ASSEMBLY__ */ -#endif /* _ASM_SN_PCI_PCI_DEFS_H */ +#endif /* _ASM_IA64_SN_PCI_PCI_DEFS_H */ diff -puN include/asm-ia64/sn/pci/pciio.h~sn18 include/asm-ia64/sn/pci/pciio.h --- 25/include/asm-ia64/sn/pci/pciio.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/pci/pciio.h Thu Jan 8 15:18:51 2004 @@ -5,24 +5,34 @@ * * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ -#ifndef _ASM_SN_PCI_PCIIO_H -#define _ASM_SN_PCI_PCIIO_H +#ifndef _ASM_IA64_SN_PCI_PCIIO_H +#define _ASM_IA64_SN_PCI_PCIIO_H /* * pciio.h -- platform-independent PCI interface */ -#include +#ifdef __KERNEL__ #include #include #include #include - +#else +#include +#include +#include +#include +#endif #ifndef __ASSEMBLY__ +#ifdef __KERNEL__ #include #include +#else +#include +#include +#endif typedef int pciio_vendor_id_t; @@ -729,4 +739,17 @@ sn_pci_set_vchan(struct pci_dev *pci_dev } #endif /* C or C++ */ -#endif /* _ASM_SN_PCI_PCIIO_H */ + + +/* + * Prototypes + */ + +int snia_badaddr_val(volatile void *addr, int len, volatile void *ptr); +nasid_t snia_get_console_nasid(void); +nasid_t snia_get_master_baseio_nasid(void); +/* XXX: should probably be called __sn2_pci_rrb_alloc */ +int snia_pcibr_rrb_alloc(struct pci_dev *pci_dev, int *count_vchan0, int *count_vchan1); +pciio_endian_t snia_pciio_endian_set(struct pci_dev *pci_dev, + pciio_endian_t device_end, pciio_endian_t desired_end); +#endif /* _ASM_IA64_SN_PCI_PCIIO_H */ diff -puN include/asm-ia64/sn/pci/pciio_private.h~sn18 include/asm-ia64/sn/pci/pciio_private.h --- 25/include/asm-ia64/sn/pci/pciio_private.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/pci/pciio_private.h Thu Jan 8 15:18:51 2004 @@ -5,8 +5,8 @@ * * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ -#ifndef _ASM_SN_PCI_PCIIO_PRIVATE_H -#define _ASM_SN_PCI_PCIIO_PRIVATE_H +#ifndef _ASM_IA64_SN_PCI_PCIIO_PRIVATE_H +#define _ASM_IA64_SN_PCI_PCIIO_PRIVATE_H #include #include @@ -16,8 +16,6 @@ * PCI drivers should NOT include this file. */ -#ident "sys/PCI/pciio_private: $Revision: 1.13 $" - /* * All PCI providers set up PIO using this information. */ @@ -126,4 +124,4 @@ struct pciio_info_s { }; extern char pciio_info_fingerprint[]; -#endif /* _ASM_SN_PCI_PCIIO_PRIVATE_H */ +#endif /* _ASM_IA64_SN_PCI_PCIIO_PRIVATE_H */ diff -puN include/asm-ia64/sn/pci/pic.h~sn18 include/asm-ia64/sn/pci/pic.h --- 25/include/asm-ia64/sn/pci/pic.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/pci/pic.h Thu Jan 8 15:18:51 2004 @@ -5,17 +5,8 @@ * * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ -#ifndef _ASM_SN_PCI_PIC_H -#define _ASM_SN_PCI_PIC_H - - -/* - * The PIC ASIC is a follow-on to the Bridge and Xbridge ASICs. - * It shares many of the same registers as those chips and therefore - * the primary structure for the PIC will be bridge_s as defined - * in irix/kern/sys/PCI/bridge.h. This file is intended as a complement - * to bridge.h, which includes this file. - */ +#ifndef _ASM_IA64_SN_PCI_PIC_H +#define _ASM_IA64_SN_PCI_PIC_H /* * PIC AS DEVICE ZERO @@ -65,13 +56,13 @@ */ -#ifndef __ASSEMBLY__ - -#ifdef __cplusplus -extern "C" { +#ifdef __KERNEL__ +#include +#include /* generic widget header */ +#else +#include #endif -// #include #include @@ -1996,5 +1987,4 @@ typedef uint64_t picreg_t; } pic_px_write_buf_valid_fld_s; } pic_px_write_buf_valid_u_t; -#endif /* __ASSEMBLY__ */ -#endif /* _ASM_SN_PCI_PIC_H */ +#endif /* _ASM_IA64_SN_PCI_PIC_H */ diff -puN include/asm-ia64/sn/pda.h~sn18 include/asm-ia64/sn/pda.h --- 25/include/asm-ia64/sn/pda.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/pda.h Thu Jan 8 15:18:51 2004 @@ -10,7 +10,6 @@ #include #include -#include #include #include #include diff -puN include/asm-ia64/sn/pio.h~sn18 include/asm-ia64/sn/pio.h --- 25/include/asm-ia64/sn/pio.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/pio.h Thu Jan 8 15:18:51 2004 @@ -29,8 +29,8 @@ typedef volatile ulong* pioaddr_t; typedef struct piomap { - uint pio_bus; - uint pio_adap; + unsigned int pio_bus; + unsigned int pio_adap; int pio_flag; int pio_reg; char pio_name[7]; /* to identify the mapped device */ diff -puN include/asm-ia64/sn/sgi.h~sn18 include/asm-ia64/sn/sgi.h --- 25/include/asm-ia64/sn/sgi.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/sgi.h Thu Jan 8 15:18:51 2004 @@ -1,5 +1,4 @@ /* - * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. @@ -21,14 +20,17 @@ typedef hwgfs_handle_t vertex_hdl_t; -typedef int64_t __psint_t; /* needed by klgraph.c */ +/* Nice general name length that lots of people like to use */ +#ifndef MAXDEVNAME +#define MAXDEVNAME 256 +#endif typedef enum { B_FALSE, B_TRUE } boolean_t; /* -** Possible return values from graph routines. -*/ + * Possible return values from graph routines. + */ typedef enum graph_error_e { GRAPH_SUCCESS, /* 0 */ GRAPH_DUP, /* 1 */ @@ -40,69 +42,15 @@ typedef enum graph_error_e { GRAPH_IN_USE /* 7 */ } graph_error_t; -#define KM_SLEEP 0x0000 -#define KM_NOSLEEP 0x0001 /* needed by kmem_alloc_node(), kmem_zalloc() - * calls */ -#define VM_NOSLEEP 0x0001 /* needed kmem_alloc_node(), kmem_zalloc_node - * calls */ -#define XG_WIDGET_PART_NUM 0xC102 /* KONA/xt_regs.h XG_XT_PART_NUM_VALUE */ - -typedef uint64_t vhandl_t; - - -#define NBPP PAGE_SIZE -#define _PAGESZ PAGE_SIZE - -#ifndef MAXDEVNAME -#define MAXDEVNAME 256 -#endif - -#define HUB_PIO_CONVEYOR 0x1 #define CNODEID_NONE ((cnodeid_t)-1) -#define XTALK_PCI_PART_NUM "030-1275-" -#define kdebug 0 - - -#define COPYIN(a, b, c) copy_from_user(b,a,c) -#define COPYOUT(a, b, c) copy_to_user(b,a,c) - -#define BZERO(a,b) memset(a, 0, b) - -#define kern_malloc(x) kmalloc(x, GFP_KERNEL) -#define kern_free(x) kfree(x) - -typedef cpuid_t cpu_cookie_t; #define CPU_NONE (-1) #define GRAPH_VERTEX_NONE ((vertex_hdl_t)-1) /* - * mutext support mapping + * No code is complete without an Assertion macro */ -#define mutex_spinlock_init(s) spin_lock_init(s) -inline static unsigned long -mutex_spinlock(spinlock_t *sem) { - unsigned long flags = 0; -// spin_lock_irqsave(sem, flags); - spin_lock(sem); - return(flags); -} -// #define mutex_spinunlock(s,t) spin_unlock_irqrestore(s,t) -#define mutex_spinunlock(s,t) spin_unlock(s) - - -#define mutex_t struct semaphore -#define mutex_init(s) init_MUTEX(s) -#define mutex_init_locked(s) init_MUTEX_LOCKED(s) -#define mutex_lock(s) down(s) -#define mutex_unlock(s) up(s) - -#define io_splock(s) mutex_spinlock(s) -#define io_spunlock(s,t) spin_unlock(s) - -#define spin_lock_destroy(s) - #if defined(DISABLE_ASSERT) #define ASSERT(expr) #define ASSERT_ALWAYS(expr) @@ -122,33 +70,4 @@ mutex_spinlock(spinlock_t *sem) { } } while(0) #endif /* DISABLE_ASSERT */ -#define PRINT_PANIC panic - -/****************************************** - * Definitions that do not exist in linux * - ******************************************/ - -#define DELAY(a) - -/************************************************ - * Routines redefined to use linux equivalents. * - ************************************************/ - -/* #define FIXME(s) printk("FIXME: [ %s ] in %s at %s:%d\n", s, __FUNCTION__, __FILE__, __LINE__) */ - -#define FIXME(s) - -/* move to stubs.c yet */ -#define dev_to_vhdl(dev) 0 -#define get_timestamp() 0 -#define us_delay(a) -#define v_mapphys(a,b,c) 0 // printk("Fixme: v_mapphys - soft->base 0x%p\n", b); -#define splhi() 0 -#define splx(s) - -extern void * snia_kmem_alloc_node(register size_t, register int, cnodeid_t); -extern void * snia_kmem_zalloc(size_t, int); -extern void * snia_kmem_zalloc_node(register size_t, register int, cnodeid_t ); -extern int is_specified(char *); - #endif /* _ASM_IA64_SN_SGI_H */ diff -puN include/asm-ia64/sn/sn2/addrs.h~sn18 include/asm-ia64/sn/sn2/addrs.h --- 25/include/asm-ia64/sn/sn2/addrs.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/sn2/addrs.h Thu Jan 8 15:18:51 2004 @@ -1,5 +1,4 @@ /* - * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. @@ -107,9 +106,9 @@ typedef union ia64_sn2_pa { #define NASID_META_BITS 0 /* ???? */ #define NASID_LOCAL_BITS 7 /* same router as SN1 */ -#define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS) -#define NASID_MASK (UINT64_CAST NASID_BITMASK << NASID_SHFT) -#define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> \ +#define NODE_ADDRSPACE_SIZE (1UL << NODE_SIZE_BITS) +#define NASID_MASK ((uint64_t) NASID_BITMASK << NASID_SHFT) +#define NASID_GET(_pa) (int) (((uint64_t) (_pa) >> \ NASID_SHFT) & NASID_BITMASK) #define PHYS_TO_DMA(x) ( ((x & NASID_MASK) >> 2) | \ (x & (NODE_ADDRSPACE_SIZE - 1)) ) @@ -130,9 +129,9 @@ typedef union ia64_sn2_pa { : RAW_NODE_SWIN_BASE(nasid, widget)) #else #define NODE_SWIN_BASE(nasid, widget) \ - (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS)) + (NODE_IO_BASE(nasid) + ((uint64_t) (widget) << SWIN_SIZE_BITS)) #define LOCAL_SWIN_BASE(widget) \ - (UNCACHED | LOCAL_MMR_SPACE | ((UINT64_CAST (widget) << SWIN_SIZE_BITS))) + (UNCACHED | LOCAL_MMR_SPACE | (((uint64_t) (widget) << SWIN_SIZE_BITS))) #endif /* __ASSEMBLY__ */ /* @@ -142,12 +141,12 @@ typedef union ia64_sn2_pa { */ #define BWIN_INDEX_BITS 3 -#define BWIN_SIZE (UINT64_CAST 1 << BWIN_SIZE_BITS) +#define BWIN_SIZE (1UL << BWIN_SIZE_BITS) #define BWIN_SIZEMASK (BWIN_SIZE - 1) #define BWIN_WIDGET_MASK 0x7 #define NODE_BWIN_BASE0(nasid) (NODE_IO_BASE(nasid) + BWIN_SIZE) #define NODE_BWIN_BASE(nasid, bigwin) (NODE_BWIN_BASE0(nasid) + \ - (UINT64_CAST (bigwin) << BWIN_SIZE_BITS)) + ((uint64_t) (bigwin) << BWIN_SIZE_BITS)) #define BWIN_WIDGETADDR(addr) ((addr) & BWIN_SIZEMASK) #define BWIN_WINDOWNUM(addr) (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK) diff -puN include/asm-ia64/sn/sn2/geo.h~sn18 include/asm-ia64/sn/sn2/geo.h --- 25/include/asm-ia64/sn/sn2/geo.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/sn2/geo.h Thu Jan 8 15:18:51 2004 @@ -6,8 +6,8 @@ * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ -#ifndef __SYS_SN_SN2_GEO_H__ -#define __SYS_SN_SN2_GEO_H__ +#ifndef _ASM_IA64_SN_SN2_GEO_H +#define _ASM_IA64_SN_SN2_GEO_H /* Headers required by declarations in this file */ @@ -105,4 +105,4 @@ typedef union geoid_u { #define GEO_INVALID_STR "" -#endif /* __SYS_SN_SN2_GEO_H__ */ +#endif /* _ASM_IA64_SN_SN2_GEO_H */ diff -puN include/asm-ia64/sn/sn2/shub_md.h~sn18 include/asm-ia64/sn/sn2/shub_md.h --- 25/include/asm-ia64/sn/sn2/shub_md.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/sn2/shub_md.h Thu Jan 8 15:18:51 2004 @@ -1,5 +1,4 @@ /* - * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. @@ -8,8 +7,8 @@ */ -#ifndef _SHUB_MD_H -#define _SHUB_MD_H +#ifndef _ASM_IA64_SN_SN2_SHUB_MD_H +#define _ASM_IA64_SN_SN2_SHUB_MD_H /* SN2 supports a mostly-flat address space with 4 CPU-visible, evenly spaced, contiguous regions, or "software banks". On SN2, software bank n begins at @@ -273,4 +272,4 @@ #define MD_BIST_MISCOMPARE(_n) (REMOTE_HUB_L(_n, SH_MMRBIST_ERR) & \ SH_MMRBIST_ERR_DETECTED_MASK) -#endif /* _SHUB_MD_H */ +#endif /* _ASM_IA64_SN_SN2_SHUB_MD_H */ diff -puN include/asm-ia64/sn/xtalk/xbow.h~sn18 include/asm-ia64/sn/xtalk/xbow.h --- 25/include/asm-ia64/sn/xtalk/xbow.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/xtalk/xbow.h Thu Jan 8 15:18:51 2004 @@ -5,8 +5,8 @@ * * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All Rights Reserved. */ -#ifndef _ASM_SN_SN_XTALK_XBOW_H -#define _ASM_SN_SN_XTALK_XBOW_H +#ifndef _ASM_IA64_SN_XTALK_XBOW_H +#define _ASM_IA64_SN_XTALK_XBOW_H /* * xbow.h - header file for crossbow chip and xbow section of xbridge @@ -689,4 +689,4 @@ struct macrofield_s xbow_macrofield[ #endif /* MACROFIELD_LINE */ #endif /* __ASSEMBLY__ */ -#endif /* _ASM_SN_SN_XTALK_XBOW_H */ +#endif /* _ASM_IA64_SN_XTALK_XBOW_H */ diff -puN include/asm-ia64/sn/xtalk/xbow_info.h~sn18 include/asm-ia64/sn/xtalk/xbow_info.h --- 25/include/asm-ia64/sn/xtalk/xbow_info.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/xtalk/xbow_info.h Thu Jan 8 15:18:51 2004 @@ -5,8 +5,8 @@ * * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All Rights Reserved. */ -#ifndef _ASM_SN_XTALK_XBOW_INFO_H -#define _ASM_SN_XTALK_XBOW_INFO_H +#ifndef _ASM_IA64_SN_XTALK_XBOW_INFO_H +#define _ASM_IA64_SN_XTALK_XBOW_INFO_H #include diff -puN include/asm-ia64/sn/xtalk/xswitch.h~sn18 include/asm-ia64/sn/xtalk/xswitch.h --- 25/include/asm-ia64/sn/xtalk/xswitch.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/xtalk/xswitch.h Thu Jan 8 15:18:51 2004 @@ -5,8 +5,8 @@ * * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All Rights Reserved. */ -#ifndef _ASM_SN_XTALK_XSWITCH_H -#define _ASM_SN_XTALK_XSWITCH_H +#ifndef _ASM_IA64_SN_XTALK_XSWITCH_H +#define _ASM_IA64_SN_XTALK_XSWITCH_H /* * xswitch.h - controls the format of the data @@ -53,4 +53,4 @@ extern vertex_hdl_t xswitch_info_mas #endif /* __ASSEMBLY__ */ -#endif /* _ASM_SN_XTALK_XSWITCH_H */ +#endif /* _ASM_IA64_SN_XTALK_XSWITCH_H */ diff -puN include/asm-ia64/sn/xtalk/xtalkaddrs.h~sn18 include/asm-ia64/sn/xtalk/xtalkaddrs.h --- 25/include/asm-ia64/sn/xtalk/xtalkaddrs.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/xtalk/xtalkaddrs.h Thu Jan 8 15:18:51 2004 @@ -5,8 +5,8 @@ * * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All Rights Reserved. */ -#ifndef _ASM_SN_XTALK_XTALKADDRS_H -#define _ASM_SN_XTALK_XTALKADDRS_H +#ifndef _ASM_IA64_SN_XTALK_XTALKADDRS_H +#define _ASM_IA64_SN_XTALK_XTALKADDRS_H /* @@ -103,4 +103,4 @@ (widgetreg_t)(*(volatile uint32_t *)(NODE_SWIN_BASE(nasid, widget) + WIDGET_ID)) -#endif /* _ASM_SN_XTALK_XTALKADDRS_H */ +#endif /* _ASM_IA64_SN_XTALK_XTALKADDRS_H */ diff -puN include/asm-ia64/sn/xtalk/xtalk.h~sn18 include/asm-ia64/sn/xtalk/xtalk.h --- 25/include/asm-ia64/sn/xtalk/xtalk.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/xtalk/xtalk.h Thu Jan 8 15:18:51 2004 @@ -5,11 +5,13 @@ * * Copyright (C) 1992-1997, 2000-2003 Silicon Graphics, Inc. All Rights Reserved. */ -#ifndef _ASM_SN_XTALK_XTALK_H -#define _ASM_SN_XTALK_XTALK_H +#ifndef _ASM_IA64_SN_XTALK_XTALK_H +#define _ASM_IA64_SN_XTALK_XTALK_H #include +#ifdef __KERNEL__ #include "asm/sn/sgi.h" +#endif /* @@ -18,7 +20,7 @@ /* * User-level device driver visible types */ -typedef int xwidgetnum_t; /* xtalk widget number (0..15) */ +typedef char xwidgetnum_t; /* xtalk widget number (0..15) */ #define XWIDGET_NONE (-1) @@ -396,4 +398,4 @@ typedef void xtalk_iter_f(vertex_hdl_t extern void xtalk_iterate(char *prefix, xtalk_iter_f *func); #endif /* __KERNEL__ */ -#endif /* _ASM_SN_XTALK_XTALK_H */ +#endif /* _ASM_IA64_SN_XTALK_XTALK_H */ diff -puN include/asm-ia64/sn/xtalk/xtalk_private.h~sn18 include/asm-ia64/sn/xtalk/xtalk_private.h --- 25/include/asm-ia64/sn/xtalk/xtalk_private.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/xtalk/xtalk_private.h Thu Jan 8 15:18:51 2004 @@ -5,8 +5,8 @@ * * Copyright (C) 1992-1997, 2000-2003 Silicon Graphics, Inc. All Rights Reserved. */ -#ifndef _ASM_SN_XTALK_XTALK_PRIVATE_H -#define _ASM_SN_XTALK_XTALK_PRIVATE_H +#ifndef _ASM_IA64_SN_XTALK_XTALK_PRIVATE_H +#define _ASM_IA64_SN_XTALK_XTALK_PRIVATE_H #include /* for error function and arg types */ #include @@ -82,4 +82,4 @@ struct xwidget_info_s { extern char widget_info_fingerprint[]; -#endif /* _ASM_SN_XTALK_XTALK_PRIVATE_H */ +#endif /* _ASM_IA64_SN_XTALK_XTALK_PRIVATE_H */ diff -puN include/asm-ia64/sn/xtalk/xwidget.h~sn18 include/asm-ia64/sn/xtalk/xwidget.h --- 25/include/asm-ia64/sn/xtalk/xwidget.h~sn18 Thu Jan 8 15:18:51 2004 +++ 25-akpm/include/asm-ia64/sn/xtalk/xwidget.h Thu Jan 8 15:18:51 2004 @@ -5,17 +5,21 @@ * * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All Rights Reserved. */ -#ifndef __ASM_SN_XTALK_XWIDGET_H__ -#define __ASM_SN_XTALK_XWIDGET_H__ +#ifndef _ASM_IA64_SN_XTALK_XWIDGET_H +#define _ASM_IA64_SN_XTALK_XWIDGET_H /* * xwidget.h - generic crosstalk widget header file */ +#ifdef __KERNEL__ #include #ifndef __ASSEMBLY__ #include #endif /* __ASSEMBLY__ */ +#else +#include +#endif #define WIDGET_ID 0x00 #define WIDGET_STATUS 0x08 @@ -233,4 +237,4 @@ typedef struct v_widget_s { #endif /* __ASSEMBLY__ */ -#endif /* __ASM_SN_XTALK_XWIDGET_H__ */ +#endif /* _ASM_IA64_SN_XTALK_XWIDGET_H */ _