From: Paul Mundt Here's a rather large update for SH (this is a bit large mainly since a number of things have piled up, and Linus didn't want any of this during feature freeze time). All of these changes are specific to the SH platform, and as such, shouldn't effect any other platforms. The vast majority of the changes in this diff are deletions, so while the patch may be large, it does trim a lot of cruft out of the kernel proper. --- /dev/null | 6358 --------------------------------- Documentation/sh/kgdb.txt | 179 Documentation/sh/new-machine.txt | 259 + arch/sh/Kconfig | 502 +- arch/sh/Makefile | 67 arch/sh/boards/adx/Makefile | 2 arch/sh/boards/adx/setup.c | 34 arch/sh/boards/bigsur/Makefile | 4 arch/sh/boards/bigsur/io.c | 184 arch/sh/boards/bigsur/setup.c | 40 arch/sh/boards/cat68701/Makefile | 2 arch/sh/boards/cat68701/setup.c | 47 arch/sh/boards/cqreek/Makefile | 2 arch/sh/boards/cqreek/setup.c | 36 arch/sh/boards/dmida/mach.c | 14 arch/sh/boards/dreamcast/Makefile | 4 arch/sh/boards/dreamcast/setup.c | 23 arch/sh/boards/ec3104/Makefile | 2 arch/sh/boards/ec3104/setup.c | 33 arch/sh/boards/harp/mach.c | 14 arch/sh/boards/hp6xx/hp620/mach.c | 12 arch/sh/boards/hp6xx/hp680/mach.c | 12 arch/sh/boards/hp6xx/hp690/mach.c | 12 arch/sh/boards/mpc1211/Makefile | 2 arch/sh/boards/mpc1211/pci.c | 5 arch/sh/boards/mpc1211/rtc.c | 7 arch/sh/boards/mpc1211/setup.c | 72 arch/sh/boards/overdrive/mach.c | 12 arch/sh/boards/saturn/Makefile | 2 arch/sh/boards/saturn/irq.c | 7 arch/sh/boards/saturn/setup.c | 21 arch/sh/boards/saturn/smp.c | 4 arch/sh/boards/se/770x/io.c | 32 arch/sh/boards/se/770x/mach.c | 10 arch/sh/boards/se/7751/io.c | 60 arch/sh/boards/se/7751/mach.c | 14 arch/sh/boards/se/7751/pci.c | 29 arch/sh/boards/sh2000/Makefile | 2 arch/sh/boards/sh2000/setup.c | 25 arch/sh/boards/snapgear/Makefile | 10 arch/sh/boards/snapgear/io.c | 226 + arch/sh/boards/snapgear/rtc.c | 333 + arch/sh/boards/snapgear/setup.c | 220 + arch/sh/boards/systemh/Makefile | 17 arch/sh/boards/systemh/io.c | 283 + arch/sh/boards/systemh/irq.c | 111 arch/sh/boards/systemh/setup.c | 80 arch/sh/boot/compressed/Makefile | 4 arch/sh/boot/compressed/head.S | 51 arch/sh/boot/compressed/vmlinux.scr | 9 arch/sh/cchips/Kconfig | 76 arch/sh/cchips/hd6446x/hd64461/io.c | 37 arch/sh/cchips/hd6446x/hd64461/setup.c | 20 arch/sh/cchips/hd6446x/hd64465/io.c | 37 arch/sh/cchips/hd6446x/hd64465/setup.c | 22 arch/sh/configs/defconfig-adx | 6 arch/sh/configs/defconfig-cqreek | 6 arch/sh/configs/defconfig-dreamcast | 531 +- arch/sh/configs/defconfig-se7751 | 617 +++ arch/sh/configs/defconfig-snapgear | 540 ++ arch/sh/configs/defconfig-systemh | 372 + arch/sh/drivers/Makefile | 7 arch/sh/drivers/dma/Kconfig | 42 arch/sh/drivers/dma/Makefile | 8 arch/sh/drivers/dma/dma-api.c | 193 + arch/sh/drivers/dma/dma-g2.c | 173 arch/sh/drivers/dma/dma-isa.c | 93 arch/sh/drivers/dma/dma-pvr2.c | 111 arch/sh/drivers/dma/dma-sh.c | 271 + arch/sh/drivers/dma/dma-sh.h | 48 arch/sh/drivers/pci/Kconfig | 46 arch/sh/drivers/pci/Makefile | 16 arch/sh/drivers/pci/dma-dreamcast.c | 61 arch/sh/drivers/pci/fixups-dreamcast.c | 85 arch/sh/drivers/pci/ops-bigsur.c | 88 arch/sh/drivers/pci/ops-dreamcast.c | 169 arch/sh/drivers/pci/ops-snapgear.c | 100 arch/sh/drivers/pci/pci-auto.c | 534 ++ arch/sh/drivers/pci/pci-dma.c | 42 arch/sh/drivers/pci/pci-sh7751.c | 414 ++ arch/sh/drivers/pci/pci-sh7751.h | 296 + arch/sh/drivers/pci/pci-st40.c | 423 ++ arch/sh/drivers/pci/pci-st40.h | 66 arch/sh/drivers/pci/pci.c | 153 arch/sh/kernel/Makefile | 6 arch/sh/kernel/cpu/Makefile | 3 arch/sh/kernel/cpu/init.c | 214 + arch/sh/kernel/cpu/sh3/Makefile | 2 arch/sh/kernel/cpu/sh3/ex.S | 124 arch/sh/kernel/cpu/sh4/Makefile | 9 arch/sh/kernel/cpu/sh4/ex.S | 316 + arch/sh/kernel/cpu/sh4/fpu.c | 21 arch/sh/kernel/cpu/sh4/sq.c | 484 ++ arch/sh/kernel/entry.S | 441 -- arch/sh/kernel/head.S | 6 arch/sh/kernel/io.c | 185 arch/sh/kernel/irq.c | 114 arch/sh/kernel/kgdb_stub.c | 8 arch/sh/kernel/module.c | 4 arch/sh/kernel/process.c | 101 arch/sh/kernel/ptrace.c | 165 arch/sh/kernel/setup.c | 296 - arch/sh/kernel/sh_bios.c | 2 arch/sh/kernel/sh_ksyms.c | 4 arch/sh/kernel/signal.c | 82 arch/sh/kernel/smp.c | 207 + arch/sh/kernel/sys_sh.c | 40 arch/sh/kernel/time.c | 69 arch/sh/kernel/traps.c | 132 arch/sh/lib/Makefile | 3 arch/sh/lib/div64-generic.c | 19 arch/sh/lib/div64.S | 4 arch/sh/lib/udivdi3.c | 4 arch/sh/mm/Makefile | 10 arch/sh/mm/cache-sh3.c | 8 arch/sh/mm/cache-sh4.c | 79 arch/sh/mm/clear_page.S | 8 arch/sh/mm/copy_page.S | 8 arch/sh/mm/fault.c | 58 arch/sh/mm/init.c | 106 arch/sh/mm/ioremap.c | 7 arch/sh/mm/pg-dma.c | 97 arch/sh/mm/pg-nommu.c | 36 arch/sh/mm/tlb-sh3.c | 12 arch/sh/oprofile/Kconfig | 23 arch/sh/oprofile/Makefile | 13 arch/sh/oprofile/op_model_null.c | 23 arch/sh/tools/mach-types | 2 drivers/char/hp600_keyb.c | 1 drivers/char/keyboard.c | 2 drivers/char/sh-sci.c | 471 ++ drivers/char/sh-sci.h | 56 drivers/ide/Kconfig | 2 drivers/net/stnic.c | 6 drivers/pci/pci.ids | 2 drivers/video/Kconfig | 8 drivers/video/pvr2fb.c | 606 ++- include/asm-sh/bigsur/io.h | 54 include/asm-sh/cache.h | 7 include/asm-sh/cat68701/io.h | 67 include/asm-sh/cpu-sh2/addrspace.h | 16 include/asm-sh/cpu-sh2/cache.h | 2 include/asm-sh/cpu-sh2/dma.h | 23 include/asm-sh/cpu-sh2/shmparam.h | 16 include/asm-sh/cpu-sh2/sigcontext.h | 17 include/asm-sh/cpu-sh2/ubc.h | 32 include/asm-sh/cpu-sh3/cache.h | 2 include/asm-sh/cpu-sh3/dma.h | 6 include/asm-sh/cpu-sh3/mmu_context.h | 1 include/asm-sh/cpu-sh3/sigcontext.h | 17 include/asm-sh/cpu-sh4/cache.h | 2 include/asm-sh/cpu-sh4/dma.h | 6 include/asm-sh/cpu-sh4/sigcontext.h | 24 include/asm-sh/cpu-sh4/sq.h | 48 include/asm-sh/dma.h | 136 include/asm-sh/dreamcast/dma.h | 34 include/asm-sh/dreamcast/pci.h | 25 include/asm-sh/dreamcast/sysasic.h | 8 include/asm-sh/ec3104/io.h | 38 include/asm-sh/flat.h | 23 include/asm-sh/hardirq.h | 25 include/asm-sh/hd64461/io.h | 45 include/asm-sh/hd64465/io.h | 46 include/asm-sh/io.h | 232 - include/asm-sh/ipc.h | 2 include/asm-sh/irq.h | 80 include/asm-sh/kgdb.h | 14 include/asm-sh/local.h | 7 include/asm-sh/machvec.h | 8 include/asm-sh/mc146818rtc.h | 9 include/asm-sh/module.h | 8 include/asm-sh/mpc1211/io.h | 64 include/asm-sh/overdrive/io.h | 38 include/asm-sh/page.h | 11 include/asm-sh/pci.h | 59 include/asm-sh/pgalloc.h | 26 include/asm-sh/processor.h | 54 include/asm-sh/ptrace.h | 36 include/asm-sh/rtc.h | 6 include/asm-sh/saturn/io.h | 38 include/asm-sh/se/io.h | 45 include/asm-sh/se7751/io.h | 38 include/asm-sh/sections.h | 9 include/asm-sh/segment.h | 6 include/asm-sh/sigcontext.h | 22 include/asm-sh/smp.h | 21 include/asm-sh/snapgear/io.h | 92 include/asm-sh/spinlock.h | 15 include/asm-sh/system.h | 5 include/asm-sh/systemh/7751systemh.h | 68 include/asm-sh/systemh/io.h | 43 include/asm-sh/timex.h | 2 include/asm-sh/uaccess.h | 220 - include/asm-sh/unistd.h | 10 include/linux/pci_ids.h | 4 195 files changed, 12150 insertions(+), 9764 deletions(-) diff -puN -L arch/sh/boards/adx/io.c arch/sh/boards/adx/io.c~sh-merge /dev/null --- 25/arch/sh/boards/adx/io.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,195 +0,0 @@ -/* - * linux/arch/sh/kernel/io_adx.c - * - * Copyright (C) 2001 A&D Co., Ltd. - * - * I/O routine and setup routines for A&D ADX Board - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - */ - -#include -#include -#include - -#define PORT2ADDR(x) (adx_isa_port2addr(x)) - -static inline void delay(void) -{ - ctrl_inw(0xa0000000); -} - -unsigned char adx_inb(unsigned long port) -{ - return *(volatile unsigned char*)PORT2ADDR(port); -} - -unsigned short adx_inw(unsigned long port) -{ - return *(volatile unsigned short*)PORT2ADDR(port); -} - -unsigned int adx_inl(unsigned long port) -{ - return *(volatile unsigned long*)PORT2ADDR(port); -} - -unsigned char adx_inb_p(unsigned long port) -{ - unsigned long v = *(volatile unsigned char*)PORT2ADDR(port); - - delay(); - return v; -} - -unsigned short adx_inw_p(unsigned long port) -{ - unsigned long v = *(volatile unsigned short*)PORT2ADDR(port); - - delay(); - return v; -} - -unsigned int adx_inl_p(unsigned long port) -{ - unsigned long v = *(volatile unsigned long*)PORT2ADDR(port); - - delay(); - return v; -} - -void adx_insb(unsigned long port, void *buffer, unsigned long count) -{ - unsigned char *buf = buffer; - while(count--) *buf++ = inb(port); -} - -void adx_insw(unsigned long port, void *buffer, unsigned long count) -{ - unsigned short *buf = buffer; - while(count--) *buf++ = inw(port); -} - -void adx_insl(unsigned long port, void *buffer, unsigned long count) -{ - unsigned long *buf = buffer; - while(count--) *buf++ = inl(port); -} - -void adx_outb(unsigned char b, unsigned long port) -{ - *(volatile unsigned char*)PORT2ADDR(port) = b; -} - -void adx_outw(unsigned short b, unsigned long port) -{ - *(volatile unsigned short*)PORT2ADDR(port) = b; -} - -void adx_outl(unsigned int b, unsigned long port) -{ - *(volatile unsigned long*)PORT2ADDR(port) = b; -} - -void adx_outb_p(unsigned char b, unsigned long port) -{ - *(volatile unsigned char*)PORT2ADDR(port) = b; - delay(); -} - -void adx_outw_p(unsigned short b, unsigned long port) -{ - *(volatile unsigned short*)PORT2ADDR(port) = b; - delay(); -} - -void adx_outl_p(unsigned int b, unsigned long port) -{ - *(volatile unsigned long*)PORT2ADDR(port) = b; - delay(); -} - -void adx_outsb(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned char *buf = buffer; - while(count--) outb(*buf++, port); -} - -void adx_outsw(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned short *buf = buffer; - while(count--) outw(*buf++, port); -} - -void adx_outsl(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned long *buf = buffer; - while(count--) outl(*buf++, port); -} - -unsigned char adx_readb(unsigned long addr) -{ - return *(volatile unsigned char*)addr; -} - -unsigned short adx_readw(unsigned long addr) -{ - return *(volatile unsigned short*)addr; -} - -unsigned int adx_readl(unsigned long addr) -{ - return *(volatile unsigned long*)addr; -} - -void adx_writeb(unsigned char b, unsigned long addr) -{ - *(volatile unsigned char*)addr = b; -} - -void adx_writew(unsigned short b, unsigned long addr) -{ - *(volatile unsigned short*)addr = b; -} - -void adx_writel(unsigned int b, unsigned long addr) -{ - *(volatile unsigned long*)addr = b; -} - -void *adx_ioremap(unsigned long offset, unsigned long size) -{ - return (void *)P2SEGADDR(offset); -} - -EXPORT_SYMBOL (adx_ioremap); - -void adx_iounmap(void *addr) -{ -} - -EXPORT_SYMBOL(adx_iounmap); - -#ifdef CONFIG_IDE -#include -extern void *cf_io_base; - -unsigned long adx_isa_port2addr(unsigned long offset) -{ - /* CompactFlash (IDE) */ - if (((offset >= 0x1f0) && (offset <= 0x1f7)) || (offset == 0x3f6)) { - return (unsigned long)cf_io_base + offset; - } - - /* eth0 */ - if ((offset >= 0x300) && (offset <= 0x30f)) { - return 0xa5000000 + offset; /* COMM BOARD (AREA1) */ - } - - return offset + 0xb0000000; /* IOBUS (AREA 4)*/ -} -#endif - diff -puN -L arch/sh/boards/adx/mach.c arch/sh/boards/adx/mach.c~sh-merge /dev/null --- 25/arch/sh/boards/adx/mach.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,64 +0,0 @@ -/* - * linux/arch/sh/kernel/mach_adx.c - * - * Copyright (C) 2001 A&D Co., Ltd. - * - * This file may be copied or modified under the terms of the GNU - * General Public License. See linux/COPYING for more information. - * - * Machine vector for the A&D ADX Board - */ - -#include -#include - -#include -#include -#include -#include - -extern void init_adx_IRQ(void); - -/* - * The Machine Vector - */ - -struct sh_machine_vector mv_adx __initmv = { - .mv_nr_irqs = 48, - - .mv_inb = adx_inb, - .mv_inw = adx_inw, - .mv_inl = adx_inl, - .mv_outb = adx_outb, - .mv_outw = adx_outw, - .mv_outl = adx_outl, - - .mv_inb_p = adx_inb_p, - .mv_inw_p = adx_inw, - .mv_inl_p = adx_inl, - .mv_outb_p = adx_outb_p, - .mv_outw_p = adx_outw, - .mv_outl_p = adx_outl, - - .mv_insb = adx_insb, - .mv_insw = adx_insw, - .mv_insl = adx_insl, - .mv_outsb = adx_outsb, - .mv_outsw = adx_outsw, - .mv_outsl = adx_outsl, - - .mv_readb = adx_readb, - .mv_readw = adx_readw, - .mv_readl = adx_readl, - .mv_writeb = adx_writeb, - .mv_writew = adx_writew, - .mv_writel = adx_writel, - - .mv_ioremap = adx_ioremap, - .mv_iounmap = adx_iounmap, - - .mv_isa_port2addr = adx_isa_port2addr, - - .mv_init_irq = init_adx_IRQ, -}; -ALIAS_MV(adx) diff -puN arch/sh/boards/adx/Makefile~sh-merge arch/sh/boards/adx/Makefile --- 25/arch/sh/boards/adx/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/adx/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -6,5 +6,5 @@ # unless it's something special (ie not a .c file). # -obj-y := mach.o setup.o io.o irq.o irq_maskreq.o +obj-y := setup.o irq.o irq_maskreq.o diff -puN arch/sh/boards/adx/setup.c~sh-merge arch/sh/boards/adx/setup.c --- 25/arch/sh/boards/adx/setup.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/adx/setup.c 2004-01-09 21:32:27.000000000 -0800 @@ -14,11 +14,43 @@ #include #include +extern void init_adx_IRQ(void); +extern void *cf_io_base; + const char *get_system_type(void) { return "A&D ADX"; } -void platform_setup(void) +unsigned long adx_isa_port2addr(unsigned long offset) { + /* CompactFlash (IDE) */ + if (((offset >= 0x1f0) && (offset <= 0x1f7)) || (offset == 0x3f6)) { + return (unsigned long)cf_io_base + offset; + } + + /* eth0 */ + if ((offset >= 0x300) && (offset <= 0x30f)) { + return 0xa5000000 + offset; /* COMM BOARD (AREA1) */ + } + + return offset + 0xb0000000; /* IOBUS (AREA 4)*/ } + +/* + * The Machine Vector + */ + +struct sh_machine_vector mv_adx __initmv = { + .mv_nr_irqs = 48, + .mv_isa_port2addr = adx_isa_port2addr, + .mv_init_irq = init_adx_IRQ, +}; +ALIAS_MV(adx) + +int __init platform_setup(void) +{ + /* Nothing to see here .. */ + return 0; +} + diff -puN arch/sh/boards/bigsur/io.c~sh-merge arch/sh/boards/bigsur/io.c --- 25/arch/sh/boards/bigsur/io.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/bigsur/io.c 2004-01-09 21:32:27.000000000 -0800 @@ -21,18 +21,6 @@ #include #include -//#define BIGSUR_DEBUG 2 -#undef BIGSUR_DEBUG - -#ifdef BIGSUR_DEBUG -#define DPRINTK(args...) printk(args) -#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args) -#else -#define DPRINTK(args...) -#define DIPRINTK(n, args...) -#endif - - /* Low iomap maps port 0-1K to addresses in 8byte chunks */ #define BIGSUR_IOMAP_LO_THRESH 0x400 #define BIGSUR_IOMAP_LO_SHIFT 3 @@ -53,19 +41,17 @@ static u8 bigsur_iomap_hi_shift[BIGSUR_I #define MAX(a,b) ((a)>(b)?(a):(b)) #endif -#define PORT2ADDR(x) (sh_mv.mv_isa_port2addr(x)) - void bigsur_port_map(u32 baseport, u32 nports, u32 addr, u8 shift) { - u32 port, endport = baseport + nports; + u32 port, endport = baseport + nports; - DPRINTK("bigsur_port_map(base=0x%0x, n=0x%0x, addr=0x%08x)\n", - baseport, nports, addr); + pr_debug("bigsur_port_map(base=0x%0x, n=0x%0x, addr=0x%08x)\n", + baseport, nports, addr); for (port = baseport ; port < endport && port < BIGSUR_IOMAP_LO_THRESH ; port += (1<>BIGSUR_IOMAP_LO_SHIFT] = addr; bigsur_iomap_lo_shift[port>>BIGSUR_IOMAP_LO_SHIFT] = shift; addr += (1<<(BIGSUR_IOMAP_LO_SHIFT)); @@ -74,7 +60,7 @@ void bigsur_port_map(u32 baseport, u32 n for (port = MAX(baseport, BIGSUR_IOMAP_LO_THRESH) ; port < endport && port < BIGSUR_IOMAP_HI_THRESH ; port += (1<>BIGSUR_IOMAP_HI_SHIFT] = addr; bigsur_iomap_hi_shift[port>>BIGSUR_IOMAP_HI_SHIFT] = shift; addr += (1<<(BIGSUR_IOMAP_HI_SHIFT)); @@ -84,166 +70,56 @@ EXPORT_SYMBOL(bigsur_port_map); void bigsur_port_unmap(u32 baseport, u32 nports) { - u32 port, endport = baseport + nports; + u32 port, endport = baseport + nports; - DPRINTK("bigsur_port_unmap(base=0x%0x, n=0x%0x)\n", baseport, nports); + pr_debug("bigsur_port_unmap(base=0x%0x, n=0x%0x)\n", baseport, nports); for (port = baseport ; port < endport && port < BIGSUR_IOMAP_LO_THRESH ; port += (1<>BIGSUR_IOMAP_LO_SHIFT] = 0; + bigsur_iomap_lo[port>>BIGSUR_IOMAP_LO_SHIFT] = 0; } for (port = MAX(baseport, BIGSUR_IOMAP_LO_THRESH) ; port < endport && port < BIGSUR_IOMAP_HI_THRESH ; port += (1<>BIGSUR_IOMAP_HI_SHIFT] = 0; + bigsur_iomap_hi[port>>BIGSUR_IOMAP_HI_SHIFT] = 0; } } EXPORT_SYMBOL(bigsur_port_unmap); unsigned long bigsur_isa_port2addr(unsigned long port) { - unsigned long addr = 0; + unsigned long addr = 0; unsigned char shift; /* Physical address not in P0, do nothing */ - if (PXSEG(port)) addr = port; + if (PXSEG(port)) { + addr = port; /* physical address in P0, map to P2 */ - else if (port >= 0x30000) - addr = P2SEGADDR(port); + } else if (port >= 0x30000) { + addr = P2SEGADDR(port); /* Big Sur I/O + HD64465 registers 0x10000-0x30000 */ - else if (port >= BIGSUR_IOMAP_HI_THRESH) - addr = BIGSUR_INTERNAL_BASE + (port - BIGSUR_IOMAP_HI_THRESH); + } else if (port >= BIGSUR_IOMAP_HI_THRESH) { + addr = BIGSUR_INTERNAL_BASE + (port - BIGSUR_IOMAP_HI_THRESH); /* Handle remapping of high IO/PCI IO ports */ - else if (port >= BIGSUR_IOMAP_LO_THRESH) { - addr = bigsur_iomap_hi[port >> BIGSUR_IOMAP_HI_SHIFT]; - shift = bigsur_iomap_hi_shift[port >> BIGSUR_IOMAP_HI_SHIFT]; - if (addr != 0) - addr += (port & BIGSUR_IOMAP_HI_MASK) << shift; - } - /* Handle remapping of low IO ports */ - else { - addr = bigsur_iomap_lo[port >> BIGSUR_IOMAP_LO_SHIFT]; - shift = bigsur_iomap_lo_shift[port >> BIGSUR_IOMAP_LO_SHIFT]; - if (addr != 0) - addr += (port & BIGSUR_IOMAP_LO_MASK) << shift; + } else if (port >= BIGSUR_IOMAP_LO_THRESH) { + addr = bigsur_iomap_hi[port >> BIGSUR_IOMAP_HI_SHIFT]; + shift = bigsur_iomap_hi_shift[port >> BIGSUR_IOMAP_HI_SHIFT]; + + if (addr != 0) + addr += (port & BIGSUR_IOMAP_HI_MASK) << shift; + } else { + /* Handle remapping of low IO ports */ + addr = bigsur_iomap_lo[port >> BIGSUR_IOMAP_LO_SHIFT]; + shift = bigsur_iomap_lo_shift[port >> BIGSUR_IOMAP_LO_SHIFT]; + + if (addr != 0) + addr += (port & BIGSUR_IOMAP_LO_MASK) << shift; } - DIPRINTK(2, "PORT2ADDR(0x%08lx) = 0x%08lx\n", port, addr); + pr_debug("%s(0x%08lx) = 0x%08lx\n", __FUNCTION__, port, addr); return addr; } -static inline void delay(void) -{ - ctrl_inw(0xa0000000); -} - -unsigned char bigsur_inb(unsigned long port) -{ - unsigned long addr = PORT2ADDR(port); - unsigned long b = (addr == 0 ? 0 : *(volatile unsigned char*)addr); - - DIPRINTK(0, "inb(%08lx) = %02x\n", addr, (unsigned)b); - return b; -} - -unsigned char bigsur_inb_p(unsigned long port) -{ - unsigned long v; - unsigned long addr = PORT2ADDR(port); - - v = (addr == 0 ? 0 : *(volatile unsigned char*)addr); - delay(); - DIPRINTK(0, "inb_p(%08lx) = %02x\n", addr, (unsigned)v); - return v; -} - -unsigned short bigsur_inw(unsigned long port) -{ - unsigned long addr = PORT2ADDR(port); - unsigned long b = (addr == 0 ? 0 : *(volatile unsigned short*)addr); - DIPRINTK(0, "inw(%08lx) = %04lx\n", addr, b); - return b; -} - -unsigned int bigsur_inl(unsigned long port) -{ - unsigned long addr = PORT2ADDR(port); - unsigned int b = (addr == 0 ? 0 : *(volatile unsigned long*)addr); - DIPRINTK(0, "inl(%08lx) = %08x\n", addr, b); - return b; -} - -void bigsur_insb(unsigned long port, void *buffer, unsigned long count) -{ - unsigned char *buf=buffer; - while(count--) *buf++=inb(port); -} - -void bigsur_insw(unsigned long port, void *buffer, unsigned long count) -{ - unsigned short *buf=buffer; - while(count--) *buf++=inw(port); -} - -void bigsur_insl(unsigned long port, void *buffer, unsigned long count) -{ - unsigned long *buf=buffer; - while(count--) *buf++=inl(port); -} - -void bigsur_outb(unsigned char b, unsigned long port) -{ - unsigned long addr = PORT2ADDR(port); - - DIPRINTK(0, "outb(%02x, %08lx)\n", (unsigned)b, addr); - if (addr != 0) - *(volatile unsigned char*)addr = b; -} - -void bigsur_outb_p(unsigned char b, unsigned long port) -{ - unsigned long addr = PORT2ADDR(port); - - DIPRINTK(0, "outb_p(%02x, %08lx)\n", (unsigned)b, addr); - if (addr != 0) - *(volatile unsigned char*)addr = b; - delay(); -} - -void bigsur_outw(unsigned short b, unsigned long port) -{ - unsigned long addr = PORT2ADDR(port); - DIPRINTK(0, "outw(%04x, %08lx)\n", (unsigned)b, addr); - if (addr != 0) - *(volatile unsigned short*)addr = b; -} - -void bigsur_outl(unsigned int b, unsigned long port) -{ - unsigned long addr = PORT2ADDR(port); - DIPRINTK(0, "outl(%08x, %08lx)\n", b, addr); - if (addr != 0) - *(volatile unsigned long*)addr = b; -} - -void bigsur_outsb(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned char *buf=buffer; - while(count--) outb(*buf++, port); -} - -void bigsur_outsw(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned short *buf=buffer; - while(count--) outw(*buf++, port); -} - -void bigsur_outsl(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned long *buf=buffer; - while(count--) outl(*buf++, port); -} - diff -puN -L arch/sh/boards/bigsur/mach.c arch/sh/boards/bigsur/mach.c~sh-merge /dev/null --- 25/arch/sh/boards/bigsur/mach.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,72 +0,0 @@ -/* - * linux/arch/sh/kernel/mach_bigsur.c - * - * By Dustin McIntire (dustin@sensoria.com) (c)2001 - * Derived from mach_se.h, which bore the message: - * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Machine vector for the Hitachi Big Sur Evaluation Board - */ - -#include -#include - -#include -#include -#include -#include -#include -#include - -/* - * The Machine Vector - */ -extern void heartbeat_bigsur(void); -extern void init_bigsur_IRQ(void); - -struct sh_machine_vector mv_bigsur __initmv = { - .mv_nr_irqs = NR_IRQS, // Defined in - .mv_inb = bigsur_inb, - .mv_inw = bigsur_inw, - .mv_inl = bigsur_inl, - .mv_outb = bigsur_outb, - .mv_outw = bigsur_outw, - .mv_outl = bigsur_outl, - - .mv_inb_p = bigsur_inb_p, - .mv_inw_p = bigsur_inw, - .mv_inl_p = bigsur_inl, - .mv_outb_p = bigsur_outb_p, - .mv_outw_p = bigsur_outw, - .mv_outl_p = bigsur_outl, - - .mv_insb = bigsur_insb, - .mv_insw = bigsur_insw, - .mv_insl = bigsur_insl, - .mv_outsb = bigsur_outsb, - .mv_outsw = bigsur_outsw, - .mv_outsl = bigsur_outsl, - - .mv_readb = generic_readb, - .mv_readw = generic_readw, - .mv_readl = generic_readl, - .mv_writeb = generic_writeb, - .mv_writew = generic_writew, - .mv_writel = generic_writel, - - .mv_ioremap = generic_ioremap, - .mv_iounmap = generic_iounmap, - - .mv_isa_port2addr = bigsur_isa_port2addr, - .mv_irq_demux = bigsur_irq_demux, - - .mv_init_irq = init_bigsur_IRQ, -#ifdef CONFIG_HEARTBEAT - .mv_heartbeat = heartbeat_bigsur, -#endif - -}; -ALIAS_MV(bigsur) diff -puN arch/sh/boards/bigsur/Makefile~sh-merge arch/sh/boards/bigsur/Makefile --- 25/arch/sh/boards/bigsur/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/bigsur/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -6,7 +6,5 @@ # unless it's something special (ie not a .c file). # -obj-y := mach.o setup.o io.o irq.o led.o - -obj-$(CONFIG_PCI) += pci.o +obj-y := setup.o io.o irq.o led.o diff -puN -L arch/sh/boards/bigsur/pci.c arch/sh/boards/bigsur/pci.c~sh-merge /dev/null --- 25/arch/sh/boards/bigsur/pci.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,163 +0,0 @@ -/* - * linux/arch/sh/kernel/pci-bigsur.c - * - * By Dustin McIntire (dustin@sensoria.com) (c)2001 - - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * PCI initialization for the Hitachi Big Sur Evaluation Board - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#define PCI_REG(reg) (SH7751_PCIREG_BASE+reg) - -/* - * Initialize the Big Sur PCI interface - * Setup hardware to be Central Funtion - * Copy the BSR regs to the PCI interface - * Setup PCI windows into local RAM - */ -int __init pcibios_init_platform(void) { - u32 reg; - u32 word; - - PCIDBG(1,"PCI: bigsur_pci_init called\n"); - /* Set the BCR's to enable PCI access */ - reg = inl(SH7751_BCR1); - reg |= 0x80000; - outl(reg, SH7751_BCR1); - - /* Setup the host hardware */ - if(inl(PCI_REG(SH7751_PCICONF0)) != - (u32)((SH7751_DEVICE_ID <<16) | (SH7751_VENDOR_ID))) { - printk("PCI: Unkown PCI host bridge.\n"); - return 0; - } - printk("PCI: SH7751 PCI host bridge found.\n"); - - /* Turn the clocks back on (not done in reset)*/ - outl(0, PCI_REG(SH7751_PCICLKR)); - /* Clear Powerdown IRQ's (not done in reset) */ - word = SH7751_PCIPINT_D3 | SH7751_PCIPINT_D0; - outl(word, PCI_REG(SH7751_PCICLKR)); - - /* toggle PCI reset pin */ - word = SH7751_PCICR_PREFIX | SH7751_PCICR_PRST; - outl(word,PCI_REG(SH7751_PCICR)); - /* Wait for a long time... not 1 sec. but long enough */ - mdelay(100); - word = SH7751_PCICR_PREFIX; - outl(word,PCI_REG(SH7751_PCICR)); - - /* set the command/status bits to: - * Wait Cycle Control + Parity Enable + Bus Master + - * Mem space enable - */ - word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER | - SH7751_PCICONF1_BUM | SH7751_PCICONF1_MES; - outl(word, PCI_REG(SH7751_PCICONF1)); - - /* define this host as the host bridge */ - word = SH7751_PCI_HOST_BRIDGE << 24; - outl(word, PCI_REG(SH7751_PCICONF2)); - - /* Set IO and Mem windows to local address - * Make PCI and local address the same for easy 1 to 1 mapping - * Window0 = BIGSUR_LSR0_SIZE @ non-cached CS3 base = SDRAM - * Window1 = BIGSUR_LSR1_SIZE @ cached CS3 base = SDRAM - */ - word = BIGSUR_LSR0_SIZE - 1; - outl(word, PCI_REG(SH7751_PCILSR0)); - word = BIGSUR_LSR1_SIZE - 1; - outl(word, PCI_REG(SH7751_PCILSR1)); - /* Set the values on window 0 PCI config registers */ - word = P2SEGADDR(SH7751_CS3_BASE_ADDR); - outl(word, PCI_REG(SH7751_PCILAR0)); - outl(word, PCI_REG(SH7751_PCICONF5)); - /* Set the values on window 1 PCI config registers */ - word = PHYSADDR(SH7751_CS3_BASE_ADDR); - outl(word, PCI_REG(SH7751_PCILAR1)); - outl(word, PCI_REG(SH7751_PCICONF6)); - - /* Set the local 16MB PCI memory space window to - * the lowest PCI mapped address - */ - word = PCIBIOS_MIN_MEM & SH7751_PCIMBR_MASK; - PCIDBG(2,"PCI: Setting upper bits of Memory window to 0x%x\n", word); - outl(word , PCI_REG(SH7751_PCIMBR)); - - /* Map IO space into PCI IO window - * The IO window is 64K-PCIBIOS_MIN_IO in size - * IO addresses will be translated to the - * PCI IO window base address - */ - PCIDBG(3,"PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n", PCIBIOS_MIN_IO, - (64*1024), SH7751_PCI_IO_BASE+PCIBIOS_MIN_IO); - bigsur_port_map(PCIBIOS_MIN_IO, (64*1024), SH7751_PCI_IO_BASE+PCIBIOS_MIN_IO,0); - - /* Make sure the MSB's of IO window are set to access PCI space correctly */ - word = PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK; - PCIDBG(2,"PCI: Setting upper bits of IO window to 0x%x\n", word); - outl(word, PCI_REG(SH7751_PCIIOBR)); - - /* Set PCI WCRx, BCRx's, copy from BSC locations */ - word = inl(SH7751_BCR1); - /* check BCR for SDRAM in area 3 */ - if(((word >> 3) & 1) == 0) { - printk("PCI: Area 3 is not configured for SDRAM. BCR1=0x%x\n", word); - return 0; - } - outl(word, PCI_REG(SH7751_PCIBCR1)); - word = (u16)inw(SH7751_BCR2); - /* check BCR2 for 32bit SDRAM interface*/ - if(((word >> 6) & 0x3) != 0x3) { - printk("PCI: Area 3 is not 32 bit SDRAM. BCR2=0x%x\n", word); - return 0; - } - outl(word, PCI_REG(SH7751_PCIBCR2)); - /* configure the wait control registers */ - word = inl(SH7751_WCR1); - outl(word, PCI_REG(SH7751_PCIWCR1)); - word = inl(SH7751_WCR2); - outl(word, PCI_REG(SH7751_PCIWCR2)); - word = inl(SH7751_WCR3); - outl(word, PCI_REG(SH7751_PCIWCR3)); - word = inl(SH7751_MCR); - outl(word, PCI_REG(SH7751_PCIMCR)); - - /* NOTE: I'm ignoring the PCI error IRQs for now.. - * TODO: add support for the internal error interrupts and - * DMA interrupts... - */ - - /* SH7751 init done, set central function init complete */ - word = SH7751_PCICR_PREFIX | SH7751_PCICR_CFIN; - outl(word,PCI_REG(SH7751_PCICR)); - PCIDBG(2,"PCI: bigsur_pci_init finished\n"); - - return 1; -} - -int pcibios_map_platform_irq(u8 slot, u8 pin) -{ - /* The Big Sur can be used in a CPCI chassis, but the SH7751 PCI interface is on the - * wrong end of the board so that it can also support a V320 CPI interface chip... - * Therefor the IRQ mapping is somewhat use dependent... I'l assume a linear map for - * now, i.e. INTA=slot0,pin0... INTD=slot3,pin0... - */ - int irq = (slot + pin-1)%4 + BIGSUR_SH7751_PCI_IRQ_BASE; - PCIDBG(2,"PCI: Mapping Big Sur IRQ for slot %d, pin %c to irq %d\n", slot, pin-1+'A', irq); - return irq; - -} diff -puN arch/sh/boards/bigsur/setup.c~sh-merge arch/sh/boards/bigsur/setup.c --- 25/arch/sh/boards/bigsur/setup.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/bigsur/setup.c 2004-01-09 21:32:27.000000000 -0800 @@ -33,22 +33,11 @@ #include #include #include - +#include #include #include #include -//#define BIGSUR_DEBUG 3 -#undef BIGSUR_DEBUG - -#ifdef BIGSUR_DEBUG -#define DPRINTK(args...) printk(args) -#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args) -#else -#define DPRINTK(args...) -#define DIPRINTK(n, args...) -#endif /* BIGSUR_DEBUG */ - /*===========================================================*/ // Big Sur Init Routines /*===========================================================*/ @@ -58,13 +47,27 @@ const char *get_system_type(void) return "Big Sur"; } +/* + * The Machine Vector + */ +extern void heartbeat_bigsur(void); +extern void init_bigsur_IRQ(void); + +struct sh_machine_vector mv_bigsur __initmv = { + .mv_nr_irqs = NR_IRQS, // Defined in + + .mv_isa_port2addr = bigsur_isa_port2addr, + .mv_irq_demux = bigsur_irq_demux, + + .mv_init_irq = init_bigsur_IRQ, +#ifdef CONFIG_HEARTBEAT + .mv_heartbeat = heartbeat_bigsur, +#endif +}; +ALIAS_MV(bigsur) + int __init platform_setup(void) { - static int done = 0; /* run this only once */ - - if (!MACH_BIGSUR || done) return 0; - done = 1; - /* Mask all 2nd level IRQ's */ outb(-1,BIGSUR_IMR0); outb(-1,BIGSUR_IMR1); @@ -88,7 +91,6 @@ int __init platform_setup(void) /* set the IO port to BIGSUR_ETHER_IOPORT */ outw(BIGSUR_ETHER_IOPORT<<3, BIGSUR_ETHR+0x2); - return 0; + return 0; } -module_init(setup_bigsur); diff -puN -L arch/sh/boards/cat68701/io.c arch/sh/boards/cat68701/io.c~sh-merge /dev/null --- 25/arch/sh/boards/cat68701/io.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,207 +0,0 @@ -/* - * linux/arch/sh/boards/cat68701/io.c - * - * Copyright (C) 2000 Niibe Yutaka - * 2001 Yutaro Ebihara - * - * I/O routines for A-ONE Corp CAT-68701 SH7708 Board - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - */ - -#include -#include -#include -#include - -#define SH3_PCMCIA_BUG_WORKAROUND 1 -#define DUMMY_READ_AREA6 0xba000000 - -#define PORT2ADDR(x) (cat68701_isa_port2addr(x)) - -static inline void delay(void) -{ - ctrl_inw(0xa0000000); -} - -unsigned char cat68701_inb(unsigned long port) -{ - return *(volatile unsigned char*)PORT2ADDR(port); -} - -unsigned short cat68701_inw(unsigned long port) -{ - return *(volatile unsigned short*)PORT2ADDR(port); -} - -unsigned int cat68701_inl(unsigned long port) -{ - return *(volatile unsigned long*)PORT2ADDR(port); -} - -unsigned char cat68701_inb_p(unsigned long port) -{ - unsigned long v = *(volatile unsigned char*)PORT2ADDR(port); - - delay(); - return v; -} - -unsigned short cat68701_inw_p(unsigned long port) -{ - unsigned long v = *(volatile unsigned short*)PORT2ADDR(port); - - delay(); - return v; -} - -unsigned int cat68701_inl_p(unsigned long port) -{ - unsigned long v = *(volatile unsigned long*)PORT2ADDR(port); - - delay(); - return v; -} - -void cat68701_insb(unsigned long port, void *buffer, unsigned long count) -{ - unsigned char *buf=buffer; - while(count--) *buf++=inb(port); -} - -void cat68701_insw(unsigned long port, void *buffer, unsigned long count) -{ - unsigned short *buf=buffer; - while(count--) *buf++=inw(port); -#ifdef SH3_PCMCIA_BUG_WORKAROUND - ctrl_inb (DUMMY_READ_AREA6); -#endif -} - -void cat68701_insl(unsigned long port, void *buffer, unsigned long count) -{ - unsigned long *buf=buffer; - while(count--) *buf++=inl(port); -#ifdef SH3_PCMCIA_BUG_WORKAROUND - ctrl_inb (DUMMY_READ_AREA6); -#endif -} - -void cat68701_outb(unsigned char b, unsigned long port) -{ - *(volatile unsigned char*)PORT2ADDR(port) = b; -} - -void cat68701_outw(unsigned short b, unsigned long port) -{ - *(volatile unsigned short*)PORT2ADDR(port) = b; -} - -void cat68701_outl(unsigned int b, unsigned long port) -{ - *(volatile unsigned long*)PORT2ADDR(port) = b; -} - -void cat68701_outb_p(unsigned char b, unsigned long port) -{ - *(volatile unsigned char*)PORT2ADDR(port) = b; - delay(); -} - -void cat68701_outw_p(unsigned short b, unsigned long port) -{ - *(volatile unsigned short*)PORT2ADDR(port) = b; - delay(); -} - -void cat68701_outl_p(unsigned int b, unsigned long port) -{ - *(volatile unsigned long*)PORT2ADDR(port) = b; - delay(); -} - -void cat68701_outsb(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned char *buf=buffer; - while(count--) outb(*buf++, port); -} - -void cat68701_outsw(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned short *buf=buffer; - while(count--) outw(*buf++, port); -#ifdef SH3_PCMCIA_BUG_WORKAROUND - ctrl_inb (DUMMY_READ_AREA6); -#endif -} - -void cat68701_outsl(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned long *buf=buffer; - while(count--) outl(*buf++, port); -#ifdef SH3_PCMCIA_BUG_WORKAROUND - ctrl_inb (DUMMY_READ_AREA6); -#endif -} - -unsigned char cat68701_readb(unsigned long addr) -{ - return *(volatile unsigned char*)addr; -} - -unsigned short cat68701_readw(unsigned long addr) -{ - return *(volatile unsigned short*)addr; -} - -unsigned int cat68701_readl(unsigned long addr) -{ - return *(volatile unsigned long*)addr; -} - -void cat68701_writeb(unsigned char b, unsigned long addr) -{ - *(volatile unsigned char*)addr = b; -} - -void cat68701_writew(unsigned short b, unsigned long addr) -{ - *(volatile unsigned short*)addr = b; -} - -void cat68701_writel(unsigned int b, unsigned long addr) -{ - *(volatile unsigned long*)addr = b; -} - -void * cat68701_ioremap(unsigned long offset, unsigned long size) -{ - return (void *) P2SEGADDR(offset); -} -EXPORT_SYMBOL(cat68701_ioremap); - -void cat68701_iounmap(void *addr) -{ -} -EXPORT_SYMBOL(cat68701_iounmap); - -unsigned long cat68701_isa_port2addr(unsigned long offset) -{ - /* CompactFlash (IDE) */ - if(((offset >= 0x1f0) && (offset <= 0x1f7)) || (offset==0x3f6)) - return 0xba000000 + offset; - - /* INPUT PORT */ - if((offset >= 0x3fc) && (offset <= 0x3fd)) - return 0xb4007000 + offset; - - /* OUTPUT PORT */ - if((offset >= 0x3fe) && (offset <= 0x3ff)) - return 0xb4007400 + offset; - - return offset + 0xb4000000; /* other I/O (EREA 5)*/ -} - diff -puN -L arch/sh/boards/cat68701/mach.c arch/sh/boards/cat68701/mach.c~sh-merge /dev/null --- 25/arch/sh/boards/cat68701/mach.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,66 +0,0 @@ -/* - * linux/arch/sh/boards/cat68701/mach.c - * - * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com) - * 2001 Yutaro Ebihara (ebihara@si-linux.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Machine vector for the A-ONE corp. CAT-68701 SH7708 board - */ - -#include -#include - -#include -#include -#include -#include - -/* - * The Machine Vector - */ - -struct sh_machine_vector mv_cat68701 __initmv = { - .mv_nr_irqs = 32, - .mv_inb = cat68701_inb, - .mv_inw = cat68701_inw, - .mv_inl = cat68701_inl, - .mv_outb = cat68701_outb, - .mv_outw = cat68701_outw, - .mv_outl = cat68701_outl, - - .mv_inb_p = cat68701_inb_p, - .mv_inw_p = cat68701_inw, - .mv_inl_p = cat68701_inl, - .mv_outb_p = cat68701_outb_p, - .mv_outw_p = cat68701_outw, - .mv_outl_p = cat68701_outl, - - .mv_insb = cat68701_insb, - .mv_insw = cat68701_insw, - .mv_insl = cat68701_insl, - .mv_outsb = cat68701_outsb, - .mv_outsw = cat68701_outsw, - .mv_outsl = cat68701_outsl, - - .mv_readb = cat68701_readb, - .mv_readw = cat68701_readw, - .mv_readl = cat68701_readl, - .mv_writeb = cat68701_writeb, - .mv_writew = cat68701_writew, - .mv_writel = cat68701_writel, - - .mv_ioremap = cat68701_ioremap, - .mv_iounmap = cat68701_iounmap, - - .mv_isa_port2addr = cat68701_isa_port2addr, - .mv_irq_demux = cat68701_irq_demux, - - .mv_init_irq = init_cat68701_IRQ, -#ifdef CONFIG_HEARTBEAT - .mv_heartbeat = heartbeat_cat68701, -#endif -}; -ALIAS_MV(cat68701) diff -puN arch/sh/boards/cat68701/Makefile~sh-merge arch/sh/boards/cat68701/Makefile --- 25/arch/sh/boards/cat68701/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/cat68701/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -6,5 +6,5 @@ # unless it's something special (ie not a .c file). # -obj-y := mach.o setup.o io.o irq.o +obj-y := setup.o irq.o diff -puN arch/sh/boards/cat68701/setup.c~sh-merge arch/sh/boards/cat68701/setup.c --- 25/arch/sh/boards/cat68701/setup.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/cat68701/setup.c 2004-01-09 21:32:27.000000000 -0800 @@ -14,21 +14,18 @@ #include #include +#include #include #include +#include +#include const char *get_system_type(void) { return "CAT-68701"; } -void platform_setup() -{ - /* dummy read erea5 (CS8900A) */ -} - #ifdef CONFIG_HEARTBEAT -#include void heartbeat_cat68701() { static unsigned int cnt = 0, period = 0 , bit = 0; @@ -49,3 +46,41 @@ void heartbeat_cat68701() } #endif /* CONFIG_HEARTBEAT */ +unsigned long cat68701_isa_port2addr(unsigned long offset) +{ + /* CompactFlash (IDE) */ + if (((offset >= 0x1f0) && (offset <= 0x1f7)) || (offset==0x3f6)) + return 0xba000000 + offset; + + /* INPUT PORT */ + if ((offset >= 0x3fc) && (offset <= 0x3fd)) + return 0xb4007000 + offset; + + /* OUTPUT PORT */ + if ((offset >= 0x3fe) && (offset <= 0x3ff)) + return 0xb4007400 + offset; + + return offset + 0xb4000000; /* other I/O (EREA 5)*/ +} + +/* + * The Machine Vector + */ + +struct sh_machine_vector mv_cat68701 __initmv = { + .mv_nr_irqs = 32, + .mv_isa_port2addr = cat68701_isa_port2addr, + .mv_irq_demux = cat68701_irq_demux, + + .mv_init_irq = init_cat68701_IRQ, +#ifdef CONFIG_HEARTBEAT + .mv_heartbeat = heartbeat_cat68701, +#endif +}; +ALIAS_MV(cat68701) + +int __init platform_setup(void) +{ + /* dummy read erea5 (CS8900A) */ +} + diff -puN -L arch/sh/boards/cqreek/io.c arch/sh/boards/cqreek/io.c~sh-merge /dev/null --- 25/arch/sh/boards/cqreek/io.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,14 +0,0 @@ -#define IDE_OFFSET 0xA4000000UL -#define ISA_OFFSET 0xA4A00000UL - -unsigned long cqreek_port2addr(unsigned long port) -{ - if (0x0000<=port && port<=0x0040) - return IDE_OFFSET + port; - if ((0x01f0<=port && port<=0x01f7) || port == 0x03f6) - return IDE_OFFSET + port; - - return ISA_OFFSET + port; -} - - diff -puN -L arch/sh/boards/cqreek/mach.c arch/sh/boards/cqreek/mach.c~sh-merge /dev/null --- 25/arch/sh/boards/cqreek/mach.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,66 +0,0 @@ -/* $Id: mach.c,v 1.1.2.4.2.1 2003/01/10 17:26:32 lethal Exp $ - * - * arch/sh/kernel/setup_cqreek.c - * - * Copyright (C) 2000 Niibe Yutaka - * - * CqREEK IDE/ISA Bridge Support. - * - */ - -#include -#include -#include -#include -#include -#include - -/* - * The Machine Vector - */ - -struct sh_machine_vector mv_cqreek __initmv = { -#if defined(CONFIG_CPU_SH4) - .mv_nr_irqs = 48, -#elif defined(CONFIG_CPU_SUBTYPE_SH7708) - .mv_nr_irqs = 32, -#elif defined(CONFIG_CPU_SUBTYPE_SH7709) - .mv_nr_irqs = 61, -#endif - - .mv_inb = generic_inb, - .mv_inw = generic_inw, - .mv_inl = generic_inl, - .mv_outb = generic_outb, - .mv_outw = generic_outw, - .mv_outl = generic_outl, - - .mv_inb_p = generic_inb_p, - .mv_inw_p = generic_inw_p, - .mv_inl_p = generic_inl_p, - .mv_outb_p = generic_outb_p, - .mv_outw_p = generic_outw_p, - .mv_outl_p = generic_outl_p, - - .mv_insb = generic_insb, - .mv_insw = generic_insw, - .mv_insl = generic_insl, - .mv_outsb = generic_outsb, - .mv_outsw = generic_outsw, - .mv_outsl = generic_outsl, - - .mv_readb = generic_readb, - .mv_readw = generic_readw, - .mv_readl = generic_readl, - .mv_writeb = generic_writeb, - .mv_writew = generic_writew, - .mv_writel = generic_writel, - - .mv_init_irq = init_cqreek_IRQ, - - .mv_isa_port2addr = cqreek_port2addr, - - .mv_ioremap = generic_ioremap, - .mv_iounmap = generic_iounmap, -}; -ALIAS_MV(cqreek) diff -puN arch/sh/boards/cqreek/Makefile~sh-merge arch/sh/boards/cqreek/Makefile --- 25/arch/sh/boards/cqreek/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/cqreek/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -6,5 +6,5 @@ # unless it's something special (ie not a .c file). # -obj-y := mach.o setup.o io.o irq.o +obj-y := setup.o irq.o diff -puN arch/sh/boards/cqreek/setup.c~sh-merge arch/sh/boards/cqreek/setup.c --- 25/arch/sh/boards/cqreek/setup.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/cqreek/setup.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: setup.c,v 1.1.2.5 2002/03/02 21:57:07 lethal Exp $ +/* $Id: setup.c,v 1.5 2003/08/04 01:51:58 lethal Exp $ * * arch/sh/kernel/setup_cqreek.c * @@ -13,17 +13,49 @@ #include #include -#include +#include +#include #include #include #include #include +#define IDE_OFFSET 0xA4000000UL +#define ISA_OFFSET 0xA4A00000UL + const char *get_system_type(void) { return "CqREEK"; } +static unsigned long cqreek_port2addr(unsigned long port) +{ + if (0x0000<=port && port<=0x0040) + return IDE_OFFSET + port; + if ((0x01f0<=port && port<=0x01f7) || port == 0x03f6) + return IDE_OFFSET + port; + + return ISA_OFFSET + port; +} + +/* + * The Machine Vector + */ +struct sh_machine_vector mv_cqreek __initmv = { +#if defined(CONFIG_CPU_SH4) + .mv_nr_irqs = 48, +#elif defined(CONFIG_CPU_SUBTYPE_SH7708) + .mv_nr_irqs = 32, +#elif defined(CONFIG_CPU_SUBTYPE_SH7709) + .mv_nr_irqs = 61, +#endif + + .mv_init_irq = init_cqreek_IRQ, + + .mv_isa_port2addr = cqreek_port2addr, +}; +ALIAS_MV(cqreek) + /* * Initialize the board */ diff -puN arch/sh/boards/dmida/mach.c~sh-merge arch/sh/boards/dmida/mach.c --- 25/arch/sh/boards/dmida/mach.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/dmida/mach.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,5 +1,5 @@ /* - * linux/arch/sh/kernel/mach_dmida.c + * linux/arch/sh/boards/dmida/mach.c * * by Greg Banks * (c) 2000 PocketPenguins Inc @@ -30,8 +30,6 @@ */ struct sh_machine_vector mv_dmida __initmv = { - .mv_name = "DMIDA", - .mv_nr_irqs = HD64465_IRQ_BASE+HD64465_IRQ_NUM, .mv_inb = hd64465_inb, @@ -55,17 +53,7 @@ struct sh_machine_vector mv_dmida __init .mv_outsw = hd64465_outsw, .mv_outsl = hd64465_outsl, - .mv_readb = generic_readb, - .mv_readw = generic_readw, - .mv_readl = generic_readl, - .mv_writeb = generic_writeb, - .mv_writew = generic_writew, - .mv_writel = generic_writel, - .mv_irq_demux = hd64465_irq_demux, - - .mv_rtc_gettimeofday = sh_rtc_gettimeofday, - .mv_rtc_settimeofday = sh_rtc_settimeofday, }; ALIAS_MV(dmida) diff -puN -L arch/sh/boards/dreamcast/io.c arch/sh/boards/dreamcast/io.c~sh-merge /dev/null --- 25/arch/sh/boards/dreamcast/io.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,12 +0,0 @@ -/* - * $Id: io.c,v 1.1.2.1 2002/01/19 23:54:19 mrbrown Exp $ - * I/O routines for SEGA Dreamcast - */ - -#include -#include - -unsigned long dreamcast_isa_port2addr(unsigned long offset) -{ - return offset + 0xa0000000; -} diff -puN -L arch/sh/boards/dreamcast/mach.c arch/sh/boards/dreamcast/mach.c~sh-merge /dev/null --- 25/arch/sh/boards/dreamcast/mach.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,60 +0,0 @@ -/* - * $Id: mach.c,v 1.4 2003/05/20 03:04:36 lethal Exp $ - * SEGA Dreamcast machine vector - */ - -#include -#include -#include - -#include -#include - -#include -#include -#include - -void __init dreamcast_pcibios_init(void); - -/* - * The Machine Vector - */ - -struct sh_machine_vector mv_dreamcast __initmv = { - .mv_nr_irqs = NR_IRQS, - - .mv_inb = generic_inb, - .mv_inw = generic_inw, - .mv_inl = generic_inl, - .mv_outb = generic_outb, - .mv_outw = generic_outw, - .mv_outl = generic_outl, - - .mv_inb_p = generic_inb_p, - .mv_inw_p = generic_inw, - .mv_inl_p = generic_inl, - .mv_outb_p = generic_outb_p, - .mv_outw_p = generic_outw, - .mv_outl_p = generic_outl, - - .mv_insb = generic_insb, - .mv_insw = generic_insw, - .mv_insl = generic_insl, - .mv_outsb = generic_outsb, - .mv_outsw = generic_outsw, - .mv_outsl = generic_outsl, - - .mv_readb = generic_readb, - .mv_readw = generic_readw, - .mv_readl = generic_readl, - .mv_writeb = generic_writeb, - .mv_writew = generic_writew, - .mv_writel = generic_writel, - - .mv_ioremap = generic_ioremap, - .mv_iounmap = generic_iounmap, - - .mv_isa_port2addr = dreamcast_isa_port2addr, - .mv_irq_demux = systemasic_irq_demux, -}; -ALIAS_MV(dreamcast) diff -puN arch/sh/boards/dreamcast/Makefile~sh-merge arch/sh/boards/dreamcast/Makefile --- 25/arch/sh/boards/dreamcast/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/dreamcast/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -6,7 +6,5 @@ # unless it's something special (ie not a .c file). # -obj-y := mach.o setup.o io.o irq.o rtc.o - -obj-$(CONFIG_PCI) += pci.o +obj-y := setup.o irq.o rtc.o diff -puN -L arch/sh/boards/dreamcast/pci.c arch/sh/boards/dreamcast/pci.c~sh-merge /dev/null --- 25/arch/sh/boards/dreamcast/pci.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,214 +0,0 @@ -/* - $ $Id: pci.c,v 1.1.2.4.2.1 2003/03/31 14:33:18 lethal Exp $ - * Dreamcast PCI: Supports SEGA Broadband Adaptor only. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#define GAPSPCI_REGS 0x01001400 -#define GAPSPCI_DMA_BASE 0x01840000 -#define GAPSPCI_DMA_SIZE 32768 -#define GAPSPCI_BBA_CONFIG 0x01001600 - -#define GAPSPCI_IRQ HW_EVENT_EXTERNAL - -static int gapspci_dma_used; - -/* XXX: Uh... */ -static struct resource gapspci_io_resource = { - "GAPSPCI IO", - 0x01001600, - 0x010016ff, - IORESOURCE_IO -}; - -static struct resource gapspci_mem_resource = { - "GAPSPCI mem", - 0x01840000, - 0x01847fff, - IORESOURCE_MEM -}; - -static struct pci_ops gapspci_pci_ops; -struct pci_channel board_pci_channels[] = { - {&gapspci_pci_ops, &gapspci_io_resource, &gapspci_mem_resource, 0, 1}, - {NULL, NULL, NULL, 0, 0}, -}; - -struct pci_fixup pcibios_fixups[] = { - {0, 0, 0, NULL} -}; - -#define BBA_SELECTED(bus,devfn) (bus->number==0 && devfn==0) - -static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val) -{ - switch (size) { - case 1: - if (BBA_SELECTED(bus, devfn)) - *val = (u8)inb(GAPSPCI_BBA_CONFIG+where); - else - *val = (u8)0xff; - break; - case 2: - if (BBA_SELECTED(bus, devfn)) - *val = (u16)inw(GAPSPCI_BBA_CONFIG+where); - else - *val = (u16)0xffff; - break; - case 4: - if (BBA_SELECTED(bus, devfn)) - *val = inl(GAPSPCI_BBA_CONFIG+where); - else - *val = 0xffffffff; - break; - } - return PCIBIOS_SUCCESSFUL; -} - -static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) -{ - if (BBA_SELECTED(bus, devfn)) { - switch (size) { - case 1: - if (BBA_SELECTED(bus, devfn)) - outb((u8)val, GAPSPCI_BBA_CONFIG+where); - break; - case 2: - if (BBA_SELECTED(bus, devfn)) - outw((u16)val, GAPSPCI_BBA_CONFIG+where); - break; - case 4: - if (BBA_SELECTED(bus, devfn)) - outl(val, GAPSPCI_BBA_CONFIG+where); - break; - } - } - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops gapspci_pci_ops = { - .read = gapspci_read, - .write = gapspci_write, -}; - - -void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, - dma_addr_t * dma_handle) -{ - unsigned long buf; - - if (gapspci_dma_used+size > GAPSPCI_DMA_SIZE) - return NULL; - - buf = GAPSPCI_DMA_BASE+gapspci_dma_used; - - gapspci_dma_used = PAGE_ALIGN(gapspci_dma_used+size); - - printk("pci_alloc_consistent: %ld bytes at 0x%lx\n", (long)size, buf); - - *dma_handle = (dma_addr_t)buf; - - return (void *)P2SEGADDR(buf); -} - - -void pci_free_consistent(struct pci_dev *hwdev, size_t size, - void *vaddr, dma_addr_t dma_handle) -{ - /* XXX */ - gapspci_dma_used = 0; -} - - -void __init pcibios_fixup_bus(struct pci_bus *bus) -{ - struct list_head *ln; - struct pci_dev *dev; - - for (ln=bus->devices.next; ln != &bus->devices; ln=ln->next) { - dev = pci_dev_b(ln); - if (!BBA_SELECTED(bus, dev->devfn)) continue; - - printk("PCI: MMIO fixup to %s\n", dev->dev.name); - dev->resource[1].start=0x01001700; - dev->resource[1].end=0x010017ff; - } -} - - -static u8 __init no_swizzle(struct pci_dev *dev, u8 * pin) -{ - return PCI_SLOT(dev->devfn); -} - - -static int __init map_dc_irq(struct pci_dev *dev, u8 slot, u8 pin) -{ - return GAPSPCI_IRQ; -} - -void __init pcibios_fixup(void) { /* Do nothing. */ } - -void __init pcibios_fixup_irqs(void) -{ - pci_fixup_irqs(no_swizzle, map_dc_irq); -} - -int __init gapspci_init(void) -{ - int i; - char idbuf[16]; - - for(i=0; i<16; i++) - idbuf[i]=inb(GAPSPCI_REGS+i); - - if(strncmp(idbuf, "GAPSPCI_BRIDGE_2", 16)) - return -1; - - outl(0x5a14a501, GAPSPCI_REGS+0x18); - - for(i=0; i<1000000; i++); - - if(inl(GAPSPCI_REGS+0x18)!=1) - return -1; - - outl(0x01000000, GAPSPCI_REGS+0x20); - outl(0x01000000, GAPSPCI_REGS+0x24); - - outl(GAPSPCI_DMA_BASE, GAPSPCI_REGS+0x28); - outl(GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE, GAPSPCI_REGS+0x2c); - - outl(1, GAPSPCI_REGS+0x14); - outl(1, GAPSPCI_REGS+0x34); - - gapspci_dma_used=0; - - /* Setting Broadband Adapter */ - outw(0xf900, GAPSPCI_BBA_CONFIG+0x06); - outl(0x00000000, GAPSPCI_BBA_CONFIG+0x30); - outb(0x00, GAPSPCI_BBA_CONFIG+0x3c); - outb(0xf0, GAPSPCI_BBA_CONFIG+0x0d); - outw(0x0006, GAPSPCI_BBA_CONFIG+0x04); - outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10); - outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14); - - return 0; -} - -/* Haven't done anything here as yet */ -char * __devinit pcibios_setup(char *str) -{ - return str; -} diff -puN arch/sh/boards/dreamcast/setup.c~sh-merge arch/sh/boards/dreamcast/setup.c --- 25/arch/sh/boards/dreamcast/setup.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/dreamcast/setup.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,9 +1,10 @@ -/* arch/sh/kernel/setup_dc.c +/* + * arch/sh/boards/dreamcast/setup.c * * Hardware support for the Sega Dreamcast. * * Copyright (c) 2001, 2002 M. R. Brown - * Copyright (c) 2002 Paul Mundt + * Copyright (c) 2002, 2003 Paul Mundt * * This file is part of the LinuxDC project (www.linuxdc.org) * @@ -23,21 +24,27 @@ #include #include -#include +#include +#include +#include extern struct hw_interrupt_type systemasic_int; /* XXX: Move this into it's proper header. */ extern void (*board_time_init)(void); extern void aica_time_init(void); - +extern int gapspci_init(void); +extern int systemasic_irq_demux(int); const char *get_system_type(void) { return "Sega Dreamcast"; } -#ifdef CONFIG_PCI -extern int gapspci_init(void); -#endif +struct sh_machine_vector mv_dreamcast __initmv = { + .mv_nr_irqs = NR_IRQS, + + .mv_irq_demux = systemasic_irq_demux, +}; +ALIAS_MV(dreamcast) int __init platform_setup(void) { @@ -49,6 +56,8 @@ int __init platform_setup(void) /* Acknowledge any previous events */ /* XXX */ + __set_io_port_base(0xa0000000); + /* Assign all virtual IRQs to the System ASIC int. handler */ for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) irq_desc[i].handler = &systemasic_int; diff -puN -L arch/sh/boards/ec3104/mach.c arch/sh/boards/ec3104/mach.c~sh-merge /dev/null --- 25/arch/sh/boards/ec3104/mach.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,69 +0,0 @@ -/* - * linux/arch/sh/kernel/mach_ec3104.c - * EC3104 companion chip support - * - * Copyright (C) 2000 Philipp Rumpf - * - */ -/* EC3104 note: - * This code was written without any documentation about the EC3104 chip. While - * I hope I got most of the basic functionality right, the register names I use - * are most likely completely different from those in the chip documentation. - * - * If you have any further information about the EC3104, please tell me - * (prumpf@tux.org). - */ - -#include - -#include -#include -#include - -#include -#include - -/* - * The Machine Vector - */ - -struct sh_machine_vector mv_ec3104 __initmv = { - .mv_name = "EC3104", - - .mv_nr_irqs = 96, - - .mv_inb = ec3104_inb, - .mv_inw = ec3104_inw, - .mv_inl = ec3104_inl, - .mv_outb = ec3104_outb, - .mv_outw = ec3104_outw, - .mv_outl = ec3104_outl, - - .mv_inb_p = generic_inb_p, - .mv_inw_p = generic_inw, - .mv_inl_p = generic_inl, - .mv_outb_p = generic_outb_p, - .mv_outw_p = generic_outw, - .mv_outl_p = generic_outl, - - .mv_insb = generic_insb, - .mv_insw = generic_insw, - .mv_insl = generic_insl, - .mv_outsb = generic_outsb, - .mv_outsw = generic_outsw, - .mv_outsl = generic_outsl, - - .mv_readb = generic_readb, - .mv_readw = generic_readw, - .mv_readl = generic_readl, - .mv_writeb = generic_writeb, - .mv_writew = generic_writew, - .mv_writel = generic_writel, - - .mv_irq_demux = ec3104_irq_demux, - - .mv_rtc_gettimeofday = sh_rtc_gettimeofday, - .mv_rtc_settimeofday = sh_rtc_settimeofday, -}; - -ALIAS_MV(ec3104) diff -puN arch/sh/boards/ec3104/Makefile~sh-merge arch/sh/boards/ec3104/Makefile --- 25/arch/sh/boards/ec3104/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/ec3104/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -6,5 +6,5 @@ # unless it's something special (ie not a .c file). # -obj-y := mach.o setup.o io.o irq.o +obj-y := setup.o io.o irq.o diff -puN arch/sh/boards/ec3104/setup.c~sh-merge arch/sh/boards/ec3104/setup.c --- 25/arch/sh/boards/ec3104/setup.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/ec3104/setup.c 2004-01-09 21:32:27.000000000 -0800 @@ -24,16 +24,38 @@ #include #include -#include +#include +#include -int __init setup_ec3104(void) +const char *get_system_type(void) +{ + return "EC3104"; +} + +/* + * The Machine Vector + */ + +struct sh_machine_vector mv_ec3104 __initmv = { + .mv_nr_irqs = 96, + + .mv_inb = ec3104_inb, + .mv_inw = ec3104_inw, + .mv_inl = ec3104_inl, + .mv_outb = ec3104_outb, + .mv_outw = ec3104_outw, + .mv_outl = ec3104_outl, + + .mv_irq_demux = ec3104_irq_demux, +}; + +ALIAS_MV(ec3104) + +int __init platform_setup(void) { char str[8]; int i; - if (!MACH_EC3104) - printk("!MACH_EC3104\n"); - if (0) return 0; @@ -54,4 +76,3 @@ int __init setup_ec3104(void) return 0; } -module_init(setup_ec3104); diff -puN arch/sh/boards/harp/mach.c~sh-merge arch/sh/boards/harp/mach.c --- 25/arch/sh/boards/harp/mach.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/harp/mach.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,5 +1,5 @@ /* - * linux/arch/sh/stboards/mach.c + * linux/arch/sh/boards/harp/mach.c * * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com) * @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include void setup_harp(void); @@ -49,16 +49,6 @@ struct sh_machine_vector mv_harp __initm .mv_outsw = hd64465_outsw, .mv_outsl = hd64465_outsl, - .mv_readb = generic_readb, - .mv_readw = generic_readw, - .mv_readl = generic_readl, - .mv_writeb = generic_writeb, - .mv_writew = generic_writew, - .mv_writel = generic_writel, - - .mv_ioremap = generic_ioremap, - .mv_iounmap = generic_iounmap, - .mv_isa_port2addr = hd64465_isa_port2addr, #ifdef CONFIG_PCI diff -puN arch/sh/boards/hp6xx/hp620/mach.c~sh-merge arch/sh/boards/hp6xx/hp620/mach.c --- 25/arch/sh/boards/hp6xx/hp620/mach.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/hp6xx/hp620/mach.c 2004-01-09 21:32:27.000000000 -0800 @@ -24,8 +24,6 @@ */ struct sh_machine_vector mv_hp620 __initmv = { - .mv_name = "hp620", - .mv_nr_irqs = HD64461_IRQBASE+HD64461_IRQ_NUM, .mv_inb = hd64461_inb, @@ -49,16 +47,6 @@ struct sh_machine_vector mv_hp620 __init .mv_outsw = hd64461_outsw, .mv_outsl = hd64461_outsl, - .mv_readb = generic_readb, - .mv_readw = generic_readw, - .mv_readl = generic_readl, - .mv_writeb = generic_writeb, - .mv_writew = generic_writew, - .mv_writel = generic_writel, - .mv_irq_demux = hd64461_irq_demux, - - .mv_rtc_gettimeofday = sh_rtc_gettimeofday, - .mv_rtc_settimeofday = sh_rtc_settimeofday, }; ALIAS_MV(hp620) diff -puN arch/sh/boards/hp6xx/hp680/mach.c~sh-merge arch/sh/boards/hp6xx/hp680/mach.c --- 25/arch/sh/boards/hp6xx/hp680/mach.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/hp6xx/hp680/mach.c 2004-01-09 21:32:27.000000000 -0800 @@ -20,8 +20,6 @@ #include struct sh_machine_vector mv_hp680 __initmv = { - .mv_name = "hp680", - .mv_nr_irqs = HD64461_IRQBASE+HD64461_IRQ_NUM, .mv_inb = hd64461_inb, @@ -45,16 +43,6 @@ struct sh_machine_vector mv_hp680 __init .mv_outsw = hd64461_outsw, .mv_outsl = hd64461_outsl, - .mv_readb = generic_readb, - .mv_readw = generic_readw, - .mv_readl = generic_readl, - .mv_writeb = generic_writeb, - .mv_writew = generic_writew, - .mv_writel = generic_writel, - .mv_irq_demux = hd64461_irq_demux, - - .mv_rtc_gettimeofday = sh_rtc_gettimeofday, - .mv_rtc_settimeofday = sh_rtc_settimeofday, }; ALIAS_MV(hp680) diff -puN arch/sh/boards/hp6xx/hp690/mach.c~sh-merge arch/sh/boards/hp6xx/hp690/mach.c --- 25/arch/sh/boards/hp6xx/hp690/mach.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/hp6xx/hp690/mach.c 2004-01-09 21:32:27.000000000 -0800 @@ -20,8 +20,6 @@ #include struct sh_machine_vector mv_hp690 __initmv = { - .mv_name = "hp690", - .mv_nr_irqs = HD64461_IRQBASE+HD64461_IRQ_NUM, .mv_inb = hd64461_inb, @@ -45,16 +43,6 @@ struct sh_machine_vector mv_hp690 __init .mv_outsw = hd64461_outsw, .mv_outsl = hd64461_outsl, - .mv_readb = generic_readb, - .mv_readw = generic_readw, - .mv_readl = generic_readl, - .mv_writeb = generic_writeb, - .mv_writew = generic_writew, - .mv_writel = generic_writel, - .mv_irq_demux = hd64461_irq_demux, - - .mv_rtc_gettimeofday = sh_rtc_gettimeofday, - .mv_rtc_settimeofday = sh_rtc_settimeofday, }; ALIAS_MV(hp690) diff -puN -L arch/sh/boards/mpc1211/io.c arch/sh/boards/mpc1211/io.c~sh-merge /dev/null --- 25/arch/sh/boards/mpc1211/io.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,158 +0,0 @@ -/* - * linux/arch/sh/kernel/io_mpc1211.c - * - * Copyright (C) 2001 Saito.K & Jeanne - * - * I/O routine for Interface MPC-1211. - * - */ - -#include -#include -#include -#include -#include - -static inline void delay(void) -{ - ctrl_inw(0xa0000000); -} - -static inline unsigned long port2adr(unsigned long port) -{ - return port + PA_PCI_IO; -} - -unsigned char mpc1211_inb(unsigned long port) -{ - return *(__u8 *)port2adr(port); -} - -unsigned short mpc1211_inw(unsigned long port) -{ - return *(__u16 *)port2adr(port); -} - -unsigned int mpc1211_inl(unsigned long port) -{ - return *(__u32 *)port2adr(port); -} - -void mpc1211_outb(unsigned char value, unsigned long port) -{ - *(__u8 *)port2adr(port) = value; -} - -void mpc1211_outw(unsigned short value, unsigned long port) -{ - *(__u16 *)port2adr(port) = value; -} - -void mpc1211_outl(unsigned int value, unsigned long port) -{ - *(__u32 *)port2adr(port) = value; -} - -unsigned char mpc1211_inb_p(unsigned long port) -{ - unsigned char v; - - v = *(__u8 *)port2adr(port); - delay(); - return v; -} - -void mpc1211_outb_p(unsigned char value, unsigned long port) -{ - *(__u8 *)port2adr(port) = value; - delay(); -} - -void mpc1211_insb(unsigned long port, void *addr, unsigned long count) -{ - volatile __u8 *p = (__u8 *)port2adr(port); - - while (count--) { - *((__u8 *)addr)++ = *p; - } -} - -void mpc1211_insw(unsigned long port, void *addr, unsigned long count) -{ - volatile __u16 *p = (__u16 *)port2adr(port); - - while (count--) { - *((__u16 *)addr)++ = *p; - } -} - -void mpc1211_insl(unsigned long port, void *addr, unsigned long count) -{ - volatile __u32 *p = (__u32 *)port2adr(port); - - while (count--) { - *((__u32 *)addr)++ = *p; - } -} - -void mpc1211_outsb(unsigned long port, const void *addr, unsigned long count) -{ - volatile __u8 *p = (__u8 *)port2adr(port); - - while (count--) { - *p = *((__u8 *)addr)++; - } -} - -void mpc1211_outsw(unsigned long port, const void *addr, unsigned long count) -{ - volatile __u16 *p = (__u16 *)port2adr(port); - - while (count--) { - *p = *((__u16 *)addr)++; - } -} - -void mpc1211_outsl(unsigned long port, const void *addr, unsigned long count) -{ - volatile __u32 *p = (__u32 *)port2adr(port); - - while (count--) { - *p = *((__u32 *)addr)++; - } -} - -unsigned char mpc1211_readb(unsigned long addr) -{ - return *(volatile unsigned char *)addr; -} - -unsigned short mpc1211_readw(unsigned long addr) -{ - return *(volatile unsigned short *)addr; -} - -unsigned int mpc1211_readl(unsigned long addr) -{ - return *(volatile unsigned int *)addr; -} - -void mpc1211_writeb(unsigned char b, unsigned long addr) -{ - *(volatile unsigned char *)addr = b; -} - -void mpc1211_writew(unsigned short b, unsigned long addr) -{ - *(volatile unsigned short *)addr = b; -} - -void mpc1211_writel(unsigned int b, unsigned long addr) -{ - *(volatile unsigned int *)addr = b; -} - -unsigned long mpc1211_isa_port2addr(unsigned long offset) -{ - return port2adr(offset); -} diff -puN -L arch/sh/boards/mpc1211/mach.c arch/sh/boards/mpc1211/mach.c~sh-merge /dev/null --- 25/arch/sh/boards/mpc1211/mach.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,77 +0,0 @@ -/* - * linux/arch/sh/kernel/mach_mpc1211.c - * - * Copyright (C) 2001 Saito.K & Jeanne - * - * Machine vector for the Interface MPC-1211 - */ - -#include -#include - -#include -#include -#include - -#include - -void heartbeat_mpc1211(void); -void setup_mpc1211(void); -void init_mpc1211_IRQ(void); - -/* - * The Machine Vector - */ - -struct sh_machine_vector mv_mpc1211 __initmv = { - .mv_name = "MPC-1211", - - .mv_nr_irqs = 48, - - .mv_inb = mpc1211_inb, - .mv_inw = mpc1211_inw, - .mv_inl = mpc1211_inl, - .mv_outb = mpc1211_outb, - .mv_outw = mpc1211_outw, - .mv_outl = mpc1211_outl, - - .mv_inb_p = mpc1211_inb_p, - .mv_inw_p = mpc1211_inw, - .mv_inl_p = mpc1211_inl, - .mv_outb_p = mpc1211_outb_p, - .mv_outw_p = mpc1211_outw, - .mv_outl_p = mpc1211_outl, - - .mv_insb = mpc1211_insb, - .mv_insw = mpc1211_insw, - .mv_insl = mpc1211_insl, - .mv_outsb = mpc1211_outsb, - .mv_outsw = mpc1211_outsw, - .mv_outsl = mpc1211_outsl, - - .mv_readb = mpc1211_readb, - .mv_readw = mpc1211_readw, - .mv_readl = mpc1211_readl, - .mv_writeb = mpc1211_writeb, - .mv_writew = mpc1211_writew, - .mv_writel = mpc1211_writel, - - .mv_ioremap = generic_ioremap, - .mv_iounmap = generic_iounmap, - - .mv_isa_port2addr = mpc1211_isa_port2addr, - - .mv_irq_demux = mpc1211_irq_demux, - - .mv_init_arch = setup_mpc1211, - .mv_init_irq = init_mpc1211_IRQ, - // mv_init_pci = mpc1211_pcibios_init, - -#ifdef CONFIG_HEARTBEAT - .mv_heartbeat = heartbeat_mpc1211, -#endif - - .mv_rtc_gettimeofday = mpc1211_rtc_gettimeofday, - .mv_rtc_settimeofday = mpc1211_rtc_settimeofday, -}; -ALIAS_MV(mpc1211) diff -puN arch/sh/boards/mpc1211/Makefile~sh-merge arch/sh/boards/mpc1211/Makefile --- 25/arch/sh/boards/mpc1211/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/mpc1211/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -6,7 +6,7 @@ # unless it's something special (ie not a .c file). # -obj-y := mach.o setup.o io.o rtc.o led.o +obj-y := setup.o rtc.o led.o obj-$(CONFIG_PCI) += pci.o diff -puN arch/sh/boards/mpc1211/pci.c~sh-merge arch/sh/boards/mpc1211/pci.c --- 25/arch/sh/boards/mpc1211/pci.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/mpc1211/pci.c 2004-01-09 21:32:27.000000000 -0800 @@ -180,7 +180,8 @@ static void __devinit quirk_ali_ide_port /* Add future fixups here... */ struct pci_fixup pcibios_fixups[] = { - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, quirk_ali_ide_ports }, + { PCI_FIXUP_HEADER, PCI_VENDOR_ID_AL, + PCI_DEVICE_ID_AL_M5229, quirk_ali_ide_ports }, { 0 } }; @@ -273,8 +274,6 @@ static int __init map_mpc1211_irq(struct return irq; } -void __init pcibios_fixup(void) { /* Do nothing. */ } - void __init pcibios_fixup_irqs(void) { pci_fixup_irqs(mpc1211_swizzle, map_mpc1211_irq); diff -puN arch/sh/boards/mpc1211/rtc.c~sh-merge arch/sh/boards/mpc1211/rtc.c --- 25/arch/sh/boards/mpc1211/rtc.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/mpc1211/rtc.c 2004-01-09 21:32:27.000000000 -0800 @@ -143,3 +143,10 @@ int mpc1211_rtc_settimeofday(const struc return set_rtc_mmss(nowtime); } + +void mpc1211_time_init(void) +{ + rtc_get_time = mpc1211_rtc_gettimeofday; + rtc_set_time = mpc1211_rtc_settimeofday; +} + diff -puN arch/sh/boards/mpc1211/setup.c~sh-merge arch/sh/boards/mpc1211/setup.c --- 25/arch/sh/boards/mpc1211/setup.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/mpc1211/setup.c 2004-01-09 21:32:27.000000000 -0800 @@ -13,7 +13,9 @@ #include #include +#include #include +#include #include @@ -54,10 +56,6 @@ const char *get_system_type(void) return "Interface MPC-1211(CTP/PCI/MPC-SH02)"; } -void platform_setup(void) -{ -} - static void __init pci_write_config(unsigned long busNo, unsigned long devNo, unsigned long fncNo, @@ -265,15 +263,16 @@ void __init init_mpc1211_IRQ(void) static void delay (void) { - volatile unsigned short tmp; - tmp = *(volatile unsigned short *) 0xa0000000; + volatile unsigned short tmp; + tmp = *(volatile unsigned short *) 0xa0000000; } static void delay1000 (void) { - int i; - for (i=0; i<1000; i++) - delay (); + int i; + + for (i=0; i<1000; i++) + delay (); } static int put_smb_blk(unsigned char *p, int address, int command, int no) @@ -316,21 +315,46 @@ static int put_smb_blk(unsigned char *p, return 0; } -void __init setup_mpc1211(void) +/* + * The Machine Vector + */ + +struct sh_machine_vector mv_mpc1211 __initmv = { + .mv_nr_irqs = 48, + .mv_irq_demux = mpc1211_irq_demux, + .mv_init_irq = init_mpc1211_IRQ, + +#ifdef CONFIG_HEARTBEAT + .mv_heartbeat = heartbeat_mpc1211, +#endif +}; + +ALIAS_MV(mpc1211) + +/* arch/sh/boards/mpc1211/rtc.c */ +void mpc1211_time_init(void); + +int __init platform_setup(void) { - unsigned char spd_buf[128]; - pci_write_config(0,0,0,0x54, 0xb0b00000); + unsigned char spd_buf[128]; + + __set_io_port_base(PA_PCI_IO); + + pci_write_config(0,0,0,0x54, 0xb0b00000); -retry: - outb(ALI15X3_ABORT, SMBHSTCNT); - spd_buf[0] = 0x0c; - spd_buf[1] = 0x43; - spd_buf[2] = 0x7f; - spd_buf[3] = 0x03; - spd_buf[4] = 0x00; - spd_buf[5] = 0x03; - spd_buf[6] = 0x00; - if (put_smb_blk(spd_buf, 0x69, 0, 7) < 0) { - goto retry; - } + do { + outb(ALI15X3_ABORT, SMBHSTCNT); + spd_buf[0] = 0x0c; + spd_buf[1] = 0x43; + spd_buf[2] = 0x7f; + spd_buf[3] = 0x03; + spd_buf[4] = 0x00; + spd_buf[5] = 0x03; + spd_buf[6] = 0x00; + } while (put_smb_blk(spd_buf, 0x69, 0, 7) < 0); + + board_time_init = mpc1211_time_init; + + return 0; } + diff -puN arch/sh/boards/overdrive/mach.c~sh-merge arch/sh/boards/overdrive/mach.c --- 25/arch/sh/boards/overdrive/mach.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/overdrive/mach.c 2004-01-09 21:32:27.000000000 -0800 @@ -51,18 +51,6 @@ struct sh_machine_vector mv_od __initmv .mv_outsw = od_outsw, .mv_outsl = od_outsl, - .mv_readb = generic_readb, - .mv_readw = generic_readw, - .mv_readl = generic_readl, - .mv_writeb = generic_writeb, - .mv_writew = generic_writew, - .mv_writel = generic_writel, - - .mv_ioremap = generic_ioremap, - .mv_iounmap = generic_iounmap, - - .mv_isa_port2addr = generic_isa_port2addr, - #ifdef CONFIG_PCI .mv_init_irq = init_overdrive_irq, #endif diff -puN arch/sh/boards/saturn/irq.c~sh-merge arch/sh/boards/saturn/irq.c --- 25/arch/sh/boards/saturn/irq.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/saturn/irq.c 2004-01-09 21:32:27.000000000 -0800 @@ -7,8 +7,7 @@ */ #include #include -#include -#include +#include #include #include @@ -65,7 +64,7 @@ static inline void unmask_saturn_irq(uns mask = ctrl_inl(SATURN_IMR); mask &= ~saturn_irq_mask(irq_nr); - ctrl_outl(SATURN_IMR); + ctrl_outl(mask, SATURN_IMR); } static void disable_saturn_irq(unsigned int irq_nr) @@ -85,7 +84,7 @@ static void mask_and_ack_saturn_irq(unsi static void end_saturn_irq(unsigned int irq_nr) { - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) + if (!(irq_desc[irq_nr].status & (IRQ_DISABLED | IRQ_INPROGRESS))) unmask_saturn_irq(irq_nr); } diff -puN -L arch/sh/boards/saturn/mach.c arch/sh/boards/saturn/mach.c~sh-merge /dev/null --- 25/arch/sh/boards/saturn/mach.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,59 +0,0 @@ -/* - * arch/sh/boards/saturn/mach.c - * - * machvec definitions for the Sega Saturn. - * - * Copyright (C) 2002 Paul Mundt - * - * Released under the terms of the GNU GPL v2.0. - */ -#include -#include -#include -#include -#include -#include - -/* - * The Machine Vector - */ -struct sh_machine_vector mv_saturn __initmv = { - .mv_nr_irqs = 80, /* Fix this later */ - - .mv_inb = generic_inb, - .mv_inw = generic_inw, - .mv_inl = generic_inl, - .mv_outb = generic_outb, - .mv_outw = generic_outw, - .mv_outl = generic_outl, - - .mv_inb_p = generic_inb_p, - .mv_inw_p = generic_inw_p, - .mv_inl_p = generic_inl_p, - .mv_outb_p = generic_outb_p, - .mv_outw_p = generic_outw_p, - .mv_outl_p = generic_outl_p, - - .mv_insb = generic_insb, - .mv_insw = generic_insw, - .mv_insl = generic_insl, - .mv_outsb = generic_outsb, - .mv_outsw = generic_outsw, - .mv_outsl = generic_outsl, - - .mv_readb = generic_readb, - .mv_readw = generic_readw, - .mv_readl = generic_readl, - .mv_writeb = generic_writeb, - .mv_writew = generic_writew, - .mv_writel = generic_writel, - - .mv_isa_port2addr = saturn_isa_port2addr, - .mv_irq_demux = saturn_irq_demux, - - .mv_ioremap = saturn_ioremap, - .mv_iounmap = saturn_iounmap, -}; - -ALIAS_MV(saturn) - diff -puN arch/sh/boards/saturn/Makefile~sh-merge arch/sh/boards/saturn/Makefile --- 25/arch/sh/boards/saturn/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/saturn/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -6,7 +6,7 @@ # unless it's something special (ie not a .c file). # -obj-y := mach.o setup.o io.o irq.o +obj-y := setup.o io.o irq.o obj-$(CONFIG_SMP) += smp.o diff -puN arch/sh/boards/saturn/setup.c~sh-merge arch/sh/boards/saturn/setup.c --- 25/arch/sh/boards/saturn/setup.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/saturn/setup.c 2004-01-09 21:32:27.000000000 -0800 @@ -10,11 +10,32 @@ #include #include +#include +#include +#include + +extern int saturn_irq_demux(int irq_nr); + const char *get_system_type(void) { return "Sega Saturn"; } +/* + * The Machine Vector + */ +struct sh_machine_vector mv_saturn __initmv = { + .mv_nr_irqs = 80, /* Fix this later */ + + .mv_isa_port2addr = saturn_isa_port2addr, + .mv_irq_demux = saturn_irq_demux, + + .mv_ioremap = saturn_ioremap, + .mv_iounmap = saturn_iounmap, +}; + +ALIAS_MV(saturn) + int __init platform_setup(void) { return 0; diff -puN arch/sh/boards/saturn/smp.c~sh-merge arch/sh/boards/saturn/smp.c --- 25/arch/sh/boards/saturn/smp.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/saturn/smp.c 2004-01-09 21:32:27.000000000 -0800 @@ -34,7 +34,7 @@ unsigned int __smp_probe_cpus(void) * addition to which, we treat them as write-only, since * reading from them will return undefined data. */ -static inline void smpc_slave_off(unsigned int cpu) +static inline void smpc_slave_stop(unsigned int cpu) { smpc_barrier(); ctrl_outb(1, SMPC_STATUS); @@ -43,7 +43,7 @@ static inline void smpc_slave_off(unsign smpc_barrier(); } -static inline void smpc_slave_on(unsigned int cpu) +static inline void smpc_slave_start(unsigned int cpu) { ctrl_outb(1, SMPC_STATUS); ctrl_outb(SMPC_CMD_SSHON, SMPC_COMMAND); diff -puN arch/sh/boards/se/770x/io.c~sh-merge arch/sh/boards/se/770x/io.c --- 25/arch/sh/boards/se/770x/io.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/se/770x/io.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: io.c,v 1.1.2.2 2002/01/20 05:03:25 mrbrown Exp $ +/* $Id: io.c,v 1.4 2003/08/03 03:05:10 lethal Exp $ * * linux/arch/sh/kernel/io_se.c * @@ -189,36 +189,6 @@ void se_outsl(unsigned long port, const maybebadio(outsw, port); } -unsigned char se_readb(unsigned long addr) -{ - return *(volatile unsigned char*)addr; -} - -unsigned short se_readw(unsigned long addr) -{ - return *(volatile unsigned short*)addr; -} - -unsigned int se_readl(unsigned long addr) -{ - return *(volatile unsigned long*)addr; -} - -void se_writeb(unsigned char b, unsigned long addr) -{ - *(volatile unsigned char*)addr = b; -} - -void se_writew(unsigned short b, unsigned long addr) -{ - *(volatile unsigned short*)addr = b; -} - -void se_writel(unsigned int b, unsigned long addr) -{ - *(volatile unsigned long*)addr = b; -} - /* Map ISA bus address to the real address. Only for PCMCIA. */ /* ISA page descriptor. */ diff -puN arch/sh/boards/se/770x/mach.c~sh-merge arch/sh/boards/se/770x/mach.c --- 25/arch/sh/boards/se/770x/mach.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/se/770x/mach.c 2004-01-09 21:32:27.000000000 -0800 @@ -56,16 +56,6 @@ struct sh_machine_vector mv_se __initmv .mv_outsw = se_outsw, .mv_outsl = se_outsl, - .mv_readb = se_readb, - .mv_readw = se_readw, - .mv_readl = se_readl, - .mv_writeb = se_writeb, - .mv_writew = se_writew, - .mv_writel = se_writel, - - .mv_ioremap = generic_ioremap, - .mv_iounmap = generic_iounmap, - .mv_isa_port2addr = se_isa_port2addr, .mv_init_irq = init_se_IRQ, diff -puN arch/sh/boards/se/7751/io.c~sh-merge arch/sh/boards/se/7751/io.c --- 25/arch/sh/boards/se/7751/io.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/se/7751/io.c 2004-01-09 21:32:27.000000000 -0800 @@ -201,76 +201,16 @@ void sh7751se_outl(unsigned int value, u maybebadio(outl, port); } -void sh7751se_insb(unsigned long port, void *addr, unsigned long count) -{ - unsigned char *p = addr; - while (count--) *p++ = sh7751se_inb(port); -} - -void sh7751se_insw(unsigned long port, void *addr, unsigned long count) -{ - unsigned short *p = addr; - while (count--) *p++ = sh7751se_inw(port); -} - void sh7751se_insl(unsigned long port, void *addr, unsigned long count) { maybebadio(insl, port); } -void sh7751se_outsb(unsigned long port, const void *addr, unsigned long count) -{ - unsigned char *p = (unsigned char*)addr; - while (count--) sh7751se_outb(*p++, port); -} - -void sh7751se_outsw(unsigned long port, const void *addr, unsigned long count) -{ - unsigned short *p = (unsigned short*)addr; - while (count--) sh7751se_outw(*p++, port); -} - void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count) { maybebadio(outsw, port); } -/* For read/write calls, just copy generic (pass-thru); PCIMBR is */ -/* already set up. For a larger memory space, these would need to */ -/* reset PCIMBR as needed on a per-call basis... */ - -unsigned char sh7751se_readb(unsigned long addr) -{ - return *(volatile unsigned char*)addr; -} - -unsigned short sh7751se_readw(unsigned long addr) -{ - return *(volatile unsigned short*)addr; -} - -unsigned int sh7751se_readl(unsigned long addr) -{ - return *(volatile unsigned long*)addr; -} - -void sh7751se_writeb(unsigned char b, unsigned long addr) -{ - *(volatile unsigned char*)addr = b; -} - -void sh7751se_writew(unsigned short b, unsigned long addr) -{ - *(volatile unsigned short*)addr = b; -} - -void sh7751se_writel(unsigned int b, unsigned long addr) -{ - *(volatile unsigned long*)addr = b; -} - - - /* Map ISA bus address to the real address. Only for PCMCIA. */ /* ISA page descriptor. */ diff -puN arch/sh/boards/se/7751/mach.c~sh-merge arch/sh/boards/se/7751/mach.c --- 25/arch/sh/boards/se/7751/mach.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/se/7751/mach.c 2004-01-09 21:32:27.000000000 -0800 @@ -42,23 +42,9 @@ struct sh_machine_vector mv_7751se __ini .mv_outw_p = sh7751se_outw, .mv_outl_p = sh7751se_outl, - .mv_insb = sh7751se_insb, - .mv_insw = sh7751se_insw, .mv_insl = sh7751se_insl, - .mv_outsb = sh7751se_outsb, - .mv_outsw = sh7751se_outsw, .mv_outsl = sh7751se_outsl, - .mv_readb = sh7751se_readb, - .mv_readw = sh7751se_readw, - .mv_readl = sh7751se_readl, - .mv_writeb = sh7751se_writeb, - .mv_writew = sh7751se_writew, - .mv_writel = sh7751se_writel, - - .mv_ioremap = generic_ioremap, - .mv_iounmap = generic_iounmap, - .mv_isa_port2addr = sh7751se_isa_port2addr, .mv_init_irq = init_7751se_IRQ, diff -puN arch/sh/boards/se/7751/pci.c~sh-merge arch/sh/boards/se/7751/pci.c --- 25/arch/sh/boards/se/7751/pci.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/se/7751/pci.c 2004-01-09 21:32:27.000000000 -0800 @@ -95,12 +95,11 @@ int __init pcibios_init_platform(void) /* * Set the MBR so PCI address is one-to-one with window, - * meaning all calls go straight through... use ifdef to + * meaning all calls go straight through... use BUG_ON to * catch erroneous assumption. */ -#if PCIBIOS_MIN_MEM != SH7751_PCI_MEMORY_BASE -#error One-to-one assumption for PCI memory mapping is wrong!?!?!? -#endif + BUG_ON(PCIBIOS_MIN_MEM != SH7751_PCI_MEMORY_BASE); + PCIC_WRITE(SH7751_PCIMBR, PCIBIOS_MIN_MEM); /* Set IOBR for window containing area specified in pci.h */ @@ -125,3 +124,25 @@ int __init pcibios_map_platform_irq(u8 s return -1; } } + +static struct resource sh7751_io_resource = { + .name = "SH7751 IO", + .start = SH7751_PCI_IO_BASE, + .end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1, + .flags = IORESOURCE_IO +}; + +static struct resource sh7751_mem_resource = { + .name = "SH7751 mem", + .start = SH7751_PCI_MEMORY_BASE, + .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1, + .flags = IORESOURCE_MEM +}; + +extern struct pci_ops sh7751_pci_ops; + +struct pci_channel board_pci_channels[] = { + { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, + { NULL, NULL, NULL, 0, 0 }, +}; + diff -puN -L arch/sh/boards/sh2000/io.c arch/sh/boards/sh2000/io.c~sh-merge /dev/null --- 25/arch/sh/boards/sh2000/io.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,19 +0,0 @@ -/* - * I/O routine for SH-2000 - */ -#include -#include -#include - -#define IDE_OFFSET 0xb6200000 -#define NIC_OFFSET 0xb6000000 -#define EXTBUS_OFFSET 0xba000000 - -unsigned long sh2000_isa_port2addr(unsigned long offset) -{ - if((offset & ~7) == 0x1f0 || offset == 0x3f6) - return IDE_OFFSET + offset; - else if((offset & ~0x1f) == 0x300) - return NIC_OFFSET + offset; - return EXTBUS_OFFSET + offset; -} diff -puN -L arch/sh/boards/sh2000/mach.c arch/sh/boards/sh2000/mach.c~sh-merge /dev/null --- 25/arch/sh/boards/sh2000/mach.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,57 +0,0 @@ -/* - * linux/arch/sh/boards/sh2000/mach.c - * - * Original copyright message: - * Copyright (C) 2001 SUGIOKA Tochinobu - * - * Split into mach.c from setup.c by M. R. Brown - */ - -#include -#include -#include -#include -#include -#include - -/* - * The Machine Vector - */ - -struct sh_machine_vector mv_sh2000 __initmv = { - .mv_nr_irqs = 80, - - .mv_inb = generic_inb, - .mv_inw = generic_inw, - .mv_inl = generic_inl, - .mv_outb = generic_outb, - .mv_outw = generic_outw, - .mv_outl = generic_outl, - - .mv_inb_p = generic_inb_p, - .mv_inw_p = generic_inw_p, - .mv_inl_p = generic_inl_p, - .mv_outb_p = generic_outb_p, - .mv_outw_p = generic_outw_p, - .mv_outl_p = generic_outl_p, - - .mv_insb = generic_insb, - .mv_insw = generic_insw, - .mv_insl = generic_insl, - .mv_outsb = generic_outsb, - .mv_outsw = generic_outsw, - .mv_outsl = generic_outsl, - - .mv_readb = generic_readb, - .mv_readw = generic_readw, - .mv_readl = generic_readl, - .mv_writeb = generic_writeb, - .mv_writew = generic_writew, - .mv_writel = generic_writel, - - .mv_isa_port2addr = sh2000_isa_port2addr, - - .mv_ioremap = generic_ioremap, - .mv_iounmap = generic_iounmap, -}; -ALIAS_MV(sh2000) diff -puN arch/sh/boards/sh2000/Makefile~sh-merge arch/sh/boards/sh2000/Makefile --- 25/arch/sh/boards/sh2000/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/sh2000/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -6,5 +6,5 @@ # unless it's something special (ie not a .c file). # -obj-y := mach.o setup.o io.o +obj-y := setup.o diff -puN arch/sh/boards/sh2000/setup.c~sh-merge arch/sh/boards/sh2000/setup.c --- 25/arch/sh/boards/sh2000/setup.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boards/sh2000/setup.c 2004-01-09 21:32:27.000000000 -0800 @@ -12,6 +12,8 @@ #include #include +#include +#include #define CF_CIS_BASE 0xb4200000 @@ -20,11 +22,34 @@ #define PORT_ICR1 0xa4000010 #define PORT_IRR0 0xa4000004 +#define IDE_OFFSET 0xb6200000 +#define NIC_OFFSET 0xb6000000 +#define EXTBUS_OFFSET 0xba000000 + + const char *get_system_type(void) { return "sh2000"; } +static unsigned long sh2000_isa_port2addr(unsigned long offset) +{ + if((offset & ~7) == 0x1f0 || offset == 0x3f6) + return IDE_OFFSET + offset; + else if((offset & ~0x1f) == 0x300) + return NIC_OFFSET + offset; + return EXTBUS_OFFSET + offset; +} + +/* + * The Machine Vector + */ +struct sh_machine_vector mv_sh2000 __initmv = { + .mv_nr_irqs = 80, + .mv_isa_port2addr = sh2000_isa_port2addr, +}; +ALIAS_MV(sh2000) + /* * Initialize the board */ diff -puN /dev/null arch/sh/boards/snapgear/io.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/boards/snapgear/io.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,226 @@ +/* + * linux/arch/sh/kernel/io_7751se.c + * + * Copyright (C) 2002 David McCullough + * Copyright (C) 2001 Ian da Silva, Jeremy Siegel + * Based largely on io_se.c. + * + * I/O routine for Hitachi 7751 SolutionEngine. + * + * Initial version only to support LAN access; some + * placeholder code from io_se.c left in with the + * expectation of later SuperIO and PCMCIA access. + */ + +#include +#include +#include +#include +#include + +#include +#include "../../drivers/pci/pci-sh7751.h" + +#ifdef CONFIG_SH_SECUREEDGE5410 +unsigned short secureedge5410_ioport; +#endif + +/* + * The SnapGear uses the built-in PCI controller (PCIC) + * of the 7751 processor + */ + +#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR) +#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) +#define PCI_IO_AREA SH7751_PCI_IO_BASE +#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE + + +#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) + + +#define maybebadio(name,port) \ + printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \ + #name, (port), (__u32) __builtin_return_address(0)) + + +static inline void delay(void) +{ + ctrl_inw(0xa0000000); +} + + +static inline volatile __u16 *port2adr(unsigned int port) +{ +#if 0 + if (port >= 0x2000) + return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); +#endif + maybebadio(name,(unsigned long)port); + return (volatile __u16*)port; +} + + +/* In case someone configures the kernel w/o PCI support: in that */ +/* scenario, don't ever bother to check for PCI-window addresses */ + +/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */ +#if defined(CONFIG_PCI) +#define CHECK_SH7751_PCIIO(port) \ + ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE))) +#else +#define CHECK_SH7751_PCIIO(port) (0) +#endif + +/* + * General outline: remap really low stuff [eventually] to SuperIO, + * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) + * is mapped through the PCI IO window. Stuff with high bits (PXSEG) + * should be way beyond the window, and is used w/o translation for + * compatibility. + */ + +unsigned char snapgear_inb(unsigned long port) +{ + if (PXSEG(port)) + return *(volatile unsigned char *)port; + else if (CHECK_SH7751_PCIIO(port)) + return *(volatile unsigned char *)PCI_IOMAP(port); + else + return (*port2adr(port))&0xff; +} + + +unsigned char snapgear_inb_p(unsigned long port) +{ + unsigned char v; + + if (PXSEG(port)) + v = *(volatile unsigned char *)port; + else if (CHECK_SH7751_PCIIO(port)) + v = *(volatile unsigned char *)PCI_IOMAP(port); + else + v = (*port2adr(port))&0xff; + delay(); + return v; +} + + +unsigned short snapgear_inw(unsigned long port) +{ + if (PXSEG(port)) + return *(volatile unsigned short *)port; + else if (CHECK_SH7751_PCIIO(port)) + return *(volatile unsigned short *)PCI_IOMAP(port); + else if (port >= 0x2000) + return *port2adr(port); + else + maybebadio(inw, port); + return 0; +} + + +unsigned int snapgear_inl(unsigned long port) +{ + if (PXSEG(port)) + return *(volatile unsigned long *)port; + else if (CHECK_SH7751_PCIIO(port)) + return *(volatile unsigned int *)PCI_IOMAP(port); + else if (port >= 0x2000) + return *port2adr(port); + else + maybebadio(inl, port); + return 0; +} + + +void snapgear_outb(unsigned char value, unsigned long port) +{ + + if (PXSEG(port)) + *(volatile unsigned char *)port = value; + else if (CHECK_SH7751_PCIIO(port)) + *((unsigned char*)PCI_IOMAP(port)) = value; + else + *(port2adr(port)) = value; +} + + +void snapgear_outb_p(unsigned char value, unsigned long port) +{ + if (PXSEG(port)) + *(volatile unsigned char *)port = value; + else if (CHECK_SH7751_PCIIO(port)) + *((unsigned char*)PCI_IOMAP(port)) = value; + else + *(port2adr(port)) = value; + delay(); +} + + +void snapgear_outw(unsigned short value, unsigned long port) +{ + if (PXSEG(port)) + *(volatile unsigned short *)port = value; + else if (CHECK_SH7751_PCIIO(port)) + *((unsigned short *)PCI_IOMAP(port)) = value; + else if (port >= 0x2000) + *port2adr(port) = value; + else + maybebadio(outw, port); +} + + +void snapgear_outl(unsigned int value, unsigned long port) +{ + if (PXSEG(port)) + *(volatile unsigned long *)port = value; + else if (CHECK_SH7751_PCIIO(port)) + *((unsigned long*)PCI_IOMAP(port)) = value; + else + maybebadio(outl, port); +} + +void snapgear_insl(unsigned long port, void *addr, unsigned long count) +{ + maybebadio(insl, port); +} + +void snapgear_outsl(unsigned long port, const void *addr, unsigned long count) +{ + maybebadio(outsw, port); +} + +/* Map ISA bus address to the real address. Only for PCMCIA. */ + + +/* ISA page descriptor. */ +static __u32 sh_isa_memmap[256]; + + +#if 0 +static int sh_isa_mmap(__u32 start, __u32 length, __u32 offset) +{ + int idx; + + if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000)) + return -1; + + idx = start >> 12; + sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff); +#if 0 + printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n", + start, length, offset, idx, sh_isa_memmap[idx]); +#endif + return 0; +} +#endif + +unsigned long snapgear_isa_port2addr(unsigned long offset) +{ + int idx; + + idx = (offset >> 12) & 0xff; + offset &= 0xfff; + return sh_isa_memmap[idx] + offset; +} diff -puN /dev/null arch/sh/boards/snapgear/Makefile --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/boards/snapgear/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,10 @@ +# +# Makefile for the SnapGear specific parts of the kernel +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +obj-y := setup.o io.o rtc.o + diff -puN /dev/null arch/sh/boards/snapgear/rtc.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/boards/snapgear/rtc.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,333 @@ +/****************************************************************************/ +/* + * linux/arch/sh/boards/snapgear/rtc.c -- Secureedge5410 RTC code + * + * Copyright (C) 2002 David McCullough + * Copyright (C) 2003 Paul Mundt + * + * The SecureEdge5410 can have one of 2 real time clocks, the SH + * built in version or the preferred external DS1302. Here we work out + * each to see what we have and then run with it. + */ +/****************************************************************************/ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +/****************************************************************************/ + +static int use_ds1302 = 0; + +/****************************************************************************/ +/* + * we need to implement a DS1302 driver here that can operate in + * conjunction with the builtin rtc driver which is already quite friendly + */ +/*****************************************************************************/ + +#define RTC_CMD_READ 0x81 /* Read command */ +#define RTC_CMD_WRITE 0x80 /* Write command */ + +#define RTC_ADDR_YEAR 0x06 /* Address of year register */ +#define RTC_ADDR_DAY 0x05 /* Address of day of week register */ +#define RTC_ADDR_MON 0x04 /* Address of month register */ +#define RTC_ADDR_DATE 0x03 /* Address of day of month register */ +#define RTC_ADDR_HOUR 0x02 /* Address of hour register */ +#define RTC_ADDR_MIN 0x01 /* Address of minute register */ +#define RTC_ADDR_SEC 0x00 /* Address of second register */ + +#define RTC_RESET 0x1000 +#define RTC_IODATA 0x0800 +#define RTC_SCLK 0x0400 + +#define set_dirp(x) +#define get_dirp(x) 0 +#define set_dp(x) SECUREEDGE_WRITE_IOPORT(x, 0x1c00) +#define get_dp(x) SECUREEDGE_READ_IOPORT() + +static void ds1302_sendbits(unsigned int val) +{ + int i; + + for (i = 8; (i); i--, val >>= 1) { + set_dp((get_dp() & ~RTC_IODATA) | ((val & 0x1) ? RTC_IODATA : 0)); + set_dp(get_dp() | RTC_SCLK); // clock high + set_dp(get_dp() & ~RTC_SCLK); // clock low + } +} + +static unsigned int ds1302_recvbits(void) +{ + unsigned int val; + int i; + + for (i = 0, val = 0; (i < 8); i++) { + val |= (((get_dp() & RTC_IODATA) ? 1 : 0) << i); + set_dp(get_dp() | RTC_SCLK); // clock high + set_dp(get_dp() & ~RTC_SCLK); // clock low + } + return(val); +} + +static unsigned int ds1302_readbyte(unsigned int addr) +{ + unsigned int val; + unsigned long flags; + +#if 0 + printk("SnapGear RTC: ds1302_readbyte(addr=%x)\n", addr); +#endif + + local_irq_save(flags); + set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK); + set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); + + set_dp(get_dp() | RTC_RESET); + ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_READ); + set_dirp(get_dirp() & ~RTC_IODATA); + val = ds1302_recvbits(); + set_dp(get_dp() & ~RTC_RESET); + local_irq_restore(flags); + + return(val); +} + +static void ds1302_writebyte(unsigned int addr, unsigned int val) +{ + unsigned long flags; + +#if 0 + printk("SnapGear RTC: ds1302_writebyte(addr=%x)\n", addr); +#endif + + local_irq_save(flags); + set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK); + set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); + set_dp(get_dp() | RTC_RESET); + ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_WRITE); + ds1302_sendbits(val); + set_dp(get_dp() & ~RTC_RESET); + local_irq_restore(flags); +} + +static void ds1302_reset(void) +{ + unsigned long flags; + /* Hardware dependant reset/init */ + local_irq_save(flags); + set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK); + set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); + local_irq_restore(flags); +} + +/*****************************************************************************/ + +static inline int bcd2int(int val) +{ + return((((val & 0xf0) >> 4) * 10) + (val & 0xf)); +} + +static inline int int2bcd(int val) +{ + return(((val / 10) << 4) + (val % 10)); +} + +/*****************************************************************************/ +/* + * Write and Read some RAM in the DS1302, if it works assume it's there + * Otherwise use the SH4 internal RTC + */ + +void snapgear_rtc_gettimeofday(struct timespec *); +int snapgear_rtc_settimeofday(const time_t); + +void __init secureedge5410_rtc_init(void) +{ + unsigned char *test = "snapgear"; + int i; + + ds1302_reset(); + + use_ds1302 = 1; + + for (i = 0; test[i]; i++) + ds1302_writebyte(32 + i, test[i]); + + for (i = 0; test[i]; i++) + if (ds1302_readbyte(32 + i) != test[i]) { + use_ds1302 = 0; + break; + } + + if (use_ds1302) { + rtc_get_time = snapgear_rtc_gettimeofday; + rtc_set_time = snapgear_rtc_settimeofday; + } else { + rtc_get_time = sh_rtc_gettimeofday; + rtc_set_time = sh_rtc_settimeofday; + } + + printk("SnapGear RTC: using %s rtc.\n", use_ds1302 ? "ds1302" : "internal"); +} + +/****************************************************************************/ +/* + * our generic interface that chooses the correct code to use + */ + +void snapgear_rtc_gettimeofday(struct timespec *ts) +{ + unsigned int sec, min, hr, day, mon, yr; + + if (!use_ds1302) { + sh_rtc_gettimeofday(ts); + return; + } + + sec = bcd2int(ds1302_readbyte(RTC_ADDR_SEC)); + min = bcd2int(ds1302_readbyte(RTC_ADDR_MIN)); + hr = bcd2int(ds1302_readbyte(RTC_ADDR_HOUR)); + day = bcd2int(ds1302_readbyte(RTC_ADDR_DATE)); + mon = bcd2int(ds1302_readbyte(RTC_ADDR_MON)); + yr = bcd2int(ds1302_readbyte(RTC_ADDR_YEAR)); + +bad_time: + if (yr > 99 || mon < 1 || mon > 12 || day > 31 || day < 1 || + hr > 23 || min > 59 || sec > 59) { + printk(KERN_ERR + "SnapGear RTC: invalid value, resetting to 1 Jan 2000\n"); + ds1302_writebyte(RTC_ADDR_MIN, min = 0); + ds1302_writebyte(RTC_ADDR_HOUR, hr = 0); + ds1302_writebyte(RTC_ADDR_DAY, 7); + ds1302_writebyte(RTC_ADDR_DATE, day = 1); + ds1302_writebyte(RTC_ADDR_MON, mon = 1); + ds1302_writebyte(RTC_ADDR_YEAR, yr = 0); + ds1302_writebyte(RTC_ADDR_SEC, sec = 0); + } + + ts->tv_sec = mktime(2000 + yr, mon, day, hr, min, sec); + if (ts->tv_sec < 0) { +#if 0 + printk("BAD TIME %d %d %d %d %d %d\n", yr, mon, day, hr, min, sec); +#endif + yr = 100; + goto bad_time; + } + ts->tv_nsec = 0; +} + +int snapgear_rtc_settimeofday(const time_t secs) +{ + int retval = 0; + int real_seconds, real_minutes, cmos_minutes; + unsigned long nowtime; + + if (!use_ds1302) + return sh_rtc_settimeofday(secs); + +/* + * This is called direct from the kernel timer handling code. + * It is supposed to synchronize the kernel clock to the RTC. + */ + + nowtime = secs; + +#if 1 + printk("SnapGear RTC: snapgear_rtc_settimeofday(nowtime=%ld)\n", nowtime); +#endif + + /* STOP RTC */ + ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80); + + cmos_minutes = bcd2int(ds1302_readbyte(RTC_ADDR_MIN)); + + /* + * since we're only adjusting minutes and seconds, + * don't interfere with hour overflow. This avoids + * messing with unknown time zones but requires your + * RTC not to be off by more than 15 minutes + */ + real_seconds = nowtime % 60; + real_minutes = nowtime / 60; + if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) + real_minutes += 30; /* correct for half hour time zone */ + real_minutes %= 60; + + if (abs(real_minutes - cmos_minutes) < 30) { + ds1302_writebyte(RTC_ADDR_MIN, int2bcd(real_minutes)); + ds1302_writebyte(RTC_ADDR_SEC, int2bcd(real_seconds)); + } else { + printk(KERN_WARNING + "SnapGear RTC: can't update from %d to %d\n", + cmos_minutes, real_minutes); + retval = -1; + } + + /* START RTC */ + ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80); + return(0); +} + +unsigned char secureedge5410_cmos_read(int addr) +{ + unsigned char val = 0; + + if (!use_ds1302) + return(__CMOS_READ(addr, w)); + + switch(addr) { + case RTC_SECONDS: val = ds1302_readbyte(RTC_ADDR_SEC); break; + case RTC_SECONDS_ALARM: break; + case RTC_MINUTES: val = ds1302_readbyte(RTC_ADDR_MIN); break; + case RTC_MINUTES_ALARM: break; + case RTC_HOURS: val = ds1302_readbyte(RTC_ADDR_HOUR); break; + case RTC_HOURS_ALARM: break; + case RTC_DAY_OF_WEEK: val = ds1302_readbyte(RTC_ADDR_DAY); break; + case RTC_DAY_OF_MONTH: val = ds1302_readbyte(RTC_ADDR_DATE); break; + case RTC_MONTH: val = ds1302_readbyte(RTC_ADDR_MON); break; + case RTC_YEAR: val = ds1302_readbyte(RTC_ADDR_YEAR); break; + case RTC_REG_A: /* RTC_FREQ_SELECT */ break; + case RTC_REG_B: /* RTC_CONTROL */ break; + case RTC_REG_C: /* RTC_INTR_FLAGS */ break; + case RTC_REG_D: val = RTC_VRT /* RTC_VALID */; break; + default: break; + } + + return(val); +} + +void secureedge5410_cmos_write(unsigned char val, int addr) +{ + if (!use_ds1302) { + __CMOS_WRITE(val, addr, w); + return; + } + + switch(addr) { + case RTC_SECONDS: ds1302_writebyte(RTC_ADDR_SEC, val); break; + case RTC_SECONDS_ALARM: break; + case RTC_MINUTES: ds1302_writebyte(RTC_ADDR_MIN, val); break; + case RTC_MINUTES_ALARM: break; + case RTC_HOURS: ds1302_writebyte(RTC_ADDR_HOUR, val); break; + case RTC_HOURS_ALARM: break; + case RTC_DAY_OF_WEEK: ds1302_writebyte(RTC_ADDR_DAY, val); break; + case RTC_DAY_OF_MONTH: ds1302_writebyte(RTC_ADDR_DATE, val); break; + case RTC_MONTH: ds1302_writebyte(RTC_ADDR_MON, val); break; + case RTC_YEAR: ds1302_writebyte(RTC_ADDR_YEAR, val); break; + case RTC_REG_A: /* RTC_FREQ_SELECT */ break; + case RTC_REG_B: /* RTC_CONTROL */ break; + case RTC_REG_C: /* RTC_INTR_FLAGS */ break; + case RTC_REG_D: /* RTC_VALID */ break; + default: break; + } +} + +/****************************************************************************/ diff -puN /dev/null arch/sh/boards/snapgear/setup.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/boards/snapgear/setup.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,220 @@ +/****************************************************************************/ +/* + * linux/arch/sh/boards/snapgear/setup.c + * + * Copyright (C) 2002 David McCullough + * Copyright (C) 2003 Paul Mundt + * + * Based on files with the following comments: + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Modified for 7751 Solution Engine by + * Ian da Silva and Jeremy Siegel, 2001. + */ +/****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +extern void (*board_time_init)(void); +extern void secureedge5410_rtc_init(void); +extern void pcibios_init(void); + +/****************************************************************************/ +/* + * EraseConfig handling functions + */ + +static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + volatile char dummy __attribute__((unused)) = * (volatile char *) 0xb8000000; + + printk("SnapGear: erase switch interrupt!\n"); + + return IRQ_HANDLED; +} + +static int __init eraseconfig_init(void) +{ + printk("SnapGear: EraseConfig init\n"); + /* Setup "EraseConfig" switch on external IRQ 0 */ + if (request_irq(IRL0_IRQ, eraseconfig_interrupt, SA_INTERRUPT, + "Erase Config", NULL)) + printk("SnapGear: failed to register IRQ%d for Reset witch\n", + IRL0_IRQ); + else + printk("SnapGear: registered EraseConfig switch on IRQ%d\n", + IRL0_IRQ); + return(0); +} + +module_init(eraseconfig_init); + +/****************************************************************************/ +/* + * Initialize IRQ setting + * + * IRL0 = erase switch + * IRL1 = eth0 + * IRL2 = eth1 + * IRL3 = crypto + */ + +static void __init init_snapgear_IRQ(void) +{ + /* enable individual interrupt mode for externals */ + ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); + + printk("Setup SnapGear IRQ/IPR ...\n"); + + make_ipr_irq(IRL0_IRQ, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY); + make_ipr_irq(IRL1_IRQ, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY); + make_ipr_irq(IRL2_IRQ, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY); + make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY); +} + +/****************************************************************************/ +/* + * Fast poll interrupt simulator. + */ + +/* + * Leave all of the fast timer/fast poll stuff commented out for now, since + * it's not clear whether it actually works or not. Since it wasn't being used + * at all in 2.4, we'll assume it's not sane for 2.6 either.. -- PFM + */ +#if 0 +#define FAST_POLL 1000 +//#define FAST_POLL_INTR + +#define FASTTIMER_IRQ 17 +#define FASTTIMER_IPR_ADDR INTC_IPRA +#define FASTTIMER_IPR_POS 2 +#define FASTTIMER_PRIORITY 3 + +#ifdef FAST_POLL_INTR +#define TMU1_TCR_INIT 0x0020 +#else +#define TMU1_TCR_INIT 0 +#endif +#define TMU_TSTR_INIT 1 +#define TMU1_TCR_CALIB 0x0000 +#define TMU_TOCR 0xffd80000 /* Byte access */ +#define TMU_TSTR 0xffd80004 /* Byte access */ +#define TMU1_TCOR 0xffd80014 /* Long access */ +#define TMU1_TCNT 0xffd80018 /* Long access */ +#define TMU1_TCR 0xffd8001c /* Word access */ + + +#ifdef FAST_POLL_INTR +static void fast_timer_irq(int irq, void *dev_instance, struct pt_regs *regs) +{ + unsigned long timer_status; + timer_status = ctrl_inw(TMU1_TCR); + timer_status &= ~0x100; + ctrl_outw(timer_status, TMU1_TCR); +} +#endif + +/* + * return the current ticks on the fast timer + */ + +unsigned long fast_timer_count(void) +{ + return(ctrl_inl(TMU1_TCNT)); +} + +/* + * setup a fast timer for profiling etc etc + */ + +static void setup_fast_timer() +{ + unsigned long interval; + +#ifdef FAST_POLL_INTR + interval = (current_cpu_data.module_clock/4 + FAST_POLL/2) / FAST_POLL; + + make_ipr_irq(FASTTIMER_IRQ, FASTTIMER_IPR_ADDR, FASTTIMER_IPR_POS, + FASTTIMER_PRIORITY); + + printk("SnapGear: %dHz fast timer on IRQ %d\n",FAST_POLL,FASTTIMER_IRQ); + + if (request_irq(FASTTIMER_IRQ, fast_timer_irq, 0, "SnapGear fast timer", + NULL) != 0) + printk("%s(%d): request_irq() failed?\n", __FILE__, __LINE__); +#else + printk("SnapGear: fast timer running\n",FAST_POLL,FASTTIMER_IRQ); + interval = 0xffffffff; +#endif + + ctrl_outb(ctrl_inb(TMU_TSTR) & ~0x2, TMU_TSTR); /* disable timer 1 */ + ctrl_outw(TMU1_TCR_INIT, TMU1_TCR); + ctrl_outl(interval, TMU1_TCOR); + ctrl_outl(interval, TMU1_TCNT); + ctrl_outb(ctrl_inb(TMU_TSTR) | 0x2, TMU_TSTR); /* enable timer 1 */ + + printk("Timer count 1 = 0x%x\n", fast_timer_count()); + udelay(1000); + printk("Timer count 2 = 0x%x\n", fast_timer_count()); +} +#endif + +/****************************************************************************/ + +const char *get_system_type(void) +{ + return "SnapGear SecureEdge5410"; +} + +/* + * The Machine Vector + */ + +struct sh_machine_vector mv_snapgear __initmv = { + .mv_nr_irqs = 72, + + .mv_inb = snapgear_inb, + .mv_inw = snapgear_inw, + .mv_inl = snapgear_inl, + .mv_outb = snapgear_outb, + .mv_outw = snapgear_outw, + .mv_outl = snapgear_outl, + + .mv_inb_p = snapgear_inb_p, + .mv_inw_p = snapgear_inw, + .mv_inl_p = snapgear_inl, + .mv_outb_p = snapgear_outb_p, + .mv_outw_p = snapgear_outw, + .mv_outl_p = snapgear_outl, + + .mv_isa_port2addr = snapgear_isa_port2addr, + + .mv_init_irq = init_snapgear_IRQ, +}; +ALIAS_MV(snapgear) + +/* + * Initialize the board + */ + +int __init platform_setup(void) +{ + board_time_init = secureedge5410_rtc_init; + + return 0; +} + diff -puN /dev/null arch/sh/boards/systemh/io.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/boards/systemh/io.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,283 @@ +/* + * linux/arch/sh/boards/systemh/io.c + * + * Copyright (C) 2001 Ian da Silva, Jeremy Siegel + * Based largely on io_se.c. + * + * I/O routine for Hitachi 7751 Systemh. + * + */ + +#include +#include +#include +#include +#include + +#include +#include "../../drivers/pci/pci-sh7751.h" + +/* + * The 7751 SystemH Engine uses the built-in PCI controller (PCIC) + * of the 7751 processor, and has a SuperIO accessible on its memory + * bus. + */ + +#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR) +#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) +#define PCI_IO_AREA SH7751_PCI_IO_BASE +#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE + +#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) +#define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area + of smc lan chip*/ + +#define maybebadio(name,port) \ + printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \ + #name, (port), (__u32) __builtin_return_address(0)) + +static inline void delay(void) +{ + ctrl_inw(0xa0000000); +} + +static inline volatile __u16 * +port2adr(unsigned int port) +{ + if (port >= 0x2000) + return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); +#if 0 + else + return (volatile __u16 *) (PA_SUPERIO + (port << 1)); +#endif + maybebadio(name,(unsigned long)port); + return (volatile __u16*)port; +} + +/* In case someone configures the kernel w/o PCI support: in that */ +/* scenario, don't ever bother to check for PCI-window addresses */ + +/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */ +#if defined(CONFIG_PCI) +#define CHECK_SH7751_PCIIO(port) \ + ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE))) +#else +#define CHECK_SH7751_PCIIO(port) (0) +#endif + +/* + * General outline: remap really low stuff [eventually] to SuperIO, + * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) + * is mapped through the PCI IO window. Stuff with high bits (PXSEG) + * should be way beyond the window, and is used w/o translation for + * compatibility. + */ +unsigned char sh7751systemh_inb(unsigned long port) +{ + if (PXSEG(port)) + return *(volatile unsigned char *)port; + else if (CHECK_SH7751_PCIIO(port)) + return *(volatile unsigned char *)PCI_IOMAP(port); + else if (port <= 0x3F1) + return *(volatile unsigned char *)ETHER_IOMAP(port); + else + return (*port2adr(port))&0xff; +} + +unsigned char sh7751systemh_inb_p(unsigned long port) +{ + unsigned char v; + + if (PXSEG(port)) + v = *(volatile unsigned char *)port; + else if (CHECK_SH7751_PCIIO(port)) + v = *(volatile unsigned char *)PCI_IOMAP(port); + else if (port <= 0x3F1) + v = *(volatile unsigned char *)ETHER_IOMAP(port); + else + v = (*port2adr(port))&0xff; + delay(); + return v; +} + +unsigned short sh7751systemh_inw(unsigned long port) +{ + if (PXSEG(port)) + return *(volatile unsigned short *)port; + else if (CHECK_SH7751_PCIIO(port)) + return *(volatile unsigned short *)PCI_IOMAP(port); + else if (port >= 0x2000) + return *port2adr(port); + else if (port <= 0x3F1) + return *(volatile unsigned int *)ETHER_IOMAP(port); + else + maybebadio(inw, port); + return 0; +} + +unsigned int sh7751systemh_inl(unsigned long port) +{ + if (PXSEG(port)) + return *(volatile unsigned long *)port; + else if (CHECK_SH7751_PCIIO(port)) + return *(volatile unsigned int *)PCI_IOMAP(port); + else if (port >= 0x2000) + return *port2adr(port); + else if (port <= 0x3F1) + return *(volatile unsigned int *)ETHER_IOMAP(port); + else + maybebadio(inl, port); + return 0; +} + +void sh7751systemh_outb(unsigned char value, unsigned long port) +{ + + if (PXSEG(port)) + *(volatile unsigned char *)port = value; + else if (CHECK_SH7751_PCIIO(port)) + *((unsigned char*)PCI_IOMAP(port)) = value; + else if (port <= 0x3F1) + *(volatile unsigned char *)ETHER_IOMAP(port) = value; + else + *(port2adr(port)) = value; +} + +void sh7751systemh_outb_p(unsigned char value, unsigned long port) +{ + if (PXSEG(port)) + *(volatile unsigned char *)port = value; + else if (CHECK_SH7751_PCIIO(port)) + *((unsigned char*)PCI_IOMAP(port)) = value; + else if (port <= 0x3F1) + *(volatile unsigned char *)ETHER_IOMAP(port) = value; + else + *(port2adr(port)) = value; + delay(); +} + +void sh7751systemh_outw(unsigned short value, unsigned long port) +{ + if (PXSEG(port)) + *(volatile unsigned short *)port = value; + else if (CHECK_SH7751_PCIIO(port)) + *((unsigned short *)PCI_IOMAP(port)) = value; + else if (port >= 0x2000) + *port2adr(port) = value; + else if (port <= 0x3F1) + *(volatile unsigned short *)ETHER_IOMAP(port) = value; + else + maybebadio(outw, port); +} + +void sh7751systemh_outl(unsigned int value, unsigned long port) +{ + if (PXSEG(port)) + *(volatile unsigned long *)port = value; + else if (CHECK_SH7751_PCIIO(port)) + *((unsigned long*)PCI_IOMAP(port)) = value; + else + maybebadio(outl, port); +} + +void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count) +{ + unsigned char *p = addr; + while (count--) *p++ = sh7751systemh_inb(port); +} + +void sh7751systemh_insw(unsigned long port, void *addr, unsigned long count) +{ + unsigned short *p = addr; + while (count--) *p++ = sh7751systemh_inw(port); +} + +void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count) +{ + maybebadio(insl, port); +} + +void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count) +{ + unsigned char *p = (unsigned char*)addr; + while (count--) sh7751systemh_outb(*p++, port); +} + +void sh7751systemh_outsw(unsigned long port, const void *addr, unsigned long count) +{ + unsigned short *p = (unsigned short*)addr; + while (count--) sh7751systemh_outw(*p++, port); +} + +void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count) +{ + maybebadio(outsw, port); +} + +/* For read/write calls, just copy generic (pass-thru); PCIMBR is */ +/* already set up. For a larger memory space, these would need to */ +/* reset PCIMBR as needed on a per-call basis... */ + +unsigned char sh7751systemh_readb(unsigned long addr) +{ + return *(volatile unsigned char*)addr; +} + +unsigned short sh7751systemh_readw(unsigned long addr) +{ + return *(volatile unsigned short*)addr; +} + +unsigned int sh7751systemh_readl(unsigned long addr) +{ + return *(volatile unsigned long*)addr; +} + +void sh7751systemh_writeb(unsigned char b, unsigned long addr) +{ + *(volatile unsigned char*)addr = b; +} + +void sh7751systemh_writew(unsigned short b, unsigned long addr) +{ + *(volatile unsigned short*)addr = b; +} + +void sh7751systemh_writel(unsigned int b, unsigned long addr) +{ + *(volatile unsigned long*)addr = b; +} + + + +/* Map ISA bus address to the real address. Only for PCMCIA. */ + +/* ISA page descriptor. */ +static __u32 sh_isa_memmap[256]; + +#if 0 +static int +sh_isa_mmap(__u32 start, __u32 length, __u32 offset) +{ + int idx; + + if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000)) + return -1; + + idx = start >> 12; + sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff); + printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n", + start, length, offset, idx, sh_isa_memmap[idx]); + return 0; +} +#endif + +unsigned long +sh7751systemh_isa_port2addr(unsigned long offset) +{ + int idx; + + idx = (offset >> 12) & 0xff; + offset &= 0xfff; + return sh_isa_memmap[idx] + offset; +} diff -puN /dev/null arch/sh/boards/systemh/irq.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/boards/systemh/irq.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,111 @@ +/* + * linux/arch/sh/boards/systemh/irq.c + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Hitachi SystemH Support. + * + * Modified for 7751 SystemH by + * Jonathan Short. + */ + +#include +#include +#include + +#include +#include +#include +#include +#include + +/* address of external interrupt mask register + * address must be set prior to use these (maybe in init_XXX_irq()) + * XXX : is it better to use .config than specifying it in code? */ +static unsigned long *systemh_irq_mask_register = (unsigned long *)0xB3F10004; +static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000; + +/* forward declaration */ +static unsigned int startup_systemh_irq(unsigned int irq); +static void shutdown_systemh_irq(unsigned int irq); +static void enable_systemh_irq(unsigned int irq); +static void disable_systemh_irq(unsigned int irq); +static void mask_and_ack_systemh(unsigned int); +static void end_systemh_irq(unsigned int irq); + +/* hw_interrupt_type */ +static struct hw_interrupt_type systemh_irq_type = { + " SystemH Register", + startup_systemh_irq, + shutdown_systemh_irq, + enable_systemh_irq, + disable_systemh_irq, + mask_and_ack_systemh, + end_systemh_irq +}; + +static unsigned int startup_systemh_irq(unsigned int irq) +{ + enable_systemh_irq(irq); + return 0; /* never anything pending */ +} + +static void shutdown_systemh_irq(unsigned int irq) +{ + disable_systemh_irq(irq); +} + +static void disable_systemh_irq(unsigned int irq) +{ + if (systemh_irq_mask_register) { + unsigned long flags; + unsigned long val, mask = 0x01 << 1; + + /* Clear the "irq"th bit in the mask and set it in the request */ + local_irq_save(flags); + + val = ctrl_inl((unsigned long)systemh_irq_mask_register); + val &= ~mask; + ctrl_outl(val, (unsigned long)systemh_irq_mask_register); + + val = ctrl_inl((unsigned long)systemh_irq_request_register); + val |= mask; + ctrl_outl(val, (unsigned long)systemh_irq_request_register); + + local_irq_restore(flags); + } +} + +static void enable_systemh_irq(unsigned int irq) +{ + if (systemh_irq_mask_register) { + unsigned long flags; + unsigned long val, mask = 0x01 << 1; + + /* Set "irq"th bit in the mask register */ + local_irq_save(flags); + val = ctrl_inl((unsigned long)systemh_irq_mask_register); + val |= mask; + ctrl_outl(val, (unsigned long)systemh_irq_mask_register); + local_irq_restore(flags); + } +} + +static void mask_and_ack_systemh(unsigned int irq) +{ + disable_systemh_irq(irq); +} + +static void end_systemh_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) + enable_systemh_irq(irq); +} + +void make_systemh_irq(unsigned int irq) +{ + disable_irq_nosync(irq); + irq_desc[irq].handler = &systemh_irq_type; + disable_systemh_irq(irq); +} + diff -puN /dev/null arch/sh/boards/systemh/Makefile --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/boards/systemh/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,17 @@ +# +# Makefile for the SystemH specific parts of the kernel +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +obj-y := setup.o irq.o io.o + +# XXX: This wants to be consolidated in arch/sh/drivers/pci, and more +# importantly, with the generic sh7751_pcic_init() code. For now, we'll +# just abuse the hell out of kbuild, because we can.. + +obj-$(CONFIG_PCI) += pci.o +pci-y := ../se/7751/pci.o + diff -puN /dev/null arch/sh/boards/systemh/setup.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/boards/systemh/setup.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,80 @@ +/* + * linux/arch/sh/boards/systemh/setup.c + * + * Copyright (C) 2000 Kazumoto Kojima + * Copyright (C) 2003 Paul Mundt + * + * Hitachi SystemH Support. + * + * Modified for 7751 SystemH by Jonathan Short. + * + * Rewritten for 2.6 by Paul Mundt. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +extern void make_systemh_irq(unsigned int irq); + +const char *get_system_type(void) +{ + return "7751 SystemH"; +} + +/* + * Initialize IRQ setting + */ +void __init init_7751systemh_IRQ(void) +{ +/* make_ipr_irq(10, BCR_ILCRD, 1, 0x0f-10); LAN */ +/* make_ipr_irq(14, BCR_ILCRA, 2, 0x0f-4); */ + make_systemh_irq(0xb); /* Ethernet interrupt */ +} + +struct sh_machine_vector mv_7751systemh __initmv = { + .mv_nr_irqs = 72, + + .mv_inb = sh7751systemh_inb, + .mv_inw = sh7751systemh_inw, + .mv_inl = sh7751systemh_inl, + .mv_outb = sh7751systemh_outb, + .mv_outw = sh7751systemh_outw, + .mv_outl = sh7751systemh_outl, + + .mv_inb_p = sh7751systemh_inb_p, + .mv_inw_p = sh7751systemh_inw, + .mv_inl_p = sh7751systemh_inl, + .mv_outb_p = sh7751systemh_outb_p, + .mv_outw_p = sh7751systemh_outw, + .mv_outl_p = sh7751systemh_outl, + + .mv_insb = sh7751systemh_insb, + .mv_insw = sh7751systemh_insw, + .mv_insl = sh7751systemh_insl, + .mv_outsb = sh7751systemh_outsb, + .mv_outsw = sh7751systemh_outsw, + .mv_outsl = sh7751systemh_outsl, + + .mv_readb = sh7751systemh_readb, + .mv_readw = sh7751systemh_readw, + .mv_readl = sh7751systemh_readl, + .mv_writeb = sh7751systemh_writeb, + .mv_writew = sh7751systemh_writew, + .mv_writel = sh7751systemh_writel, + + .mv_isa_port2addr = sh7751systemh_isa_port2addr, + + .mv_init_irq = init_7751systemh_IRQ, +}; +ALIAS_MV(7751systemh) + +int __init platform_setup(void) +{ + return 0; +} + diff -puN arch/sh/boot/compressed/head.S~sh-merge arch/sh/boot/compressed/head.S --- 25/arch/sh/boot/compressed/head.S~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boot/compressed/head.S 2004-01-09 21:32:27.000000000 -0800 @@ -2,10 +2,12 @@ * linux/arch/sh/boot/compressed/head.S * * Copyright (C) 1999 Stuart Menefy + * Copyright (C) 2003 SUGIOKA Toshinobu */ .text +#include #include .global startup @@ -14,7 +16,54 @@ startup: mov.l init_sr, r1 ldc r1, sr - /* First clear BSS */ + /* Move myself to proper location if necessary */ + mova 1f, r0 + mov.l 1f, r2 + cmp/eq r2, r0 + bt clear_bss + sub r0, r2 + mov.l bss_start_addr, r0 + mov #0xe0, r1 + and r1, r0 ! align cache line + mov.l text_start_addr, r3 + mov r0, r1 + sub r2, r1 +3: + mov.l @r1, r4 + mov.l @(4,r1), r5 + mov.l @(8,r1), r6 + mov.l @(12,r1), r7 + mov.l @(16,r1), r8 + mov.l @(20,r1), r9 + mov.l @(24,r1), r10 + mov.l @(28,r1), r11 + mov.l r4, @r0 + mov.l r5, @(4,r0) + mov.l r6, @(8,r0) + mov.l r7, @(12,r0) + mov.l r8, @(16,r0) + mov.l r9, @(20,r0) + mov.l r10, @(24,r0) + mov.l r11, @(28,r0) +#ifdef CONFIG_CPU_SH4 + ocbwb @r0 +#endif + cmp/hi r3, r0 + add #-32, r0 + bt/s 3b + add #-32, r1 + mov.l 2f, r0 + jmp @r0 + nop + + .align 2 +1: .long 1b +2: .long clear_bss +text_start_addr: + .long startup + + /* Clear BSS */ +clear_bss: mov.l end_addr, r1 mov.l bss_start_addr, r2 mov #0, r0 diff -puN arch/sh/boot/compressed/Makefile~sh-merge arch/sh/boot/compressed/Makefile --- 25/arch/sh/boot/compressed/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/boot/compressed/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -16,9 +16,9 @@ endif # # IMAGE_OFFSET is the load offset of the compression loader # -IMAGE_OFFSET = $(shell printf "0x%8x" $$[0x80000000+0x$(CONFIG_MEMORY_START)+0x200000+0x10000]) +IMAGE_OFFSET := $(shell printf "0x%8x" $$[0x80000000+$(CONFIG_MEMORY_START)+$(CONFIG_BOOT_LINK_OFFSET)]) -LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../vmlinux.lds.s +LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../kernel/vmlinux.lds.s $(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE $(call if_changed,ld) diff -puN /dev/null arch/sh/boot/compressed/vmlinux.scr --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/boot/compressed/vmlinux.scr 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,9 @@ +SECTIONS +{ + .data : { + input_len = .; + LONG(input_data_end - input_data) input_data = .; + *(.data) + input_data_end = .; + } +} diff -puN arch/sh/cchips/hd6446x/hd64461/io.c~sh-merge arch/sh/cchips/hd6446x/hd64461/io.c --- 25/arch/sh/cchips/hd6446x/hd64461/io.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/cchips/hd6446x/hd64461/io.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,5 +1,5 @@ /* - * $Id: io.c,v 1.1.2.2 2002/01/20 05:03:25 mrbrown Exp $ + * $Id: io.c,v 1.4 2003/08/03 03:05:10 lethal Exp $ * Copyright (C) 2000 YAEGASHI Takeshi * Typical I/O routines for HD64461 system. */ @@ -78,24 +78,6 @@ unsigned int hd64461_inl(unsigned long p return *(volatile unsigned long*)PORT2ADDR(port); } -void hd64461_insb(unsigned long port, void *buffer, unsigned long count) -{ - unsigned char *buf=buffer; - while(count--) *buf++=inb(port); -} - -void hd64461_insw(unsigned long port, void *buffer, unsigned long count) -{ - unsigned short *buf=buffer; - while(count--) *buf++=inw(port); -} - -void hd64461_insl(unsigned long port, void *buffer, unsigned long count) -{ - unsigned long *buf=buffer; - while(count--) *buf++=inl(port); -} - void hd64461_outb(unsigned char b, unsigned long port) { *(volatile unsigned char*)PORT2ADDR(port) = b; @@ -117,20 +99,3 @@ void hd64461_outl(unsigned int b, unsign *(volatile unsigned long*)PORT2ADDR(port) = b; } -void hd64461_outsb(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned char *buf=buffer; - while(count--) outb(*buf++, port); -} - -void hd64461_outsw(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned short *buf=buffer; - while(count--) outw(*buf++, port); -} - -void hd64461_outsl(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned long *buf=buffer; - while(count--) outl(*buf++, port); -} diff -puN arch/sh/cchips/hd6446x/hd64461/setup.c~sh-merge arch/sh/cchips/hd6446x/hd64461/setup.c --- 25/arch/sh/cchips/hd6446x/hd64461/setup.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/cchips/hd6446x/hd64461/setup.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,5 +1,5 @@ /* - * $Id: setup.c,v 1.1.2.3 2002/11/04 20:33:57 lethal Exp $ + * $Id: setup.c,v 1.4 2003/08/03 03:05:10 lethal Exp $ * Copyright (C) 2000 YAEGASHI Takeshi * Hitachi HD64461 companion chip support */ @@ -76,21 +76,23 @@ static void shutdown_hd64461_irq(unsigne static struct hw_interrupt_type hd64461_irq_type = { - "HD64461-IRQ", - startup_hd64461_irq, - shutdown_hd64461_irq, - enable_hd64461_irq, - disable_hd64461_irq, - mask_and_ack_hd64461, - end_hd64461_irq + .typename = "HD64461-IRQ", + .startup = startup_hd64461_irq, + .shutdown = shutdown_hd64461_irq, + .enable = enable_hd64461_irq, + .disable = disable_hd64461_irq, + .ack = mask_and_ack_hd64461, + .end = end_hd64461_irq, }; -static void hd64461_interrupt(int irq, void *dev_id, struct pt_regs *regs) +static irqreturn_t hd64461_interrupt(int irq, void *dev_id, struct pt_regs *regs) { printk(KERN_INFO "HD64461: spurious interrupt, nirr: 0x%x nimr: 0x%x\n", inw(HD64461_NIRR), inw(HD64461_NIMR)); + + return IRQ_NONE; } int hd64461_irq_demux(int irq) diff -puN arch/sh/cchips/hd6446x/hd64465/io.c~sh-merge arch/sh/cchips/hd6446x/hd64465/io.c --- 25/arch/sh/cchips/hd6446x/hd64465/io.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/cchips/hd6446x/hd64465/io.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,5 +1,5 @@ /* - * $Id: io.c,v 1.1.2.2 2002/01/20 05:03:25 mrbrown Exp $ + * $Id: io.c,v 1.4 2003/08/03 03:05:10 lethal Exp $ * by Greg Banks * (c) 2000 PocketPenguins Inc * @@ -179,24 +179,6 @@ unsigned int hd64465_inl(unsigned long p return b; } -void hd64465_insb(unsigned long port, void *buffer, unsigned long count) -{ - unsigned char *buf=buffer; - while(count--) *buf++=inb(port); -} - -void hd64465_insw(unsigned long port, void *buffer, unsigned long count) -{ - unsigned short *buf=buffer; - while(count--) *buf++=inw(port); -} - -void hd64465_insl(unsigned long port, void *buffer, unsigned long count) -{ - unsigned long *buf=buffer; - while(count--) *buf++=inl(port); -} - void hd64465_outb(unsigned char b, unsigned long port) { unsigned long addr = PORT2ADDR(port); @@ -232,20 +214,3 @@ void hd64465_outl(unsigned int b, unsign *(volatile unsigned long*)addr = b; } -void hd64465_outsb(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned char *buf=buffer; - while(count--) outb(*buf++, port); -} - -void hd64465_outsw(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned short *buf=buffer; - while(count--) outw(*buf++, port); -} - -void hd64465_outsl(unsigned long port, const void *buffer, unsigned long count) -{ - const unsigned long *buf=buffer; - while(count--) outl(*buf++, port); -} diff -puN arch/sh/cchips/hd6446x/hd64465/setup.c~sh-merge arch/sh/cchips/hd6446x/hd64465/setup.c --- 25/arch/sh/cchips/hd6446x/hd64465/setup.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/cchips/hd6446x/hd64465/setup.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,5 +1,5 @@ /* - * $Id: setup.c,v 1.1.2.3 2002/11/04 20:33:57 lethal Exp $ + * $Id: setup.c,v 1.4 2003/08/03 03:05:10 lethal Exp $ * * Setup and IRQ handling code for the HD64465 companion chip. * by Greg Banks @@ -24,21 +24,13 @@ #include -#undef HD64465_DEBUG - -#ifdef HD64465_DEBUG -#define DPRINTK(args...) printk(args) -#else -#define DPRINTK(args...) -#endif - static void disable_hd64465_irq(unsigned int irq) { unsigned long flags; unsigned short nimr; unsigned short mask = 1 << (irq - HD64465_IRQ_BASE); - DPRINTK("disable_hd64465_irq(%d): mask=%x\n", irq, mask); + pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask); local_irq_save(flags); nimr = inw(HD64465_REG_NIMR); nimr |= mask; @@ -53,7 +45,7 @@ static void enable_hd64465_irq(unsigned unsigned short nimr; unsigned short mask = 1 << (irq - HD64465_IRQ_BASE); - DPRINTK("enable_hd64465_irq(%d): mask=%x\n", irq, mask); + pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask); local_irq_save(flags); nimr = inw(HD64465_REG_NIMR); nimr &= ~mask; @@ -95,15 +87,17 @@ static struct hw_interrupt_type hd64465_ .enable = enable_hd64465_irq, .disable = disable_hd64465_irq, .ack = mask_and_ack_hd64465, - .end = end_hd64465_irq + .end = end_hd64465_irq, }; -static void hd64465_interrupt(int irq, void *dev_id, struct pt_regs *regs) +static irqreturn_t hd64465_interrupt(int irq, void *dev_id, struct pt_regs *regs) { printk(KERN_INFO "HD64465: spurious interrupt, nirr: 0x%x nimr: 0x%x\n", inw(HD64465_REG_NIRR), inw(HD64465_REG_NIMR)); + + return IRQ_NONE; } @@ -145,7 +139,7 @@ int hd64465_irq_demux(int irq) unsigned short nirr = inw(HD64465_REG_NIRR); unsigned short nimr = inw(HD64465_REG_NIMR); - DPRINTK("hd64465_irq_demux, nirr=%04x, nimr=%04x\n", nirr, nimr); + pr_debug("hd64465_irq_demux, nirr=%04x, nimr=%04x\n", nirr, nimr); nirr &= ~nimr; for (bit = 1, i = 0 ; i < HD64465_IRQ_NUM ; bit <<= 1, i++) if (nirr & bit) diff -puN /dev/null arch/sh/cchips/Kconfig --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/cchips/Kconfig 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,76 @@ +# A board must have defined HD6446X_SERIES in order to see these +choice + prompt "HD6446x options" + depends HD6446X_SERIES + default HD64461 + +config HD64461 + bool "Hitachi HD64461 companion chip support" + depends on CPU_SUBTYPE_SH7709 + ---help--- + The Hitachi HD64461 provides an interface for + the SH7709 CPU, supporting a LCD controller, + CRT color controller, IrDA up to 4 Mbps, and a + PCMCIA controller supporting 2 slots. + + More information is available at + . + + Say Y if you want support for the HD64461. + Otherwise, say N. + +config HD64465 + bool "Hitachi HD64465 companion chip support" + depends on CPU_SUBTYPE_SH7750 + ---help--- + The Hitachi HD64465 provides an interface for + the SH7750 CPU, supporting a LCD controller, + CRT color controller, IrDA, USB, PCMCIA, + keyboard controller, and a printer interface. + + More information is available at + . + + Say Y if you want support for the HD64465. + Otherwise, say N. + +endchoice + +# These will also be split into the Kconfig's below +config HD64461_IRQ + int "HD64461 IRQ" + depends on HD64461 + default "36" + help + The default setting of the HD64461 IRQ is 36. + + Do not change this unless you know what you are doing. + +config HD64461_ENABLER + bool "HD64461 PCMCIA enabler" + depends on HD64461 + help + Say Y here if you want to enable PCMCIA support + via the HD64461 companion chip. + Otherwise, say N. + + +config HD64465_IOBASE + hex "HD64465 start address" + depends on HD64465 + default "0xb0000000" + help + The default setting of the HD64465 IO base address is 0xb0000000. + + Do not change this unless you know what you are doing. + +config HD64465_IRQ + int "HD64465 IRQ" + depends on HD64465 + default "5" + help + The default setting of the HD64465 IRQ is 5. + + Do not change this unless you know what you are doing. + + diff -puN arch/sh/configs/defconfig-adx~sh-merge arch/sh/configs/defconfig-adx --- 25/arch/sh/configs/defconfig-adx~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/configs/defconfig-adx 2004-01-09 21:32:27.000000000 -0800 @@ -45,8 +45,8 @@ CONFIG_CPU_SUBTYPE_SH7750=y # CONFIG_CPU_SH3 is not set CONFIG_CPU_SH4=y CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_MEMORY_START=08000000 -CONFIG_MEMORY_SIZE=00400000 +CONFIG_MEMORY_START=0x08000000 +CONFIG_MEMORY_SIZE=0x00400000 CONFIG_MEMORY_SET=y # CONFIG_DISCONTIGMEM is not set @@ -61,7 +61,7 @@ CONFIG_ISA=y CONFIG_CF_ENABLER=y # CONFIG_CF_AREA5 is not set CONFIG_CF_AREA6=y -CONFIG_CF_BASE_ADDR=b8000000 +CONFIG_CF_BASE_ADDR=0xb8000000 # CONFIG_HD64461 is not set # CONFIG_HD64465 is not set # CONFIG_SH_DMA is not set diff -puN arch/sh/configs/defconfig-cqreek~sh-merge arch/sh/configs/defconfig-cqreek --- 25/arch/sh/configs/defconfig-cqreek~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/configs/defconfig-cqreek 2004-01-09 21:32:27.000000000 -0800 @@ -45,8 +45,8 @@ CONFIG_CPU_SUBTYPE_SH7708=y CONFIG_CPU_SH3=y # CONFIG_CPU_SH4 is not set CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_MEMORY_START=0c000000 -CONFIG_MEMORY_SIZE=00400000 +CONFIG_MEMORY_START=0x0c000000 +CONFIG_MEMORY_SIZE=0x00400000 # CONFIG_DISCONTIGMEM is not set # @@ -59,7 +59,7 @@ CONFIG_ISA=y # CONFIG_NET is not set # CONFIG_CF_AREA5 is not set CONFIG_CF_AREA6=y -CONFIG_CF_BASE_ADDR=b8000000 +CONFIG_CF_BASE_ADDR=0xb8000000 # CONFIG_HD64461 is not set # CONFIG_HD64465 is not set # CONFIG_SH_DMA is not set diff -puN arch/sh/configs/defconfig-dreamcast~sh-merge arch/sh/configs/defconfig-dreamcast --- 25/arch/sh/configs/defconfig-dreamcast~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/configs/defconfig-dreamcast 2004-01-09 21:32:27.000000000 -0800 @@ -1,23 +1,48 @@ # -# Automatically generated by make menuconfig: don't edit +# Automatically generated make config: don't edit # CONFIG_SUPERH=y CONFIG_UID16=y CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set # # Code maturity level options # CONFIG_EXPERIMENTAL=y +# CONFIG_CLEAN_COMPILE is not set +# CONFIG_STANDALONE is not set +CONFIG_BROKEN=y +CONFIG_BROKEN_ON_SMP=y + +# +# General setup +# +CONFIG_SWAP=y +# CONFIG_SYSVIPC is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_SYSCTL is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_IKCONFIG is not set +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y # # Loadable module support # -# CONFIG_MODULES is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODVERSIONS is not set +# CONFIG_KMOD is not set # -# Processor type and features +# System type # # CONFIG_SH_SOLUTION_ENGINE is not set # CONFIG_SH_7751_SOLUTION_ENGINE is not set @@ -29,60 +54,77 @@ CONFIG_EXPERIMENTAL=y # CONFIG_SH_CQREEK is not set # CONFIG_SH_DMIDA is not set # CONFIG_SH_EC3104 is not set +# CONFIG_SH_SATURN is not set CONFIG_SH_DREAMCAST=y # CONFIG_SH_CAT68701 is not set # CONFIG_SH_BIGSUR is not set # CONFIG_SH_SH2000 is not set # CONFIG_SH_ADX is not set +# CONFIG_SH_MPC1211 is not set +# CONFIG_SH_SECUREEDGE5410 is not set # CONFIG_SH_UNKNOWN is not set -# CONFIG_SH_RTC is not set +# CONFIG_CPU_SH2 is not set +# CONFIG_CPU_SH3 is not set +CONFIG_CPU_SH4=y +# CONFIG_CPU_SUBTYPE_SH7604 is not set +# CONFIG_CPU_SUBTYPE_SH7300 is not set # CONFIG_CPU_SUBTYPE_SH7707 is not set # CONFIG_CPU_SUBTYPE_SH7708 is not set # CONFIG_CPU_SUBTYPE_SH7709 is not set CONFIG_CPU_SUBTYPE_SH7750=y # CONFIG_CPU_SUBTYPE_SH7751 is not set # CONFIG_CPU_SUBTYPE_ST40STB1 is not set -# CONFIG_CPU_SH3 is not set -CONFIG_CPU_SH4=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_MEMORY_START=0c000000 -CONFIG_MEMORY_SIZE=00400000 +CONFIG_MMU=y +# CONFIG_CMDLINE_BOOL is not set +CONFIG_MEMORY_START=0x0c000000 +CONFIG_MEMORY_SIZE=0x01000000 CONFIG_MEMORY_SET=y -# CONFIG_DISCONTIGMEM is not set +# CONFIG_MEMORY_OVERRIDE is not set +CONFIG_ZERO_PAGE_OFFSET=0x00001000 +CONFIG_BOOT_LINK_OFFSET=0x00800000 +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_PREEMPT=y +# CONFIG_UBC_WAKEUP is not set +# CONFIG_SH_WRITETHROUGH is not set +# CONFIG_SH_OCRAM is not set +CONFIG_SH_STORE_QUEUES=y +# CONFIG_SMP is not set +CONFIG_SH_PCLK_FREQ=49876504 +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +CONFIG_SH_CPU_FREQ=y +# CONFIG_CPU_FREQ_PROC_INTF is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_SH_DMA=y +CONFIG_NR_ONCHIP_DMA_CHANNELS=4 +CONFIG_NR_DMA_CHANNELS_BOOL=y +CONFIG_NR_DMA_CHANNELS=9 +CONFIG_DMA_PAGE_OPS=y # -# General setup +# Bus options (PCI, PCMCIA, EISA, MCA, ISA) # -CONFIG_ISA=y -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_NET=y -# CONFIG_HD64461 is not set -# CONFIG_HD64465 is not set -# CONFIG_SH_DMA is not set CONFIG_PCI=y -# CONFIG_PCI_GOBIOS is not set -# CONFIG_PCI_GODIRECT is not set -CONFIG_PCI_GOANY=y -CONFIG_PCI_BIOS=y -CONFIG_PCI_DIRECT=y # CONFIG_SH_PCIDMA_NONCOHERENT is not set +CONFIG_PCI_AUTO=y +CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y # CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set -# CONFIG_SYSVIPC is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_SYSCTL is not set -CONFIG_KCORE_ELF=y -# CONFIG_KCORE_AOUT is not set + +# +# Executable file formats +# CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_FLAT is not set # CONFIG_BINFMT_MISC is not set # -# Parallel port support +# Generic Driver Options # -# CONFIG_PARPORT is not set # # Memory Technology Devices (MTD) @@ -90,64 +132,89 @@ CONFIG_BINFMT_ELF=y # CONFIG_MTD is not set # +# Parallel port support +# +# CONFIG_PARPORT is not set + +# # Block devices # -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_CISS_SCSI_TAPE is not set # CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_RAM_SIZE=1024 CONFIG_BLK_DEV_INITRD=y +# CONFIG_LBD is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_SCSI is not set # # Multi-device support (RAID and LVM) # # CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set + +# +# IEEE 1394 (FireWire) support (EXPERIMENTAL) +# +# CONFIG_IEEE1394 is not set + +# +# Networking support +# +CONFIG_NET=y # # Networking options # CONFIG_PACKET=y # CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK is not set -# CONFIG_NETFILTER is not set -# CONFIG_FILTER is not set +# CONFIG_NETLINK_DEV is not set CONFIG_UNIX=y +# CONFIG_NET_KEY is not set CONFIG_INET=y # CONFIG_IP_MULTICAST is not set # CONFIG_IP_ADVANCED_ROUTER is not set CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_DHCP=y # CONFIG_IP_PNP_BOOTP is not set # CONFIG_IP_PNP_RARP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set # CONFIG_INET_ECN is not set # CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set # CONFIG_IPV6 is not set -# CONFIG_KHTTPD is not set +# CONFIG_DECNET is not set +# CONFIG_BRIDGE is not set +# CONFIG_NETFILTER is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +CONFIG_IPV6_SCTP__=y +# CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set +# CONFIG_LLC2 is not set # CONFIG_IPX is not set # CONFIG_ATALK is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set -# CONFIG_LLC is not set # CONFIG_NET_DIVERT is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set @@ -160,24 +227,9 @@ CONFIG_IP_PNP=y # CONFIG_NET_SCHED is not set # -# ATA/IDE/MFM/RLL support -# -# CONFIG_IDE is not set -# CONFIG_BLK_DEV_HD is not set - -# -# SCSI support -# -# CONFIG_SCSI is not set - -# -# IEEE 1394 (FireWire) support (EXPERIMENTAL) -# -# CONFIG_IEEE1394 is not set - -# -# Network device support +# Network testing # +# CONFIG_NET_PKTGEN is not set CONFIG_NETDEVICES=y # @@ -193,65 +245,60 @@ CONFIG_NETDEVICES=y # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y +CONFIG_MII=y # CONFIG_STNIC is not set -# CONFIG_SUNLANCE is not set # CONFIG_HAPPYMEAL is not set -# CONFIG_SUNBMAC is not set -# CONFIG_SUNQE is not set -# CONFIG_SUNLANCE is not set # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set -# CONFIG_LANCE is not set -# CONFIG_NET_VENDOR_SMC is not set -# CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_AT1700 is not set -# CONFIG_DEPCA is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set -# CONFIG_NET_ISA is not set CONFIG_NET_PCI=y # CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set # CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_AC3200 is not set -# CONFIG_APRICOT is not set -# CONFIG_TULIP is not set -# CONFIG_DE4X5 is not set +# CONFIG_B44 is not set # CONFIG_DGRS is not set -# CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set -# CONFIG_LNE390 is not set +# CONFIG_E100 is not set # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set -# CONFIG_NE3210 is not set -# CONFIG_ES3210 is not set # CONFIG_8139CP is not set CONFIG_8139TOO=y # CONFIG_8139TOO_PIO is not set # CONFIG_8139TOO_TUNE_TWISTER is not set # CONFIG_8139TOO_8129 is not set -CONFIG_8139TOO_DREAMCAST=y +# CONFIG_8139_OLD_RX_RESET is not set # CONFIG_SIS900 is not set # CONFIG_EPIC100 is not set # CONFIG_SUNDANCE is not set # CONFIG_TLAN is not set # CONFIG_VIA_RHINE is not set -# CONFIG_VIA_RHINE_MMIO is not set -# CONFIG_WINBOND_840 is not set -# CONFIG_NET_POCKET is not set # # Ethernet (1000 Mbit) # # CONFIG_ACENIC is not set # CONFIG_DL2K is not set -# CONFIG_MYRI_SBUS is not set +# CONFIG_E1000 is not set # CONFIG_NS83820 is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set # CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_IXGB is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set -# CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set @@ -264,7 +311,6 @@ CONFIG_8139TOO_DREAMCAST=y # Token Ring devices # # CONFIG_TR is not set -# CONFIG_NET_FC is not set # CONFIG_RCPCI is not set # CONFIG_SHAPER is not set @@ -274,165 +320,186 @@ CONFIG_8139TOO_DREAMCAST=y # CONFIG_WAN is not set # -# Old CD-ROM drivers (not SCSI, not IDE) +# Amateur Radio support +# +# CONFIG_HAMRADIO is not set + +# +# IrDA (infrared) support +# +# CONFIG_IRDA is not set + +# +# Bluetooth support +# +# CONFIG_BT is not set + +# +# ISDN subsystem # -# CONFIG_CD_NO_IDESCSI is not set +# CONFIG_ISDN_BOOL is not set # -# Input core support +# Telephony Support # -CONFIG_INPUT=y -CONFIG_INPUT_KEYBDEV=y -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_INPUT_JOYDEV=y -# CONFIG_INPUT_EVDEV is not set +# CONFIG_PHONE is not set # -# Maple Bus support +# Input device support +# +# CONFIG_INPUT is not set + +# +# Userland interfaces +# + +# +# Input I/O drivers +# +# CONFIG_GAMEPORT is not set +CONFIG_SOUND_GAMEPORT=y +CONFIG_SERIO=y +# CONFIG_SERIO_I8042 is not set +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_CT82C710 is not set +# CONFIG_SERIO_PCIPS2 is not set + +# +# Input Device Drivers # -CONFIG_MAPLE=y # # Character devices # -CONFIG_VT=y -CONFIG_VT_CONSOLE=y +# CONFIG_VT is not set # CONFIG_SERIAL is not set CONFIG_SH_SCI=y CONFIG_SERIAL_CONSOLE=y -# CONFIG_UNIX98_PTYS is not set # -# Maple Bus input peripherals -# -CONFIG_MAPLE_KEYBOARD=y -CONFIG_MAPLE_MOUSE=y - +# Unix 98 PTY support # -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set -# CONFIG_INPUT_NS558 is not set -# CONFIG_INPUT_LIGHTNING is not set -# CONFIG_INPUT_PCIGAME is not set -# CONFIG_INPUT_CS461X is not set -# CONFIG_INPUT_EMU10K1 is not set -# CONFIG_INPUT_SERIO is not set -# CONFIG_INPUT_SERPORT is not set -# CONFIG_INPUT_ANALOG is not set -# CONFIG_INPUT_A3D is not set -# CONFIG_INPUT_ADI is not set -# CONFIG_INPUT_COBRA is not set -# CONFIG_INPUT_GF2K is not set -# CONFIG_INPUT_GRIP is not set -# CONFIG_INPUT_INTERACT is not set -# CONFIG_INPUT_TMDC is not set -# CONFIG_INPUT_SIDEWINDER is not set -# CONFIG_INPUT_IFORCE_USB is not set -# CONFIG_INPUT_IFORCE_232 is not set -# CONFIG_INPUT_WARRIOR is not set -# CONFIG_INPUT_MAGELLAN is not set -# CONFIG_INPUT_SPACEORB is not set -# CONFIG_INPUT_SPACEBALL is not set -# CONFIG_INPUT_STINGER is not set -# CONFIG_INPUT_DB9 is not set -# CONFIG_INPUT_GAMECON is not set -# CONFIG_INPUT_TURBOGRAFX is not set -CONFIG_INPUT_MAPLE_CONTROL=y +CONFIG_UNIX98_PTYS=y +CONFIG_UNIX98_PTY_COUNT=256 # CONFIG_PSMOUSE is not set # # Watchdog Cards # -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set -CONFIG_SH_WDT=y +# CONFIG_WATCHDOG is not set # CONFIG_RTC is not set # +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_SH_SCI is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# I2C Algorithms +# + +# +# I2C Hardware Bus support +# + +# +# I2C Hardware Sensors Chip support +# +# CONFIG_I2C_SENSOR is not set + +# # File systems # +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +CONFIG_ROMFS_FS=y # CONFIG_QUOTA is not set # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_REISERFS_PROC_INFO is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_FAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_DEVFS_FS=y +CONFIG_DEVFS_MOUNT=y +# CONFIG_DEVFS_DEBUG is not set +CONFIG_DEVPTS_FS=y +# CONFIG_DEVPTS_FS_XATTR is not set +CONFIG_TMPFS=y +# CONFIG_HUGETLBFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# # CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set +# CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_JBD_DEBUG is not set -# CONFIG_FAT_FS is not set -# CONFIG_MSDOS_FS is not set -# CONFIG_UMSDOS_FS is not set -# CONFIG_VFAT_FS is not set # CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -CONFIG_RAMFS=y -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_ZISOFS is not set -# CONFIG_MINIX_FS is not set +CONFIG_CRAMFS=y # CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_RW is not set # CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVFS_MOUNT is not set -# CONFIG_DEVFS_DEBUG is not set -# CONFIG_DEVPTS_FS is not set # CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_EXT2_FS is not set # CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set # CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set # # Network File Systems # -# CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -CONFIG_ROOT_NFS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V4 is not set # CONFIG_NFSD is not set -# CONFIG_NFSD_V3 is not set -CONFIG_SUNRPC=y +CONFIG_ROOT_NFS=y CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +# CONFIG_EXPORTFS is not set +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_GSS is not set # CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set # CONFIG_NCP_FS is not set -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set -# CONFIG_ZISOFS_FS is not set -# CONFIG_ZLIB_FS_INFLATE is not set +# CONFIG_CODA_FS is not set +# CONFIG_INTERMEZZO_FS is not set +# CONFIG_AFS_FS is not set # # Partition Types # # CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set # # Multimedia devices @@ -440,40 +507,39 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_VIDEO_DEV is not set # -# Console drivers +# Digital Video Broadcasting Devices # -# CONFIG_VGA_CONSOLE is not set -# CONFIG_VIDEO_SELECT is not set -# CONFIG_MDA_CONSOLE is not set +# CONFIG_DVB is not set # -# Frame-buffer support +# Graphics support # CONFIG_FB=y -CONFIG_DUMMY_CONSOLE=y -# CONFIG_FB_RIVA is not set -# CONFIG_FB_CLGEN is not set +# CONFIG_FB_CIRRUS is not set # CONFIG_FB_PM2 is not set # CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set CONFIG_FB_PVR2=y -CONFIG_FB_PVR2_DEBUG=y +# CONFIG_FB_PVR2_DEBUG is not set # CONFIG_FB_E1355 is not set +# CONFIG_FB_RIVA is not set # CONFIG_FB_MATROX is not set -# CONFIG_FB_ATY is not set # CONFIG_FB_RADEON is not set # CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set # CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set # CONFIG_FB_3DFX is not set # CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_PM3 is not set # CONFIG_FB_VIRTUAL is not set -# CONFIG_FBCON_ADVANCED is not set -CONFIG_FBCON_CFB16=y -CONFIG_FBCON_CFB24=y -CONFIG_FBCON_CFB32=y -# CONFIG_FBCON_FONTWIDTH8_ONLY is not set -# CONFIG_FBCON_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y + +# +# Logo configuration +# +# CONFIG_LOGO is not set # # Sound @@ -481,7 +547,38 @@ CONFIG_FONT_8x16=y # CONFIG_SOUND is not set # +# USB support +# +# CONFIG_USB is not set +# CONFIG_USB_GADGET is not set + +# +# Profiling support +# +CONFIG_PROFILING=y +CONFIG_OPROFILE=y + +# # Kernel hacking # # CONFIG_MAGIC_SYSRQ is not set +# CONFIG_DEBUG_SPINLOCK is not set # CONFIG_SH_STANDARD_BIOS is not set +# CONFIG_KGDB is not set +# CONFIG_FRAME_POINTER is not set + +# +# Security options +# +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_CRC32=y +CONFIG_ZLIB_INFLATE=y diff -puN /dev/null arch/sh/configs/defconfig-se7751 --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/configs/defconfig-se7751 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,617 @@ +# +# Automatically generated make config: don't edit +# +CONFIG_SUPERH=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_STANDALONE=y +CONFIG_BROKEN_ON_SMP=y + +# +# General setup +# +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_SYSCTL=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_IKCONFIG is not set +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y + +# +# Loadable module support +# +CONFIG_MODULES=y +# CONFIG_MODULE_UNLOAD is not set +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODVERSIONS is not set +# CONFIG_KMOD is not set + +# +# System type +# +# CONFIG_SH_SOLUTION_ENGINE is not set +CONFIG_SH_7751_SOLUTION_ENGINE=y +# CONFIG_SH_7751_SYSTEMH is not set +# CONFIG_SH_STB1_HARP is not set +# CONFIG_SH_STB1_OVERDRIVE is not set +# CONFIG_SH_HP620 is not set +# CONFIG_SH_HP680 is not set +# CONFIG_SH_HP690 is not set +# CONFIG_SH_CQREEK is not set +# CONFIG_SH_DMIDA is not set +# CONFIG_SH_EC3104 is not set +# CONFIG_SH_SATURN is not set +# CONFIG_SH_DREAMCAST is not set +# CONFIG_SH_CAT68701 is not set +# CONFIG_SH_BIGSUR is not set +# CONFIG_SH_SH2000 is not set +# CONFIG_SH_ADX is not set +# CONFIG_SH_MPC1211 is not set +# CONFIG_SH_SECUREEDGE5410 is not set +# CONFIG_SH_UNKNOWN is not set +# CONFIG_CPU_SH2 is not set +# CONFIG_CPU_SH3 is not set +CONFIG_CPU_SH4=y +# CONFIG_CPU_SUBTYPE_SH7604 is not set +# CONFIG_CPU_SUBTYPE_SH7300 is not set +# CONFIG_CPU_SUBTYPE_SH7707 is not set +# CONFIG_CPU_SUBTYPE_SH7708 is not set +# CONFIG_CPU_SUBTYPE_SH7709 is not set +# CONFIG_CPU_SUBTYPE_SH7750 is not set +CONFIG_CPU_SUBTYPE_SH7751=y +# CONFIG_CPU_SUBTYPE_SH7760 is not set +# CONFIG_CPU_SUBTYPE_ST40STB1 is not set +CONFIG_MMU=y +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="console=ttySC1,38400" +CONFIG_MEMORY_START=0x0c000000 +CONFIG_MEMORY_SIZE=0x04000000 +CONFIG_MEMORY_SET=y +# CONFIG_MEMORY_OVERRIDE is not set +CONFIG_SH_RTC=y +CONFIG_ZERO_PAGE_OFFSET=0x00010000 +CONFIG_BOOT_LINK_OFFSET=0x00800000 +CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_PREEMPT is not set +# CONFIG_UBC_WAKEUP is not set +# CONFIG_SH_WRITETHROUGH is not set +# CONFIG_SH_OCRAM is not set +# CONFIG_SH_STORE_QUEUES is not set +# CONFIG_SMP is not set +CONFIG_SH_PCLK_FREQ=60013568 +# CONFIG_CPU_FREQ is not set +# CONFIG_SH_DMA is not set + +# +# Bus options (PCI, PCMCIA, EISA, MCA, ISA) +# +CONFIG_PCI=y +# CONFIG_SH_PCIDMA_NONCOHERENT is not set +CONFIG_PCI_AUTO=y +CONFIG_PCI_AUTO_UPDATE_RESOURCES=y +CONFIG_PCI_DMA=y +# CONFIG_PCI_LEGACY_PROC is not set +# CONFIG_PCI_NAMES is not set +# CONFIG_HOTPLUG is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_FLAT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Generic Driver Options +# + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_CONCAT is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set + +# +# User Modules And Translation Layers +# +# CONFIG_MTD_CHAR is not set +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_RAM=y +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_MPC1211 is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLKMTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_INITRD=y +# CONFIG_LBD is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# IEEE 1394 (FireWire) support (EXPERIMENTAL) +# +# CONFIG_IEEE1394 is not set + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_NETLINK_DEV=y +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_INET_ECN is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set + +# +# IP: Virtual Server Configuration +# +# CONFIG_IP_VS is not set +# CONFIG_IPV6 is not set +# CONFIG_DECNET is not set +# CONFIG_BRIDGE is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_DEBUG=y + +# +# IP: Netfilter Configuration +# +# CONFIG_IP_NF_CONNTRACK is not set +CONFIG_IP_NF_QUEUE=y +# CONFIG_IP_NF_IPTABLES is not set +# CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set +# CONFIG_IP_NF_COMPAT_IPFWADM is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +CONFIG_IPV6_SCTP__=y +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_FASTROUTE is not set +# CONFIG_NET_HW_FLOWCONTROL is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +CONFIG_NETDEVICES=y + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_ETHERTAP is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_STNIC is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_NET_VENDOR_3COM is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +CONFIG_NET_PCI=y +CONFIG_PCNET32=y +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_DGRS is not set +# CONFIG_EEPRO100 is not set +# CONFIG_E100 is not set +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_IXGB is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set +# CONFIG_RCPCI is not set +# CONFIG_SHAPER is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set + +# +# Amateur Radio support +# +# CONFIG_HAMRADIO is not set + +# +# IrDA (infrared) support +# +# CONFIG_IRDA is not set + +# +# Bluetooth support +# +# CONFIG_BT is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN_BOOL is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +# CONFIG_INPUT is not set + +# +# Userland interfaces +# + +# +# Input I/O drivers +# +# CONFIG_GAMEPORT is not set +CONFIG_SOUND_GAMEPORT=y +# CONFIG_SERIO is not set +# CONFIG_SERIO_I8042 is not set + +# +# Input Device Drivers +# + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL is not set +CONFIG_SH_SCI=y +CONFIG_SERIAL_CONSOLE=y + +# +# Unix 98 PTY support +# +CONFIG_UNIX98_PTYS=y +CONFIG_UNIX98_PTY_COUNT=256 +CONFIG_HEARTBEAT=y +# CONFIG_PSMOUSE is not set + +# +# Watchdog Cards +# +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +# CONFIG_SH_WDT is not set +# CONFIG_RTC is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_SH_SCI is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# I2C Algorithms +# + +# +# I2C Hardware Bus support +# + +# +# I2C Hardware Sensors Chip support +# +# CONFIG_I2C_SENSOR is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_FAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +# CONFIG_DEVFS_FS is not set +CONFIG_DEVPTS_FS=y +# CONFIG_DEVPTS_FS_XATTR is not set +CONFIG_TMPFS=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +# CONFIG_JFFS2_FS_NAND is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +# CONFIG_NFS_FS is not set +# CONFIG_NFSD is not set +# CONFIG_EXPORTFS is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_INTERMEZZO_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +# CONFIG_USB is not set +# CONFIG_USB_GADGET is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_SH_STANDARD_BIOS is not set +# CONFIG_KGDB is not set +# CONFIG_FRAME_POINTER is not set + +# +# Security options +# +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_CRC32=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y diff -puN /dev/null arch/sh/configs/defconfig-snapgear --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/configs/defconfig-snapgear 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,540 @@ +# +# Automatically generated make config: don't edit +# +CONFIG_SUPERH=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_STANDALONE=y +CONFIG_BROKEN_ON_SMP=y + +# +# General setup +# +CONFIG_SWAP=y +# CONFIG_SYSVIPC is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_SYSCTL is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_IKCONFIG is not set +# CONFIG_EMBEDDED is not set +CONFIG_KALLSYMS=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y + +# +# Loadable module support +# +# CONFIG_MODULES is not set + +# +# System type +# +# CONFIG_SH_SOLUTION_ENGINE is not set +# CONFIG_SH_7751_SOLUTION_ENGINE is not set +# CONFIG_SH_STB1_HARP is not set +# CONFIG_SH_STB1_OVERDRIVE is not set +# CONFIG_SH_HP620 is not set +# CONFIG_SH_HP680 is not set +# CONFIG_SH_HP690 is not set +# CONFIG_SH_CQREEK is not set +# CONFIG_SH_DMIDA is not set +# CONFIG_SH_EC3104 is not set +# CONFIG_SH_SATURN is not set +# CONFIG_SH_DREAMCAST is not set +# CONFIG_SH_CAT68701 is not set +# CONFIG_SH_BIGSUR is not set +# CONFIG_SH_SH2000 is not set +# CONFIG_SH_ADX is not set +# CONFIG_SH_MPC1211 is not set +CONFIG_SH_SECUREEDGE5410=y +# CONFIG_SH_UNKNOWN is not set +# CONFIG_CPU_SH2 is not set +# CONFIG_CPU_SH3 is not set +CONFIG_CPU_SH4=y +# CONFIG_CPU_SUBTYPE_SH7604 is not set +# CONFIG_CPU_SUBTYPE_SH7300 is not set +# CONFIG_CPU_SUBTYPE_SH7707 is not set +# CONFIG_CPU_SUBTYPE_SH7708 is not set +# CONFIG_CPU_SUBTYPE_SH7709 is not set +# CONFIG_CPU_SUBTYPE_SH7750 is not set +CONFIG_CPU_SUBTYPE_SH7751=y +# CONFIG_CPU_SUBTYPE_ST40STB1 is not set +CONFIG_MMU=y +# CONFIG_CMDLINE_BOOL is not set +CONFIG_MEMORY_START=0x08000000 +CONFIG_MEMORY_SIZE=0x01000000 +CONFIG_MEMORY_SET=y +# CONFIG_MEMORY_OVERRIDE is not set +CONFIG_SH_RTC=y +CONFIG_ZERO_PAGE_OFFSET=0x00001000 +CONFIG_BOOT_LINK_OFFSET=0x00800000 +CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_PREEMPT is not set +# CONFIG_UBC_WAKEUP is not set +# CONFIG_SH_WRITETHROUGH is not set +# CONFIG_SH_OCRAM is not set +# CONFIG_SH_STORE_QUEUES is not set +# CONFIG_SMP is not set +CONFIG_SH_PCLK_FREQ=60013568 +# CONFIG_CPU_FREQ is not set +CONFIG_SH_DMA=y +CONFIG_NR_DMA_CHANNELS=8 +# CONFIG_DMA_PAGE_OPS is not set + +# +# Bus options (PCI, PCMCIA, EISA, MCA, ISA) +# +CONFIG_PCI=y +# CONFIG_SH_PCIDMA_NONCOHERENT is not set +CONFIG_PCI_AUTO=y +CONFIG_PCI_AUTO_UPDATE_RESOURCES=y +CONFIG_PCI_DMA=y +# CONFIG_PCI_LEGACY_PROC is not set +CONFIG_PCI_NAMES=y +# CONFIG_HOTPLUG is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_FLAT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Generic Driver Options +# + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_INITRD=y +# CONFIG_LBD is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# IEEE 1394 (FireWire) support (EXPERIMENTAL) +# +# CONFIG_IEEE1394 is not set + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_PACKET is not set +# CONFIG_NETLINK_DEV is not set +# CONFIG_UNIX is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_INET_ECN is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_IPV6 is not set +# CONFIG_DECNET is not set +# CONFIG_BRIDGE is not set +# CONFIG_NETFILTER is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +CONFIG_IPV6_SCTP__=y +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_LLC is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_FASTROUTE is not set +# CONFIG_NET_HW_FLOWCONTROL is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +CONFIG_NETDEVICES=y + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +# CONFIG_MII is not set +# CONFIG_STNIC is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_NET_VENDOR_3COM is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_DGRS is not set +# CONFIG_EEPRO100 is not set +# CONFIG_E100 is not set +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +CONFIG_8139TOO=y +# CONFIG_8139TOO_PIO is not set +# CONFIG_8139TOO_TUNE_TWISTER is not set +# CONFIG_8139TOO_8129 is not set +# CONFIG_8139_OLD_RX_RESET is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_IXGB is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Token Ring devices (depends on LLC=y) +# +# CONFIG_RCPCI is not set +# CONFIG_SHAPER is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set + +# +# Amateur Radio support +# +# CONFIG_HAMRADIO is not set + +# +# IrDA (infrared) support +# +# CONFIG_IRDA is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN_BOOL is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input I/O drivers +# +# CONFIG_GAMEPORT is not set +CONFIG_SOUND_GAMEPORT=y +# CONFIG_SERIO is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL is not set +CONFIG_SH_SCI=y +CONFIG_SERIAL_CONSOLE=y + +# +# Unix 98 PTY support +# +CONFIG_UNIX98_PTYS=y +CONFIG_UNIX98_PTY_COUNT=256 +# CONFIG_PSMOUSE is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_RTC is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_SH_SCI is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# I2C Hardware Sensors Mainboard support +# + +# +# I2C Hardware Sensors Chip support +# +# CONFIG_I2C_SENSOR is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +CONFIG_ROMFS_FS=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_FAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_DEVFS_FS=y +CONFIG_DEVFS_MOUNT=y +# CONFIG_DEVFS_DEBUG is not set +CONFIG_DEVPTS_FS=y +# CONFIG_DEVPTS_FS_XATTR is not set +CONFIG_TMPFS=y +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V4 is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +# CONFIG_EXPORTFS is not set +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_GSS is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_INTERMEZZO_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +# CONFIG_USB is not set +# CONFIG_USB_GADGET is not set + +# +# Bluetooth support +# +# CONFIG_BT is not set + +# +# Kernel hacking +# +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_SH_STANDARD_BIOS is not set +# CONFIG_KGDB is not set +# CONFIG_FRAME_POINTER is not set + +# +# Security options +# +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +# CONFIG_CRC32 is not set +CONFIG_ZLIB_INFLATE=y diff -puN /dev/null arch/sh/configs/defconfig-systemh --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/configs/defconfig-systemh 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,372 @@ +# +# Automatically generated make config: don't edit +# +CONFIG_SUPERH=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +# CONFIG_CLEAN_COMPILE is not set +# CONFIG_STANDALONE is not set +CONFIG_BROKEN=y +CONFIG_BROKEN_ON_SMP=y + +# +# General setup +# +CONFIG_SWAP=y +# CONFIG_SYSVIPC is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_SYSCTL is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_IKCONFIG is not set +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODVERSIONS is not set +# CONFIG_KMOD is not set + +# +# System type +# +# CONFIG_SH_SOLUTION_ENGINE is not set +# CONFIG_SH_7751_SOLUTION_ENGINE is not set +CONFIG_SH_7751_SYSTEMH=y +# CONFIG_SH_STB1_HARP is not set +# CONFIG_SH_STB1_OVERDRIVE is not set +# CONFIG_SH_HP620 is not set +# CONFIG_SH_HP680 is not set +# CONFIG_SH_HP690 is not set +# CONFIG_SH_CQREEK is not set +# CONFIG_SH_DMIDA is not set +# CONFIG_SH_EC3104 is not set +# CONFIG_SH_SATURN is not set +# CONFIG_SH_DREAMCAST is not set +# CONFIG_SH_CAT68701 is not set +# CONFIG_SH_BIGSUR is not set +# CONFIG_SH_SH2000 is not set +# CONFIG_SH_ADX is not set +# CONFIG_SH_MPC1211 is not set +# CONFIG_SH_SECUREEDGE5410 is not set +# CONFIG_SH_UNKNOWN is not set +# CONFIG_CPU_SH2 is not set +# CONFIG_CPU_SH3 is not set +CONFIG_CPU_SH4=y +# CONFIG_CPU_SUBTYPE_SH7604 is not set +# CONFIG_CPU_SUBTYPE_SH7300 is not set +# CONFIG_CPU_SUBTYPE_SH7707 is not set +# CONFIG_CPU_SUBTYPE_SH7708 is not set +# CONFIG_CPU_SUBTYPE_SH7709 is not set +# CONFIG_CPU_SUBTYPE_SH7750 is not set +CONFIG_CPU_SUBTYPE_SH7751=y +# CONFIG_CPU_SUBTYPE_ST40STB1 is not set +CONFIG_MMU=y +# CONFIG_CMDLINE_BOOL is not set +CONFIG_MEMORY_START=0x0c000000 +CONFIG_MEMORY_SIZE=0x00400000 +# CONFIG_MEMORY_OVERRIDE is not set +CONFIG_SH_RTC=y +CONFIG_ZERO_PAGE_OFFSET=0x00001000 +CONFIG_BOOT_LINK_OFFSET=0x00800000 +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_PREEMPT=y +# CONFIG_UBC_WAKEUP is not set +# CONFIG_SH_WRITETHROUGH is not set +# CONFIG_SH_OCRAM is not set +# CONFIG_SH_STORE_QUEUES is not set +# CONFIG_SMP is not set +CONFIG_SH_PCLK_FREQ=49876504 +# CONFIG_CPU_FREQ is not set +# CONFIG_SH_DMA is not set + +# +# Bus options (PCI, PCMCIA, EISA, MCA, ISA) +# +CONFIG_PCI=y +# CONFIG_SH_PCIDMA_NONCOHERENT is not set +CONFIG_PCI_AUTO=y +CONFIG_PCI_AUTO_UPDATE_RESOURCES=y +CONFIG_PCI_DMA=y +CONFIG_PCI_LEGACY_PROC=y +CONFIG_PCI_NAMES=y +# CONFIG_HOTPLUG is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_FLAT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Generic Driver Options +# + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Block devices +# +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_LOOP is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=1024 +CONFIG_BLK_DEV_INITRD=y +# CONFIG_LBD is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# IEEE 1394 (FireWire) support (EXPERIMENTAL) +# +# CONFIG_IEEE1394 is not set + +# +# Networking support +# +# CONFIG_NET is not set + +# +# Amateur Radio support +# +# CONFIG_HAMRADIO is not set + +# +# ISDN subsystem +# + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +# CONFIG_INPUT is not set + +# +# Userland interfaces +# + +# +# Input I/O drivers +# +# CONFIG_GAMEPORT is not set +CONFIG_SOUND_GAMEPORT=y +CONFIG_SERIO=y +# CONFIG_SERIO_I8042 is not set +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_CT82C710 is not set +# CONFIG_SERIO_PCIPS2 is not set + +# +# Input Device Drivers +# + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL is not set +CONFIG_SH_SCI=y +CONFIG_SERIAL_CONSOLE=y + +# +# Unix 98 PTY support +# +CONFIG_UNIX98_PTYS=y +CONFIG_UNIX98_PTY_COUNT=256 +# CONFIG_PSMOUSE is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_RTC is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_SH_SCI is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# I2C Algorithms +# + +# +# I2C Hardware Bus support +# + +# +# I2C Hardware Sensors Chip support +# +# CONFIG_I2C_SENSOR is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +CONFIG_ROMFS_FS=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_FAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_DEVFS_FS=y +CONFIG_DEVFS_MOUNT=y +# CONFIG_DEVFS_DEBUG is not set +CONFIG_DEVPTS_FS=y +# CONFIG_DEVPTS_FS_XATTR is not set +CONFIG_TMPFS=y +# CONFIG_HUGETLBFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +# CONFIG_USB is not set +# CONFIG_USB_GADGET is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_SH_STANDARD_BIOS is not set +# CONFIG_KGDB is not set +# CONFIG_FRAME_POINTER is not set + +# +# Security options +# +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_CRC32=y +CONFIG_ZLIB_INFLATE=y diff -puN /dev/null arch/sh/drivers/dma/dma-api.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/dma/dma-api.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,193 @@ +/* + * arch/sh/drivers/dma/dma-api.c + * + * SuperH-specific DMA management API + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include + +struct dma_info dma_info[MAX_DMA_CHANNELS] = { { 0, } }; +spinlock_t dma_spin_lock = SPIN_LOCK_UNLOCKED; + +/* + * A brief note about the reasons for this API as it stands. + * + * For starters, the old ISA DMA API didn't work for us for a number of + * reasons, for one, the vast majority of channels on the SH DMAC are + * dual-address mode only, and both the new and the old DMA APIs are after the + * concept of managing a DMA buffer, which doesn't overly fit this model very + * well. In addition to which, the new API is largely geared at IOMMUs and + * GARTs, and doesn't even support the channel notion very well. + * + * The other thing that's a marginal issue, is the sheer number of random DMA + * engines that are present (ie, in boards like the Dreamcast), some of which + * cascade off of the SH DMAC, and others do not. As such, there was a real + * need for a scalable subsystem that could deal with both single and + * dual-address mode usage, in addition to interoperating with cascaded DMACs. + * + * There really isn't any reason why this needs to be SH specific, though I'm + * not aware of too many other processors (with the exception of some MIPS) + * that have the same concept of a dual address mode, or any real desire to + * actually make use of the DMAC even if such a subsystem were exposed + * elsewhere. + * + * The idea for this was derived from the ARM port, which acted as an excellent + * reference when trying to address these issues. + * + * It should also be noted that the decision to add Yet Another DMA API(tm) to + * the kernel wasn't made easily, and was only decided upon after conferring + * with jejb with regards to the state of the old and new APIs as they applied + * to these circumstances. Philip Blundell was also a great help in figuring + * out some single-address mode DMA semantics that were otherwise rather + * confusing. + */ + +struct dma_info *get_dma_info(unsigned int chan) +{ + return dma_info + chan; +} + +int get_dma_residue(unsigned int chan) +{ + struct dma_info *info = get_dma_info(chan); + + if (info->ops->get_residue) + return info->ops->get_residue(info); + + return 0; +} + +int request_dma(unsigned int chan, const char *dev_id) +{ + struct dma_info *info = get_dma_info(chan); + + down(&info->sem); + + if (!info->ops || chan >= MAX_DMA_CHANNELS) { + up(&info->sem); + return -EINVAL; + } + + atomic_set(&info->busy, 1); + + info->dev_id = dev_id; + + up(&info->sem); + + if (info->ops->request) + return info->ops->request(info); + + return 0; +} + +void free_dma(unsigned int chan) +{ + struct dma_info *info = get_dma_info(chan); + + if (info->ops->free) + info->ops->free(info); + + atomic_set(&info->busy, 0); +} + +void dma_wait_for_completion(unsigned int chan) +{ + struct dma_info *info = get_dma_info(chan); + + while (info->ops->get_residue(info)) + cpu_relax(); +} + +void dma_configure_channel(unsigned int chan, unsigned long flags) +{ + struct dma_info *info = get_dma_info(chan); + + if (info->ops->configure) + info->ops->configure(info, flags); +} + +int dma_xfer(unsigned int chan, unsigned long from, + unsigned long to, size_t size, unsigned int mode) +{ + struct dma_info *info = get_dma_info(chan); + + info->sar = from; + info->dar = to; + info->count = size; + info->mode = mode; + + return info->ops->xfer(info); +} + +#ifdef CONFIG_PROC_FS +static int dma_read_proc(char *buf, char **start, off_t off, + int len, int *eof, void *data) +{ + struct dma_info *info; + char *p = buf; + int i; + + for (i = 0, info = dma_info; i < MAX_DMA_CHANNELS; i++, info++) { + if (!atomic_read(&info->busy)) + continue; + + p += sprintf(p, "%2d: %14s %s\n", i, + info->ops->name, info->dev_id); + } + + return p - buf; +} +#endif + +int __init register_dmac(struct dma_ops *ops) +{ + int i; + + printk("DMA: Registering %s handler.\n", ops->name); + + for (i = 0; i < MAX_DMA_CHANNELS; i++) { + struct dma_info *info = get_dma_info(i); + + info->chan = i; + + init_MUTEX(&info->sem); + } + + return 0; +} + +static int __init dma_api_init(void) +{ + printk("DMA: Registering DMA API.\n"); + +#ifdef CONFIG_PROC_FS + create_proc_read_entry("dma", 0, 0, dma_read_proc, 0); +#endif + + return 0; +} + +subsys_initcall(dma_api_init); + +MODULE_AUTHOR("Paul Mundt "); +MODULE_DESCRIPTION("DMA API for SuperH"); +MODULE_LICENSE("GPL"); + +EXPORT_SYMBOL(request_dma); +EXPORT_SYMBOL(free_dma); +EXPORT_SYMBOL(get_dma_residue); +EXPORT_SYMBOL(get_dma_info); +EXPORT_SYMBOL(dma_xfer); +EXPORT_SYMBOL(dma_wait_for_completion); +EXPORT_SYMBOL(dma_configure_channel); + diff -puN /dev/null arch/sh/drivers/dma/dma-g2.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/dma/dma-g2.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,173 @@ +/* + * arch/sh/drivers/dma/dma-g2.c + * + * G2 bus DMA support + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +#include +#include +#include + +struct g2_channel { + unsigned long g2_addr; /* G2 bus address */ + unsigned long root_addr; /* Root bus (SH-4) address */ + unsigned long size; /* Size (in bytes), 32-byte aligned */ + unsigned long direction; /* Transfer direction */ + unsigned long ctrl; /* Transfer control */ + unsigned long chan_enable; /* Channel enable */ + unsigned long xfer_enable; /* Transfer enable */ + unsigned long xfer_stat; /* Transfer status */ +} __attribute__ ((aligned(32))); + +struct g2_status { + unsigned long g2_addr; + unsigned long root_addr; + unsigned long size; + unsigned long status; +} __attribute__ ((aligned(16))); + +struct g2_dma_info { + struct g2_channel channel[G2_NR_DMA_CHANNELS]; + unsigned long pad1[G2_NR_DMA_CHANNELS]; + unsigned long wait_state; + unsigned long pad2[10]; + unsigned long magic; + struct g2_status status[G2_NR_DMA_CHANNELS]; +} __attribute__ ((aligned(256))); + +static volatile struct g2_dma_info *g2_dma = (volatile struct g2_dma_info *)0xa05f7800; + +static irqreturn_t g2_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + /* FIXME: Do some meaningful completion work here.. */ + return IRQ_HANDLED; +} + +static struct irqaction g2_dma_irq = { + .name = "g2 DMA handler", + .handler = g2_dma_interrupt, + .flags = SA_INTERRUPT, +}; + +static int g2_enable_dma(struct dma_info *info) +{ + unsigned int chan = info->chan; + + g2_dma->channel[chan].chan_enable = 1; + g2_dma->channel[chan].xfer_enable = 1; + + return 0; +} + +static int g2_disable_dma(struct dma_info *info) +{ + unsigned int chan = info->chan; + + g2_dma->channel[chan].chan_enable = 0; + g2_dma->channel[chan].xfer_enable = 0; + + return 0; +} + +static int g2_xfer_dma(struct dma_info *info) +{ + unsigned int chan = info->chan; + + if (info->sar & 31) { + printk("g2dma: unaligned source 0x%lx\n", info->sar); + return -EINVAL; + } + + if (info->dar & 31) { + printk("g2dma: unaligned dest 0x%lx\n", info->dar); + return -EINVAL; + } + + /* Align the count */ + if (info->count & 31) + info->count = (info->count + (32 - 1)) & ~(32 - 1); + + /* Fixup destination */ + info->dar += 0xa0800000; + + /* Fixup direction */ + info->mode = !info->mode; + + flush_icache_range((unsigned long)info->sar, info->count); + + g2_disable_dma(info); + + g2_dma->channel[chan].g2_addr = info->dar & 0x1fffffe0; + g2_dma->channel[chan].root_addr = info->sar & 0x1fffffe0; + g2_dma->channel[chan].size = (info->count & ~31) | 0x80000000; + g2_dma->channel[chan].direction = info->mode; + + /* + * bit 0 - ??? + * bit 1 - if set, generate a hardware event on transfer completion + * bit 2 - ??? something to do with suspend? + */ + g2_dma->channel[chan].ctrl = 5; /* ?? */ + + g2_enable_dma(info); + + /* debug cruft */ + pr_debug("count, sar, dar, mode, ctrl, chan, xfer: %ld, 0x%08lx, " + "0x%08lx, %ld, %ld, %ld, %ld\n", + g2_dma->channel[chan].size, + g2_dma->channel[chan].root_addr, + g2_dma->channel[chan].g2_addr, + g2_dma->channel[chan].direction, + g2_dma->channel[chan].ctrl, + g2_dma->channel[chan].chan_enable, + g2_dma->channel[chan].xfer_enable); + + return 0; +} + +static struct dma_ops g2_dma_ops = { + .name = "G2 DMA", + .xfer = g2_xfer_dma, +}; + +static int __init g2_dma_init(void) +{ + int i, base; + + setup_irq(HW_EVENT_G2_DMA, &g2_dma_irq); + + /* Magic */ + g2_dma->wait_state = 27; + g2_dma->magic = 0x4659404f; + + /* G2 channels come after on-chip and pvr2 */ + base = ONCHIP_NR_DMA_CHANNELS + PVR2_NR_DMA_CHANNELS; + + for (i = 0; i < G2_NR_DMA_CHANNELS; i++) + dma_info[base + i].ops = &g2_dma_ops; + + return register_dmac(&g2_dma_ops); +} + +static void __exit g2_dma_exit(void) +{ + free_irq(HW_EVENT_G2_DMA, 0); +} + +subsys_initcall(g2_dma_init); +module_exit(g2_dma_exit); + +MODULE_AUTHOR("Paul Mundt "); +MODULE_DESCRIPTION("G2 bus DMA driver"); +MODULE_LICENSE("GPL"); + diff -puN /dev/null arch/sh/drivers/dma/dma-isa.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/dma/dma-isa.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,93 @@ +/* + * arch/sh/drivers/dma/dma-isa.c + * + * Generic ISA DMA wrapper for SH DMA API + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include + +/* + * This implements a small wrapper set to make code using the old ISA DMA API + * work with the SH DMA API. Since most of the work in the new API happens + * at ops->xfer() time, we simply use the various set_dma_xxx() routines to + * fill in per-channel info, and then hand hand this off to ops->xfer() at + * enable_dma() time. + * + * For channels that are doing on-demand data transfer via cascading, the + * channel itself will still need to be configured through the new API. As + * such, this code is meant for only the simplest of tasks (and shouldn't be + * used in any new drivers at all). + * + * It should also be noted that various functions here are labelled as + * being deprecated. This is due to the fact that the ops->xfer() method is + * the preferred way of doing things (as well as just grabbing the spinlock + * directly). As such, any users of this interface will be warned rather + * loudly. + */ + +unsigned long __deprecated claim_dma_lock(void) +{ + unsigned long flags; + + spin_lock_irqsave(&dma_spin_lock, flags); + + return flags; +} + +void __deprecated release_dma_lock(unsigned long flags) +{ + spin_unlock_irqrestore(&dma_spin_lock, flags); +} + +void __deprecated disable_dma(unsigned int chan) +{ + /* Nothing */ +} + +void __deprecated enable_dma(unsigned int chan) +{ + struct dma_info *info = get_dma_info(chan); + + info->ops->xfer(info); +} + +void clear_dma_ff(unsigned int chan) +{ + /* Nothing */ +} + +void set_dma_mode(unsigned int chan, char mode) +{ + struct dma_info *info = get_dma_info(chan); + + info->mode = mode; +} + +void set_dma_addr(unsigned int chan, unsigned int addr) +{ + struct dma_info *info = get_dma_info(chan); + + /* + * Single address mode is the only thing supported through + * this interface. + */ + if ((info->mode & DMA_MODE_MASK) == DMA_MODE_READ) { + info->sar = addr; + } else { + info->dar = addr; + } +} + +void set_dma_count(unsigned int chan, unsigned int count) +{ + struct dma_info *info = get_dma_info(chan); + + info->count = count; +} + diff -puN /dev/null arch/sh/drivers/dma/dma-pvr2.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/dma/dma-pvr2.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,111 @@ +/* + * arch/sh/boards/dreamcast/dma-pvr2.c + * + * NEC PowerVR 2 (Dreamcast) DMA support + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +static unsigned int xfer_complete = 0; +static int count = 0; + +static irqreturn_t pvr2_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + if (get_dma_residue(PVR2_CASCADE_CHAN)) { + printk(KERN_WARNING "DMA: SH DMAC did not complete transfer " + "on channel %d, waiting..\n", PVR2_CASCADE_CHAN); + dma_wait_for_completion(PVR2_CASCADE_CHAN); + } + + if (count++ < 10) + pr_debug("Got a pvr2 dma interrupt for channel %d\n", + irq - HW_EVENT_PVR2_DMA); + + xfer_complete = 1; + + return IRQ_HANDLED; +} + +static int pvr2_request_dma(struct dma_info *info) +{ + if (ctrl_inl(PVR2_DMA_MODE) != 0) + return -EBUSY; + + ctrl_outl(0, PVR2_DMA_LMMODE0); + + return 0; +} + +static int pvr2_get_dma_residue(struct dma_info *info) +{ + return xfer_complete == 0; +} + +static int pvr2_xfer_dma(struct dma_info *info) +{ + if (info->sar || !info->dar) + return -EINVAL; + + xfer_complete = 0; + + ctrl_outl(info->dar, PVR2_DMA_ADDR); + ctrl_outl(info->count, PVR2_DMA_COUNT); + ctrl_outl(info->mode & DMA_MODE_MASK, PVR2_DMA_MODE); + + return 0; +} + +static struct irqaction pvr2_dma_irq = { + .name = "pvr2 DMA handler", + .handler = pvr2_dma_interrupt, + .flags = SA_INTERRUPT, +}; + +static struct dma_ops pvr2_dma_ops = { + .name = "PowerVR 2 DMA", + .request = pvr2_request_dma, + .get_residue = pvr2_get_dma_residue, + .xfer = pvr2_xfer_dma, +}; + +static int __init pvr2_dma_init(void) +{ + int i, base; + + setup_irq(HW_EVENT_PVR2_DMA, &pvr2_dma_irq); + request_dma(PVR2_CASCADE_CHAN, "pvr2 cascade"); + + /* PVR2 cascade comes after on-chip DMAC */ + base = ONCHIP_NR_DMA_CHANNELS; + + for (i = 0; i < PVR2_NR_DMA_CHANNELS; i++) + dma_info[base + i].ops = &pvr2_dma_ops; + + return register_dmac(&pvr2_dma_ops); +} + +static void __exit pvr2_dma_exit(void) +{ + free_dma(PVR2_CASCADE_CHAN); + free_irq(HW_EVENT_PVR2_DMA, 0); +} + +subsys_initcall(pvr2_dma_init); +module_exit(pvr2_dma_exit); + +MODULE_AUTHOR("Paul Mundt "); +MODULE_DESCRIPTION("NEC PowerVR 2 DMA driver"); +MODULE_LICENSE("GPL"); + diff -puN /dev/null arch/sh/drivers/dma/dma-sh.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/dma/dma-sh.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,271 @@ +/* + * arch/sh/kernel/cpu/dma.c + * + * Copyright (C) 2000 Takashi YOSHII + * Copyright (C) 2003 Paul Mundt + * + * PC like DMA API for SuperH's DMAC. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "dma-sh.h" + +/* + * The SuperH DMAC supports a number of transmit sizes, we list them here, + * with their respective values as they appear in the CHCR registers. + * + * Defaults to a 64-bit transfer size. + */ +enum { + XMIT_SZ_64BIT = 0, + XMIT_SZ_8BIT = 1, + XMIT_SZ_16BIT = 2, + XMIT_SZ_32BIT = 3, + XMIT_SZ_256BIT = 4, +}; + +/* + * The DMA count is defined as the number of bytes to transfer. + */ +static unsigned int ts_shift[] = { + [XMIT_SZ_64BIT] 3, + [XMIT_SZ_8BIT] 0, + [XMIT_SZ_16BIT] 1, + [XMIT_SZ_32BIT] 2, + [XMIT_SZ_256BIT] 5, +}; + +struct sh_dmac_channel { + unsigned long sar; + unsigned long dar; + unsigned long dmatcr; + unsigned long chcr; +} __attribute__ ((aligned(16))); + +struct sh_dmac_info { + struct sh_dmac_channel channel[MAX_DMAC_CHANNELS]; + unsigned long dmaor; +} __attribute__ ((packed)); + +static volatile struct sh_dmac_info *sh_dmac = (volatile struct sh_dmac_info *)SH_DMAC_BASE; + +static inline unsigned int get_dmte_irq(unsigned int chan) +{ + unsigned int irq; + + /* + * Normally we could just do DMTE0_IRQ + chan outright, though in the + * case of the 7751R, the DMTE IRQs for channels > 4 start right above + * the SCIF + */ + + if (chan < 4) { + irq = DMTE0_IRQ + chan; + } else { + irq = DMTE4_IRQ + chan; + } + + return irq; +} + +static inline int get_dmte_chan(unsigned int irq) +{ + int chan; + + if ((irq - DMTE4_IRQ) < 0) { + chan = irq - DMTE0_IRQ; + } else { + chan = irq - DMTE4_IRQ + 4; + } + + return chan; +} + +/* + * We determine the correct shift size based off of the CHCR transmit size + * for the given channel. Since we know that it will take: + * + * info->count >> ts_shift[transmit_size] + * + * iterations to complete the transfer. + */ +static inline unsigned int calc_xmit_shift(struct dma_info *info) +{ + return ts_shift[(sh_dmac->channel[info->chan].chcr >> 4) & 0x0007]; +} + +static irqreturn_t dma_tei(int irq, void *dev_id, struct pt_regs *regs) +{ + + int chan = get_dmte_chan(irq); + struct dma_info *info = get_dma_info(chan); + + if (info->sar) + sh_dmac->channel[info->chan].sar = info->sar; + if (info->dar) + sh_dmac->channel[info->chan].sar = info->dar; + + sh_dmac->channel[info->chan].dmatcr = info->count >> calc_xmit_shift(info); + sh_dmac->channel[info->chan].chcr &= ~CHCR_TE; + + disable_irq(irq); + + return IRQ_HANDLED; +} + +static struct irqaction irq_tei = { + .name = "DMAC Transfer End", + .handler = dma_tei, + .flags = SA_INTERRUPT, +}; + +static int sh_dmac_request_dma(struct dma_info *info) +{ + int irq = get_dmte_irq(info->chan); + char *p = (char *)((&irq_tei)->name); + + sprintf(p, "%s (Channel %d)", p, info->chan); + + make_ipr_irq(irq, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY); + + return setup_irq(irq, &irq_tei); +} + +static void sh_dmac_free_dma(struct dma_info *info) +{ + free_irq(get_dmte_irq(info->chan), 0); +} + +static void sh_dmac_configure_channel(struct dma_info *info, unsigned long chcr) +{ + if (!chcr) { + chcr = sh_dmac->channel[info->chan].chcr; + chcr |= /* CHCR_IE | */ RS_DUAL; + } + + sh_dmac->channel[info->chan].chcr = chcr; + + info->configured = 1; +} + +static void sh_dmac_enable_dma(struct dma_info *info) +{ + sh_dmac->channel[info->chan].chcr |= CHCR_DE; +} + +static void sh_dmac_disable_dma(struct dma_info *info) +{ + sh_dmac->channel[info->chan].chcr &= ~(CHCR_DE | CHCR_TE); +} + +static int sh_dmac_xfer_dma(struct dma_info *info) +{ + /* + * If we haven't pre-configured the channel with special flags, use + * the defaults. + */ + if (!info->configured) + sh_dmac_configure_channel(info, 0); + + sh_dmac_disable_dma(info); + + /* + * Single-address mode usage note! + * + * It's important that we don't accidentally write any value to SAR/DAR + * (this includes 0) that hasn't been directly specified by the user if + * we're in single-address mode. + * + * In this case, only one address can be defined, anything else will + * result in a DMA address error interrupt (at least on the SH-4), + * which will subsequently halt the transfer. + */ + if (info->sar) + sh_dmac->channel[info->chan].sar = info->sar; + if (info->dar) + sh_dmac->channel[info->chan].dar = info->dar; + + sh_dmac->channel[info->chan].dmatcr = info->count >> calc_xmit_shift(info); + + sh_dmac_enable_dma(info); + + return 0; +} + +static int sh_dmac_get_dma_residue(struct dma_info *info) +{ + return sh_dmac->channel[info->chan].dmatcr << calc_xmit_shift(info); +} + +#if defined(CONFIG_CPU_SH4) +static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs) +{ + printk("DMAE: DMAOR=%lx\n", sh_dmac->dmaor); + + sh_dmac->dmaor &= ~(DMAOR_NMIF | DMAOR_AE); + sh_dmac->dmaor |= DMAOR_DME; + + disable_irq(irq); + + return IRQ_HANDLED; +} + +static struct irqaction irq_err = { + .name = "DMAC Address Error", + .handler = dma_err, + .flags = SA_INTERRUPT, +}; +#endif + +static struct dma_ops sh_dmac_ops = { + .name = "SuperH DMAC", + .request = sh_dmac_request_dma, + .free = sh_dmac_free_dma, + .get_residue = sh_dmac_get_dma_residue, + .xfer = sh_dmac_xfer_dma, + .configure = sh_dmac_configure_channel, +}; + +static int __init sh_dmac_init(void) +{ + int i; + +#ifdef CONFIG_CPU_SH4 + make_ipr_irq(DMAE_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY); + setup_irq(DMAE_IRQ, &irq_err); +#endif + + /* Kick the DMAOR */ + sh_dmac->dmaor |= DMAOR_DME /* | 0x200 */ | 0x8000; /* DDT = 1, PR1 = 1, DME = 1 */ + sh_dmac->dmaor &= ~(DMAOR_NMIF | DMAOR_AE); + + for (i = 0; i < MAX_DMAC_CHANNELS; i++) + dma_info[i].ops = &sh_dmac_ops; + + return register_dmac(&sh_dmac_ops); +} + +static void __exit sh_dmac_exit(void) +{ +#ifdef CONFIG_CPU_SH4 + free_irq(DMAE_IRQ, 0); +#endif +} + +subsys_initcall(sh_dmac_init); +module_exit(sh_dmac_exit); + +MODULE_LICENSE("GPL"); + diff -puN /dev/null arch/sh/drivers/dma/dma-sh.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/dma/dma-sh.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,48 @@ +/* + * arch/sh/drivers/dma/dma-sh.h + * + * Copyright (C) 2000 Takashi YOSHII + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __DMA_SH_H +#define __DMA_SH_H + +/* Definitions for the SuperH DMAC */ +#define REQ_L 0x00000000 +#define REQ_E 0x00080000 +#define RACK_H 0x00000000 +#define RACK_L 0x00040000 +#define ACK_R 0x00000000 +#define ACK_W 0x00020000 +#define ACK_H 0x00000000 +#define ACK_L 0x00010000 +#define DM_INC 0x00004000 +#define DM_DEC 0x00008000 +#define SM_INC 0x00001000 +#define SM_DEC 0x00002000 +#define RS_DUAL 0x00000000 +#define RS_IN 0x00000200 +#define RS_OUT 0x00000300 +#define TM_BURST 0x0000080 +#define TS_8 0x00000010 +#define TS_16 0x00000020 +#define TS_32 0x00000030 +#define TS_64 0x00000000 +#define TS_BLK 0x00000040 +#define CHCR_DE 0x00000001 +#define CHCR_TE 0x00000002 +#define CHCR_IE 0x00000004 + +#define DMAOR_COD 0x00000008 +#define DMAOR_AE 0x00000004 +#define DMAOR_NMIF 0x00000002 +#define DMAOR_DME 0x00000001 + +#define MAX_DMAC_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS) + +#endif /* __DMA_SH_H */ + diff -puN /dev/null arch/sh/drivers/dma/Kconfig --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/dma/Kconfig 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,42 @@ +config SH_DMA + bool "DMA controller (DMAC) support" + help + Selecting this option will provide same API as PC's Direct Memory + Access Controller(8237A) for SuperH DMAC. + + If unsure, say N. + +config NR_ONCHIP_DMA_CHANNELS + depends on SH_DMA + int "Number of on-chip DMAC channels" + default "4" + help + This allows you to specify the number of channels that the on-chip + DMAC supports. This will be 4 for SH7750/SH7751 and 8 for the + SH7750R/SH7751R. + +config NR_DMA_CHANNELS_BOOL + depends on SH_DMA + bool "Override default number of maximum DMA channels" + help + This allows you to forcibly update the maximum number of supported + DMA channels for a given board. If this is unset, this will default + to the number of channels that the on-chip DMAC has. + +config NR_DMA_CHANNELS + int "Maximum number of DMA channels" + depends on SH_DMA && NR_DMA_CHANNELS_BOOL + default NR_ONCHIP_DMA_CHANNELS + help + This allows you to specify the maximum number of DMA channels to + support. Setting this to a higher value allows for cascading DMACs + with additional channels. + +config DMA_PAGE_OPS + bool "Use DMAC for page copy/clear" + depends on SH_DMA + help + Selecting this option will use a dual-address mode configured channel + in the SH DMAC for copy_page()/clear_page(). Primarily a performance + hack. + diff -puN /dev/null arch/sh/drivers/dma/Makefile --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/dma/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,8 @@ +# +# Makefile for the SuperH DMA specific kernel interface routines under Linux. +# + +obj-y += dma-api.o dma-isa.o +obj-$(CONFIG_SH_DMA) += dma-sh.o +obj-$(CONFIG_SH_DREAMCAST) += dma-pvr2.o dma-g2.o + diff -puN /dev/null arch/sh/drivers/Makefile --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,7 @@ +# +# Makefile for the Linux SuperH-specific device drivers. +# + +obj-$(CONFIG_PCI) += pci/ +obj-$(CONFIG_SH_DMA) += dma/ + diff -puN /dev/null arch/sh/drivers/pci/dma-dreamcast.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/pci/dma-dreamcast.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,61 @@ +/* + * arch/sh/pci/dma-dreamcast.c + * + * PCI DMA support for the Sega Dreamcast + * + * Copyright (C) 2001, 2002 M. R. Brown + * Copyright (C) 2002, 2003 Paul Mundt + * + * This file originally bore the message (with enclosed-$): + * Id: pci.c,v 1.3 2003/05/04 19:29:46 lethal Exp + * Dreamcast PCI: Supports SEGA Broadband Adaptor only. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +static int gapspci_dma_used = 0; + +void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, + dma_addr_t * dma_handle) +{ + unsigned long buf; + + if (gapspci_dma_used+size > GAPSPCI_DMA_SIZE) + return NULL; + + buf = GAPSPCI_DMA_BASE+gapspci_dma_used; + + gapspci_dma_used = PAGE_ALIGN(gapspci_dma_used+size); + + *dma_handle = (dma_addr_t)buf; + + buf = P2SEGADDR(buf); + + /* Flush the dcache before we hand off the buffer */ + dma_cache_wback_inv((void *)buf, size); + + return (void *)buf; +} + +void pci_free_consistent(struct pci_dev *hwdev, size_t size, + void *vaddr, dma_addr_t dma_handle) +{ + /* XXX */ + gapspci_dma_used = 0; +} + diff -puN /dev/null arch/sh/drivers/pci/fixups-dreamcast.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/pci/fixups-dreamcast.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,85 @@ +/* + * arch/sh/pci/fixups-dreamcast.c + * + * PCI fixups for the Sega Dreamcast + * + * Copyright (C) 2001, 2002 M. R. Brown + * Copyright (C) 2002, 2003 Paul Mundt + * + * This file originally bore the message (with enclosed-$): + * Id: pci.c,v 1.3 2003/05/04 19:29:46 lethal Exp + * Dreamcast PCI: Supports SEGA Broadband Adaptor only. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +static void __init gapspci_fixup_resources(struct pci_dev *dev) +{ + struct pci_channel *p = board_pci_channels; + + printk(KERN_NOTICE "PCI: Fixing up device %s\n", pci_name(dev)); + + switch (dev->device) { + case PCI_DEVICE_ID_SEGA_BBA: + /* + * We also assume that dev->devfn == 0 + */ + dev->resource[1].start = p->io_resource->start + 0x100; + dev->resource[1].end = dev->resource[1].start + 0x200 - 1; + break; + default: + printk("PCI: Failed resource fixup\n"); + } +} + +struct pci_fixup pcibios_fixups[] = { + { PCI_FIXUP_HEADER, PCI_ANY_ID, + PCI_ANY_ID, gapspci_fixup_resources }, + { 0, } +}; + +void __init pcibios_fixup_bus(struct pci_bus *bus) +{ + /* + * We don't have any sub bus to fix up, and this is a rather + * stupid place to put general device fixups. Don't do it. + * Use the pcibios_fixups table or suffer the consequences. + */ +} + +void __init pcibios_fixup_irqs(void) +{ + struct pci_dev *dev = 0; + + while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { + /* + * The interrupt routing semantics here are quite trivial. + * + * We basically only support one interrupt, so we only bother + * updating a device's interrupt line with this single shared + * interrupt. Keeps routing quite simple, doesn't it? + */ + printk(KERN_NOTICE "PCI: Fixing up IRQ routing for device %s\n", + pci_name(dev)); + + dev->irq = GAPSPCI_IRQ; + + pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); + } +} + diff -puN /dev/null arch/sh/drivers/pci/Kconfig --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/pci/Kconfig 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,46 @@ +config PCI + bool "PCI support" + help + Find out whether you have a PCI motherboard. PCI is the name of a + bus system, i.e. the way the CPU talks to the other stuff inside + your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or + VESA. If you have PCI, say Y, otherwise N. + + The PCI-HOWTO, available from + , contains valuable + information about which PCI hardware does work under Linux and which + doesn't. + +config SH_PCIDMA_NONCOHERENT + bool "Cache and PCI noncoherent" + depends on PCI + help + Enable this option if your platform does not have a CPU cache which + remains coherent with PCI DMA. It is safest to say 'Y', although you + will see better performance if you can say 'N', because the PCI DMA + code will not have to flush the CPU's caches. If you have a PCI host + bridge integrated with your SH CPU, refer carefully to the chip specs + to see if you can say 'N' here. Otherwise, leave it as 'Y'. + +# This is also board-specific +config PCI_AUTO + bool + depends on PCI + default y + +config PCI_AUTO_UPDATE_RESOURCES + bool + depends on PCI_AUTO + default y if !SH_DREAMCAST + help + Selecting this option will cause the PCI auto code to leave your + BAR values alone. Otherwise they will be updated automatically. If + for some reason, you have a board that simply refuses to work + with its resources updated beyond what they are when the device + is powered up, set this to N. Everyone else will want this as Y. + +config PCI_DMA + bool + depends on PCI + default y if !SH_DREAMCAST + diff -puN /dev/null arch/sh/drivers/pci/Makefile --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/pci/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,16 @@ +# +# Makefile for the PCI specific kernel interface routines under Linux. +# + +obj-y += pci.o +obj-$(CONFIG_PCI_AUTO) += pci-auto.o +obj-$(CONFIG_PCI_DMA) += pci-dma.o + +obj-$(CONFIG_CPU_SUBTYPE_ST40STB1) += pci-st40.o +obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o + +obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ + dma-dreamcast.o +obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o +obj-$(CONFIG_SH_BIGSUR) += ops-bigsur.o + diff -puN /dev/null arch/sh/drivers/pci/ops-bigsur.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/pci/ops-bigsur.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,88 @@ +/* + * linux/arch/sh/kernel/pci-bigsur.c + * + * By Dustin McIntire (dustin@sensoria.com) (c)2001 + * + * Ported to new API by Paul Mundt . + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * PCI initialization for the Hitachi Big Sur Evaluation Board + */ + +#include +#include +#include +#include +#include +#include + +#include +#include "pci-sh7751.h" +#include + +#define BIGSUR_PCI_IO 0x4000 +#define BIGSUR_PCI_MEM 0xfd000000 + +static struct resource sh7751_io_resource = { + .name = "SH7751 IO", + .start = BIGSUR_PCI_IO, + .end = BIGSUR_PCI_IO + (64*1024) - 1, + .flags = IORESOURCE_IO, +}; + +static struct resource sh7751_mem_resource = { + .name = "SH7751 mem", + .start = BIGSUR_PCI_MEM, + .end = BIGSUR_PCI_MEM + (64*1024*1024) - 1, + .flags = IORESOURCE_MEM, +}; + +extern struct pci_ops sh7751_pci_ops; + +struct pci_channel board_pci_channels[] = { + { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, + { 0, } +}; + +static struct sh7751_pci_address_map sh7751_pci_map = { + .window0 = { + .base = SH7751_CS3_BASE_ADDR, + .size = BIGSUR_LSR0_SIZE, + }, + + .window1 = { + .base = SH7751_CS3_BASE_ADDR, + .size = BIGSUR_LSR1_SIZE, + }, +}; + +/* + * Initialize the Big Sur PCI interface + * Setup hardware to be Central Funtion + * Copy the BSR regs to the PCI interface + * Setup PCI windows into local RAM + */ +int __init pcibios_init_platform(void) +{ + return sh7751_pcic_init(&sh7751_pci_map); +} + +int pcibios_map_platform_irq(u8 slot, u8 pin) +{ + /* + * The Big Sur can be used in a CPCI chassis, but the SH7751 PCI + * interface is on the wrong end of the board so that it can also + * support a V320 CPI interface chip... Therefor the IRQ mapping is + * somewhat use dependent... I'l assume a linear map for now, i.e. + * INTA=slot0,pin0... INTD=slot3,pin0... + */ + int irq = (slot + pin-1) % 4 + BIGSUR_SH7751_PCI_IRQ_BASE; + + PCIDBG(2, "PCI: Mapping Big Sur IRQ for slot %d, pin %c to irq %d\n", + slot, pin-1+'A', irq); + + return irq; +} + diff -puN /dev/null arch/sh/drivers/pci/ops-dreamcast.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/pci/ops-dreamcast.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,169 @@ +/* + * arch/sh/pci/ops-dreamcast.c + * + * PCI operations for the Sega Dreamcast + * + * Copyright (C) 2001, 2002 M. R. Brown + * Copyright (C) 2002, 2003 Paul Mundt + * + * This file originally bore the message (with enclosed-$): + * Id: pci.c,v 1.3 2003/05/04 19:29:46 lethal Exp + * Dreamcast PCI: Supports SEGA Broadband Adaptor only. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +static struct resource gapspci_io_resource = { + .name = "GAPSPCI IO", + .start = GAPSPCI_BBA_CONFIG, + .end = GAPSPCI_BBA_CONFIG + GAPSPCI_BBA_CONFIG_SIZE - 1, + .flags = IORESOURCE_IO, +}; + +static struct resource gapspci_mem_resource = { + .name = "GAPSPCI mem", + .start = GAPSPCI_DMA_BASE, + .end = GAPSPCI_DMA_BASE + GAPSPCI_DMA_SIZE - 1, + .flags = IORESOURCE_MEM, +}; + +static struct pci_ops gapspci_pci_ops; + +struct pci_channel board_pci_channels[] = { + { &gapspci_pci_ops, &gapspci_io_resource, + &gapspci_mem_resource, 0, 1 }, + { 0, } +}; + +/* + * The !gapspci_config_access case really shouldn't happen, ever, unless + * someone implicitly messes around with the last devfn value.. otherwise we + * only support a single device anyways, and if we didn't have a BBA, we + * wouldn't make it terribly far through the PCI setup anyways. + * + * Also, we could very easily support both Type 0 and Type 1 configurations + * here, but since it doesn't seem that there is any such implementation in + * existance, we don't bother. + * + * I suppose if someone actually gets around to ripping the chip out of + * the BBA and hanging some more devices off of it, then this might be + * something to take into consideration. However, due to the cost of the BBA, + * and the general lack of activity by DC hardware hackers, this doesn't seem + * likely to happen anytime soon. + */ +static int gapspci_config_access(unsigned char bus, unsigned int devfn) +{ + return (bus == 0) && (devfn == 0); +} + +/* + * We can also actually read and write in b/w/l sizes! Thankfully this part + * was at least done right, and we don't have to do the stupid masking and + * shifting that we do on the 7751! Small wonders never cease to amaze. + */ +static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) +{ + *val = 0xffffffff; + + if (!gapspci_config_access(bus->number, devfn)) + return PCIBIOS_DEVICE_NOT_FOUND; + + switch (size) { + case 1: *val = inb(GAPSPCI_BBA_CONFIG+where); break; + case 2: *val = inw(GAPSPCI_BBA_CONFIG+where); break; + case 4: *val = inl(GAPSPCI_BBA_CONFIG+where); break; + } + + return PCIBIOS_SUCCESSFUL; +} + +static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) +{ + if (!gapspci_config_access(bus->number, devfn)) + return PCIBIOS_DEVICE_NOT_FOUND; + + switch (size) { + case 1: outb(( u8)val, GAPSPCI_BBA_CONFIG+where); break; + case 2: outw((u16)val, GAPSPCI_BBA_CONFIG+where); break; + case 4: outl((u32)val, GAPSPCI_BBA_CONFIG+where); break; + } + + return PCIBIOS_SUCCESSFUL; +} + +static struct pci_ops gapspci_pci_ops = { + .read = gapspci_read, + .write = gapspci_write, +}; + +/* + * gapspci init + */ + +int __init gapspci_init(void) +{ + char idbuf[16]; + int i; + + /* + * FIXME: All of this wants documenting to some degree, + * even some basic register definitions would be nice. + * + * I haven't seen anything this ugly since.. maple. + */ + + for (i=0; i<16; i++) + idbuf[i] = inb(GAPSPCI_REGS+i); + + if (strncmp(idbuf, "GAPSPCI_BRIDGE_2", 16)) + return -ENODEV; + + outl(0x5a14a501, GAPSPCI_REGS+0x18); + + for (i=0; i<1000000; i++) + ; + + if (inl(GAPSPCI_REGS+0x18) != 1) + return -EINVAL; + + outl(0x01000000, GAPSPCI_REGS+0x20); + outl(0x01000000, GAPSPCI_REGS+0x24); + + outl(GAPSPCI_DMA_BASE, GAPSPCI_REGS+0x28); + outl(GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE, GAPSPCI_REGS+0x2c); + + outl(1, GAPSPCI_REGS+0x14); + outl(1, GAPSPCI_REGS+0x34); + + /* Setting Broadband Adapter */ + outw(0xf900, GAPSPCI_BBA_CONFIG+0x06); + outl(0x00000000, GAPSPCI_BBA_CONFIG+0x30); + outb(0x00, GAPSPCI_BBA_CONFIG+0x3c); + outb(0xf0, GAPSPCI_BBA_CONFIG+0x0d); + outw(0x0006, GAPSPCI_BBA_CONFIG+0x04); + outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10); + outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14); + + return 0; +} + +/* Haven't done anything here as yet */ +char * __devinit pcibios_setup(char *str) +{ + return str; +} diff -puN /dev/null arch/sh/drivers/pci/ops-snapgear.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/pci/ops-snapgear.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,100 @@ +/* + * arch/sh/drivers/pci/ops-snapgear.c + * + * Author: David McCullough + * + * Ported to new API by Paul Mundt + * + * Highly leveraged from pci-bigsur.c, written by Dustin McIntire. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * PCI initialization for the SnapGear boards + */ + +#include +#include +#include +#include +#include +#include + +#include +#include "pci-sh7751.h" + +#define SNAPGEAR_PCI_IO 0x4000 +#define SNAPGEAR_PCI_MEM 0xfd000000 + +/* PCI: default LOCAL memory window sizes (seen from PCI bus) */ +#define SNAPGEAR_LSR0_SIZE (64*(1<<20)) //64MB +#define SNAPGEAR_LSR1_SIZE (64*(1<<20)) //64MB + +static struct resource sh7751_io_resource = { + .name = "SH7751 IO", + .start = SNAPGEAR_PCI_IO, + .end = SNAPGEAR_PCI_IO + (64*1024) - 1, /* 64KiB I/O */ + .flags = IORESOURCE_IO, +}; + +static struct resource sh7751_mem_resource = { + .name = "SH7751 mem", + .start = SNAPGEAR_PCI_MEM, + .end = SNAPGEAR_PCI_MEM + (64*1024*1024) - 1, /* 64MiB mem */ + .flags = IORESOURCE_MEM, +}; + +extern struct pci_ops sh7751_pci_ops; + +struct pci_channel board_pci_channels[] = { + { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, + { 0, } +}; + +static struct sh7751_pci_address_map sh7751_pci_map = { + .window0 = { + .base = SH7751_CS2_BASE_ADDR, + .size = SNAPGEAR_LSR0_SIZE, + }, + + .window1 = { + .base = SH7751_CS2_BASE_ADDR, + .size = SNAPGEAR_LSR1_SIZE, + }, +}; + +/* + * Initialize the SnapGear PCI interface + * Setup hardware to be Central Funtion + * Copy the BSR regs to the PCI interface + * Setup PCI windows into local RAM + */ +int __init pcibios_init_platform(void) +{ + return sh7751_pcic_init(&sh7751_pci_map); +} + +int __init pcibios_map_platform_irq(u8 slot, u8 pin) +{ + int irq = -1; + + switch (slot) { + case 8: /* the PCI bridge */ break; + case 11: irq = 8; break; /* USB */ + case 12: irq = 11; break; /* PCMCIA */ + case 13: irq = 5; break; /* eth0 */ + case 14: irq = 8; break; /* eth1 */ + case 15: irq = 11; break; /* safenet (unused) */ + } + + printk("PCI: Mapping SnapGear IRQ for slot %d, pin %c to irq %d\n", + slot, pin - 1 + 'A', irq); + + return irq; +} + +void __init pcibios_fixup(void) +{ + /* Nothing to fixup .. */ +} + diff -puN /dev/null arch/sh/drivers/pci/pci-auto.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/pci/pci-auto.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,534 @@ +/* + * PCI autoconfiguration library + * + * Author: Matt Porter + * + * Copyright 2000, 2001 MontaVista Software Inc. + * Copyright 2001 Bradley D. LaRonde + * Copyright 2003 Paul Mundt + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/* + * Modified for MIPS by Jun Sun, jsun@mvista.com + * + * . Simplify the interface between pci_auto and the rest: a single function. + * . Assign resources from low address to upper address. + * . change most int to u32. + * + * Further modified to include it as mips generic code, ppopov@mvista.com. + * + * 2001-10-26 Bradley D. LaRonde + * - Add a top_bus argument to the "early config" functions so that + * they can set a fake parent bus pointer to convince the underlying + * pci ops to use type 1 configuration for sub busses. + * - Set bridge base and limit registers correctly. + * - Align io and memory base properly before and after bridge setup. + * - Don't fall through to pci_setup_bars for bridge. + * - Reformat the debug output to look more like lspci's output. + * + * Cloned for SuperH by M. R. Brown, mrbrown@0xd6.org + * + * 2003-08-05 Paul Mundt + * - Don't update the BAR values on systems that already have valid addresses + * and don't want these updated for whatever reason, by way of a new config + * option check. However, we still read in the old BAR values so that they + * can still be reported through the debug output. + */ + +#include +#include +#include +#include + +#define DEBUG +#ifdef DEBUG +#define DBG(x...) printk(x) +#else +#define DBG(x...) +#endif + +/* + * These functions are used early on before PCI scanning is done + * and all of the pci_dev and pci_bus structures have been created. + */ +static struct pci_dev *fake_pci_dev(struct pci_channel *hose, + int top_bus, int busnr, int devfn) +{ + static struct pci_dev dev; + static struct pci_bus bus; + + dev.bus = &bus; + dev.sysdata = hose; + dev.devfn = devfn; + bus.number = busnr; + bus.ops = hose->pci_ops; + + if(busnr != top_bus) + /* Fake a parent bus structure. */ + bus.parent = &bus; + else + bus.parent = NULL; + + return &dev; +} + +#define EARLY_PCI_OP(rw, size, type) \ +int early_##rw##_config_##size(struct pci_channel *hose, \ + int top_bus, int bus, int devfn, int offset, type value) \ +{ \ + return pci_##rw##_config_##size( \ + fake_pci_dev(hose, top_bus, bus, devfn), \ + offset, value); \ +} + +EARLY_PCI_OP(read, byte, u8 *) +EARLY_PCI_OP(read, word, u16 *) +EARLY_PCI_OP(read, dword, u32 *) +EARLY_PCI_OP(write, byte, u8) +EARLY_PCI_OP(write, word, u16) +EARLY_PCI_OP(write, dword, u32) + +static struct resource *io_resource_inuse; +static struct resource *mem_resource_inuse; + +static u32 pciauto_lower_iospc; +static u32 pciauto_upper_iospc; + +static u32 pciauto_lower_memspc; +static u32 pciauto_upper_memspc; + +static void __init +pciauto_setup_bars(struct pci_channel *hose, + int top_bus, + int current_bus, + int pci_devfn) +{ + u32 bar_response, bar_size, bar_value; + u32 bar, addr_mask, bar_nr = 0; + u32 * upper_limit; + u32 * lower_limit; + int found_mem64 = 0; + + for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar+=4) { + u32 bar_addr; + + /* Read the old BAR value */ + early_read_config_dword(hose, top_bus, + current_bus, + pci_devfn, + bar, + &bar_addr); + + /* Tickle the BAR and get the response */ + early_write_config_dword(hose, top_bus, + current_bus, + pci_devfn, + bar, + 0xffffffff); + + early_read_config_dword(hose, top_bus, + current_bus, + pci_devfn, + bar, + &bar_response); + + /* + * Write the old BAR value back out, only update the BAR + * if we implicitly want resources to be updated, which + * is done by the generic code further down. -- PFM. + */ + early_write_config_dword(hose, top_bus, + current_bus, + pci_devfn, + bar, + bar_addr); + + /* If BAR is not implemented go to the next BAR */ + if (!bar_response) + continue; + + /* + * Workaround for a BAR that doesn't use its upper word, + * like the ALi 1535D+ PCI DC-97 Controller Modem (M5457). + * bdl + */ + if (!(bar_response & 0xffff0000)) + bar_response |= 0xffff0000; + +retry: + /* Check the BAR type and set our address mask */ + if (bar_response & PCI_BASE_ADDRESS_SPACE) { + addr_mask = PCI_BASE_ADDRESS_IO_MASK; + upper_limit = &pciauto_upper_iospc; + lower_limit = &pciauto_lower_iospc; + DBG(" I/O"); + } else { + if ((bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == + PCI_BASE_ADDRESS_MEM_TYPE_64) + found_mem64 = 1; + + addr_mask = PCI_BASE_ADDRESS_MEM_MASK; + upper_limit = &pciauto_upper_memspc; + lower_limit = &pciauto_lower_memspc; + DBG(" Mem"); + } + + + /* Calculate requested size */ + bar_size = ~(bar_response & addr_mask) + 1; + + /* Allocate a base address */ + bar_value = ((*lower_limit - 1) & ~(bar_size - 1)) + bar_size; + + if ((bar_value + bar_size) > *upper_limit) { + if (bar_response & PCI_BASE_ADDRESS_SPACE) { + if (io_resource_inuse->child) { + io_resource_inuse = + io_resource_inuse->child; + pciauto_lower_iospc = + io_resource_inuse->start; + pciauto_upper_iospc = + io_resource_inuse->end + 1; + goto retry; + } + + } else { + if (mem_resource_inuse->child) { + mem_resource_inuse = + mem_resource_inuse->child; + pciauto_lower_memspc = + mem_resource_inuse->start; + pciauto_upper_memspc = + mem_resource_inuse->end + 1; + goto retry; + } + } + DBG(" unavailable -- skipping, value %x size %x\n", + bar_value, bar_size); + continue; + } + +#ifdef CONFIG_PCI_AUTO_UPDATE_RESOURCES + /* Write it out and update our limit */ + early_write_config_dword(hose, top_bus, current_bus, pci_devfn, + bar, bar_value); +#endif + + *lower_limit = bar_value + bar_size; + + /* + * If we are a 64-bit decoder then increment to the + * upper 32 bits of the bar and force it to locate + * in the lower 4GB of memory. + */ + if (found_mem64) { + bar += 4; + early_write_config_dword(hose, top_bus, + current_bus, + pci_devfn, + bar, + 0x00000000); + } + + DBG(" at 0x%.8x [size=0x%x]\n", bar_value, bar_size); + + bar_nr++; + } + +} + +static void __init +pciauto_prescan_setup_bridge(struct pci_channel *hose, + int top_bus, + int current_bus, + int pci_devfn, + int sub_bus) +{ + /* Configure bus number registers */ + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_PRIMARY_BUS, current_bus); + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_SECONDARY_BUS, sub_bus + 1); + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_SUBORDINATE_BUS, 0xff); + + /* Align memory and I/O to 1MB and 4KB boundaries. */ + pciauto_lower_memspc = (pciauto_lower_memspc + (0x100000 - 1)) + & ~(0x100000 - 1); + pciauto_lower_iospc = (pciauto_lower_iospc + (0x1000 - 1)) + & ~(0x1000 - 1); + + /* Set base (lower limit) of address range behind bridge. */ + early_write_config_word(hose, top_bus, current_bus, pci_devfn, + PCI_MEMORY_BASE, pciauto_lower_memspc >> 16); + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_IO_BASE, (pciauto_lower_iospc & 0x0000f000) >> 8); + early_write_config_word(hose, top_bus, current_bus, pci_devfn, + PCI_IO_BASE_UPPER16, pciauto_lower_iospc >> 16); + + /* We don't support prefetchable memory for now, so disable */ + early_write_config_word(hose, top_bus, current_bus, pci_devfn, + PCI_PREF_MEMORY_BASE, 0); + early_write_config_word(hose, top_bus, current_bus, pci_devfn, + PCI_PREF_MEMORY_LIMIT, 0); +} + +static void __init +pciauto_postscan_setup_bridge(struct pci_channel *hose, + int top_bus, + int current_bus, + int pci_devfn, + int sub_bus) +{ + u32 temp; + + pciauto_lower_memspc += 1; + pciauto_lower_iospc += 1; + + /* Configure bus number registers */ + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_SUBORDINATE_BUS, sub_bus); + + /* Set upper limit of address range behind bridge. */ + early_write_config_word(hose, top_bus, current_bus, pci_devfn, + PCI_MEMORY_LIMIT, pciauto_lower_memspc >> 16); + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_IO_LIMIT, (pciauto_lower_iospc & 0x0000f000) >> 8); + early_write_config_word(hose, top_bus, current_bus, pci_devfn, + PCI_IO_LIMIT_UPPER16, pciauto_lower_iospc >> 16); + + /* Align memory and I/O to 1MB and 4KB boundaries. */ + pciauto_lower_memspc = (pciauto_lower_memspc + (0x100000 - 1)) + & ~(0x100000 - 1); + pciauto_lower_iospc = (pciauto_lower_iospc + (0x1000 - 1)) + & ~(0x1000 - 1); + + /* Enable memory and I/O accesses, enable bus master */ + early_read_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_COMMAND, &temp); + early_write_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_COMMAND, temp | PCI_COMMAND_IO | PCI_COMMAND_MEMORY + | PCI_COMMAND_MASTER); +} + +static void __init +pciauto_prescan_setup_cardbus_bridge(struct pci_channel *hose, + int top_bus, + int current_bus, + int pci_devfn, + int sub_bus) +{ + /* Configure bus number registers */ + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_PRIMARY_BUS, current_bus); + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_SECONDARY_BUS, sub_bus + 1); + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_SUBORDINATE_BUS, 0xff); + + /* Align memory and I/O to 4KB and 4 byte boundaries. */ + pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1)) + & ~(0x1000 - 1); + pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1)) + & ~(0x4 - 1); + + early_write_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_CB_MEMORY_BASE_0, pciauto_lower_memspc); + early_write_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_CB_IO_BASE_0, pciauto_lower_iospc); +} + +static void __init +pciauto_postscan_setup_cardbus_bridge(struct pci_channel *hose, + int top_bus, + int current_bus, + int pci_devfn, + int sub_bus) +{ + u32 temp; + + /* + * [jsun] we always bump up baselines a little, so that if there + * nothing behind P2P bridge, we don't wind up overlapping IO/MEM + * spaces. + */ + pciauto_lower_memspc += 1; + pciauto_lower_iospc += 1; + + /* + * Configure subordinate bus number. The PCI subsystem + * bus scan will renumber buses (reserving three additional + * for this PCI<->CardBus bridge for the case where a CardBus + * adapter contains a P2P or CB2CB bridge. + */ + + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_SUBORDINATE_BUS, sub_bus); + + /* + * Reserve an additional 4MB for mem space and 16KB for + * I/O space. This should cover any additional space + * requirement of unusual CardBus devices with + * additional bridges that can consume more address space. + * + * Although pcmcia-cs currently will reprogram bridge + * windows, the goal is to add an option to leave them + * alone and use the bridge window ranges as the regions + * that are searched for free resources upon hot-insertion + * of a device. This will allow a PCI<->CardBus bridge + * configured by this routine to happily live behind a + * P2P bridge in a system. + */ + + /* Align memory and I/O to 4KB and 4 byte boundaries. */ + pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1)) + & ~(0x1000 - 1); + pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1)) + & ~(0x4 - 1); + /* Set up memory and I/O filter limits, assume 32-bit I/O space */ + early_write_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_CB_MEMORY_LIMIT_0, pciauto_lower_memspc - 1); + early_write_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_CB_IO_LIMIT_0, pciauto_lower_iospc - 1); + + /* Enable memory and I/O accesses, enable bus master */ + early_read_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_COMMAND, &temp); + early_write_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_COMMAND, temp | PCI_COMMAND_IO | PCI_COMMAND_MEMORY + | PCI_COMMAND_MASTER); +} + +#define PCIAUTO_IDE_MODE_MASK 0x05 + +static int __init +pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus) +{ + int sub_bus; + u32 pci_devfn, pci_class, cmdstat, found_multi=0; + unsigned short vid, did; + unsigned char header_type; + int devfn_start = 0; + int devfn_stop = 0xff; + + sub_bus = current_bus; + + if (hose->first_devfn) + devfn_start = hose->first_devfn; + if (hose->last_devfn) + devfn_stop = hose->last_devfn; + + for (pci_devfn=devfn_start; pci_devfn> 16, vid, did); + if (pci_class & 0xff) + DBG(" (rev %.2x)", pci_class & 0xff); + DBG("\n"); + + if ((pci_class >> 16) == PCI_CLASS_BRIDGE_PCI) { + DBG(" Bridge: primary=%.2x, secondary=%.2x\n", + current_bus, sub_bus + 1); + pciauto_prescan_setup_bridge(hose, top_bus, current_bus, + pci_devfn, sub_bus); + DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n", + sub_bus + 1, + pciauto_lower_iospc, pciauto_lower_memspc); + sub_bus = pciauto_bus_scan(hose, top_bus, sub_bus+1); + DBG("Back to bus %.2x\n", current_bus); + pciauto_postscan_setup_bridge(hose, top_bus, current_bus, + pci_devfn, sub_bus); + continue; + } else if ((pci_class >> 16) == PCI_CLASS_BRIDGE_CARDBUS) { + DBG(" CARDBUS Bridge: primary=%.2x, secondary=%.2x\n", + current_bus, sub_bus + 1); + DBG("PCI Autoconfig: Found CardBus bridge, device %d function %d\n", PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn)); + /* Place CardBus Socket/ExCA registers */ + pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn); + + pciauto_prescan_setup_cardbus_bridge(hose, top_bus, + current_bus, pci_devfn, sub_bus); + + DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n", + sub_bus + 1, + pciauto_lower_iospc, pciauto_lower_memspc); + sub_bus = pciauto_bus_scan(hose, top_bus, sub_bus+1); + DBG("Back to bus %.2x, sub_bus is %x\n", current_bus, sub_bus); + pciauto_postscan_setup_cardbus_bridge(hose, top_bus, + current_bus, pci_devfn, sub_bus); + continue; + } else if ((pci_class >> 16) == PCI_CLASS_STORAGE_IDE) { + + unsigned char prg_iface; + + early_read_config_byte(hose, top_bus, current_bus, + pci_devfn, PCI_CLASS_PROG, &prg_iface); + if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) { + DBG("Skipping legacy mode IDE controller\n"); + continue; + } + } + + /* + * Found a peripheral, enable some standard + * settings + */ + early_read_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_COMMAND, &cmdstat); + early_write_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_COMMAND, cmdstat | PCI_COMMAND_IO | + PCI_COMMAND_MEMORY | + PCI_COMMAND_MASTER); + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_LATENCY_TIMER, 0x80); + + /* Allocate PCI I/O and/or memory space */ + pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn); + } + return sub_bus; +} + +int __init +pciauto_assign_resources(int busno, struct pci_channel *hose) +{ + /* setup resource limits */ + io_resource_inuse = hose->io_resource; + mem_resource_inuse = hose->mem_resource; + + pciauto_lower_iospc = io_resource_inuse->start; + pciauto_upper_iospc = io_resource_inuse->end + 1; + pciauto_lower_memspc = mem_resource_inuse->start; + pciauto_upper_memspc = mem_resource_inuse->end + 1; + DBG("Autoconfig PCI channel 0x%p\n", hose); + DBG("Scanning bus %.2x, I/O 0x%.8x:0x%.8x, Mem 0x%.8x:0x%.8x\n", + busno, pciauto_lower_iospc, pciauto_upper_iospc, + pciauto_lower_memspc, pciauto_upper_memspc); + + return pciauto_bus_scan(hose, busno, busno); +} diff -puN /dev/null arch/sh/drivers/pci/pci.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/pci/pci.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,153 @@ +/* arch/sh/kernel/pci.c + * $Id: pci.c,v 1.1 2003/08/24 19:15:45 lethal Exp $ + * + * Copyright (c) 2002 M. R. Brown + * + * + * These functions are collected here to reduce duplication of common + * code amongst the many platform-specific PCI support code files. + * + * These routines require the following board-specific routines: + * void pcibios_fixup_irqs(); + * + * See include/asm-sh/pci.h for more information. + */ + +#include +#include +#include + +static int __init pcibios_init(void) +{ + struct pci_channel *p; + struct pci_bus *bus; + int busno; + +#ifdef CONFIG_PCI_AUTO + /* assign resources */ + busno=0; + for (p = board_pci_channels; p->pci_ops != NULL; p++) { + busno = pciauto_assign_resources(busno, p) + 1; + } +#endif + + /* scan the buses */ + busno = 0; + for (p= board_pci_channels; p->pci_ops != NULL; p++) { + bus = pci_scan_bus(busno, p->pci_ops, p); + busno = bus->subordinate+1; + } + + /* board-specific fixups */ + pcibios_fixup_irqs(); + + return 0; +} + +subsys_initcall(pcibios_init); + +void +pcibios_update_resource(struct pci_dev *dev, struct resource *root, + struct resource *res, int resource) +{ + u32 new, check; + int reg; + + new = res->start | (res->flags & PCI_REGION_FLAG_MASK); + if (resource < 6) { + reg = PCI_BASE_ADDRESS_0 + 4*resource; + } else if (resource == PCI_ROM_RESOURCE) { + res->flags |= PCI_ROM_ADDRESS_ENABLE; + new |= PCI_ROM_ADDRESS_ENABLE; + reg = dev->rom_base_reg; + } else { + /* Somebody might have asked allocation of a non-standard resource */ + return; + } + + pci_write_config_dword(dev, reg, new); + pci_read_config_dword(dev, reg, &check); + if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) { + printk(KERN_ERR "PCI: Error while updating region " + "%s/%d (%08x != %08x)\n", pci_name(dev), resource, + new, check); + } +} + +void pcibios_align_resource(void *data, struct resource *res, + unsigned long size, unsigned long align) + __attribute__ ((weak)); + +/* + * We need to avoid collisions with `mirrored' VGA ports + * and other strange ISA hardware, so we always want the + * addresses to be allocated in the 0x000-0x0ff region + * modulo 0x400. + */ +void pcibios_align_resource(void *data, struct resource *res, + unsigned long size, unsigned long align) +{ + if (res->flags & IORESOURCE_IO) { + unsigned long start = res->start; + + if (start & 0x300) { + start = (start + 0x3ff) & ~0x3ff; + res->start = start; + } + } +} + +int pcibios_enable_device(struct pci_dev *dev, int mask) +{ + u16 cmd, old_cmd; + int idx; + struct resource *r; + + pci_read_config_word(dev, PCI_COMMAND, &cmd); + old_cmd = cmd; + for(idx=0; idx<6; idx++) { + r = &dev->resource[idx]; + if (!r->start && r->end) { + printk(KERN_ERR "PCI: Device %s not available because " + "of resource collisions\n", pci_name(dev)); + return -EINVAL; + } + if (r->flags & IORESOURCE_IO) + cmd |= PCI_COMMAND_IO; + if (r->flags & IORESOURCE_MEM) + cmd |= PCI_COMMAND_MEMORY; + } + if (dev->resource[PCI_ROM_RESOURCE].start) + cmd |= PCI_COMMAND_MEMORY; + if (cmd != old_cmd) { + printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n", + pci_name(dev), old_cmd, cmd); + pci_write_config_word(dev, PCI_COMMAND, cmd); + } + return 0; +} + +/* + * If we set up a device for bus mastering, we need to check and set + * the latency timer as it may not be properly set. + */ +unsigned int pcibios_max_latency = 255; + +void pcibios_set_master(struct pci_dev *dev) +{ + u8 lat; + pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); + if (lat < 16) + lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency; + else if (lat > pcibios_max_latency) + lat = pcibios_max_latency; + else + return; + printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat); + pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); +} + +void __init pcibios_update_irq(struct pci_dev *dev, int irq) +{ + pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); +} diff -puN /dev/null arch/sh/drivers/pci/pci-dma.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/pci/pci-dma.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * Dynamic DMA mapping support. + */ + +#include +#include +#include +#include +#include +#include + + +void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, + dma_addr_t * dma_handle) +{ + void *ret; + int gfp = GFP_ATOMIC; + + ret = (void *) __get_free_pages(gfp, get_order(size)); + + if (ret != NULL) { + /* Is it necessary to do the memset? */ + memset(ret, 0, size); + *dma_handle = virt_to_phys(ret); + } + /* We must flush the cache before we pass it on to the device */ + dma_cache_wback_inv(ret, size); + return P2SEGADDR(ret); +} + +void pci_free_consistent(struct pci_dev *hwdev, size_t size, + void *vaddr, dma_addr_t dma_handle) +{ + unsigned long p1addr=P1SEGADDR((unsigned long)vaddr); + + free_pages(p1addr, get_order(size)); +} diff -puN /dev/null arch/sh/drivers/pci/pci-sh7751.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/pci/pci-sh7751.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,414 @@ +/* + * Low-Level PCI Support for the SH7751 + * + * Dustin McIntire (dustin@sensoria.com) + * Derived from arch/i386/kernel/pci-*.c which bore the message: + * (c) 1999--2000 Martin Mares + * + * Ported to the new API by Paul Mundt + * With cleanup by Paul van Gool + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + */ + +#undef DEBUG + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include "pci-sh7751.h" + +static unsigned int pci_probe = PCI_PROBE_CONF1; + +/* + * Direct access to PCI hardware... + */ + +#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3)) + +/* + * Functions for accessing PCI configuration space with type 1 accesses + */ +static int sh7751_pci_read(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 *val) +{ + unsigned long flags; + u32 data; + + /* + * PCIPDR may only be accessed as 32 bit words, + * so we must do byte alignment by hand + */ + local_irq_save(flags); + outl(CONFIG_CMD(bus,devfn,where), PCI_REG(SH7751_PCIPAR)); + data = inl(PCI_REG(SH7751_PCIPDR)); + local_irq_restore(flags); + + switch (size) { + case 1: + *val = (data >> ((where & 3) << 3)) & 0xff; + break; + case 2: + *val = (data >> ((where & 2) << 3)) & 0xffff; + break; + case 4: + *val = data; + break; + default: + return PCIBIOS_FUNC_NOT_SUPPORTED; + } + + return PCIBIOS_SUCCESSFUL; +} + +/* + * Since SH7751 only does 32bit access we'll have to do a read,mask,write operation. + * We'll allow an odd byte offset, though it should be illegal. + */ +static int sh7751_pci_write(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 val) +{ + unsigned long flags; + int shift; + u32 data; + + local_irq_save(flags); + outl(CONFIG_CMD(bus,devfn,where), PCI_REG(SH7751_PCIPAR)); + data = inl(PCI_REG(SH7751_PCIPDR)); + local_irq_restore(flags); + + switch (size) { + case 1: + shift = (where & 3) << 3; + data &= ~(0xff << shift); + data |= ((val & 0xff) << shift); + break; + case 2: + shift = (where & 2) << 3; + data &= ~(0xffff << shift); + data |= ((val & 0xffff) << shift); + break; + case 4: + data = val; + break; + default: + return PCIBIOS_FUNC_NOT_SUPPORTED; + } + + outl(data, PCI_REG(SH7751_PCIPDR)); + + return PCIBIOS_SUCCESSFUL; +} + +#undef CONFIG_CMD + +struct pci_ops sh7751_pci_ops = { + .read = sh7751_pci_read, + .write = sh7751_pci_write, +}; + +static int __init pci_check_direct(void) +{ + unsigned int tmp, id; + + /* check for SH7751/SH7751R hardware */ + id = inl(SH7751_PCIREG_BASE+SH7751_PCICONF0); + if (id != ((SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID) && + id != ((SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID)) { + pr_debug("PCI: This is not an SH7751(R) (%x)\n", id); + return -ENODEV; + } + + /* + * Check if configuration works. + */ + if (pci_probe & PCI_PROBE_CONF1) { + tmp = inl (PCI_REG(SH7751_PCIPAR)); + outl (0x80000000, PCI_REG(SH7751_PCIPAR)); + if (inl (PCI_REG(SH7751_PCIPAR)) == 0x80000000) { + outl (tmp, PCI_REG(SH7751_PCIPAR)); + printk(KERN_INFO "PCI: Using configuration type 1\n"); + request_region(PCI_REG(SH7751_PCIPAR), 8, "PCI conf1"); + return 0; + } + outl (tmp, PCI_REG(SH7751_PCIPAR)); + } + + pr_debug("PCI: pci_check_direct failed\n"); + return -EINVAL; +} + +/***************************************************************************************/ + +/* + * Handle bus scanning and fixups .... + */ + +static void __init pci_fixup_ide_bases(struct pci_dev *d) +{ + int i; + + /* + * PCI IDE controllers use non-standard I/O port decoding, respect it. + */ + if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) + return; + pr_debug("PCI: IDE base address fixup for %s\n", d->slot_name); + for(i=0; i<4; i++) { + struct resource *r = &d->resource[i]; + if ((r->start & ~0x80) == 0x374) { + r->start |= 2; + r->end = r->start; + } + } +} + + +/* Add future fixups here... */ +struct pci_fixup pcibios_fixups[] = { + { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases }, + { 0 } +}; + +/* + * Called after each bus is probed, but before its children + * are examined. + */ + +void __init pcibios_fixup_bus(struct pci_bus *b) +{ + pci_read_bridge_bases(b); +} + +/* + * Initialization. Try all known PCI access methods. Note that we support + * using both PCI BIOS and direct access: in such cases, we use I/O ports + * to access config space. + * + * Note that the platform specific initialization (BSC registers, and memory + * space mapping) will be called via the machine vectors (sh_mv.mv_pci_init()) if it + * exitst and via the platform defined function pcibios_init_platform(). + * See pci_bigsur.c for implementation; + * + * The BIOS version of the pci functions is not yet implemented but it is left + * in for completeness. Currently an error will be genereated at compile time. + */ + +static int __init sh7751_pci_init(void) +{ + int ret; + + pr_debug("PCI: Starting intialization.\n"); + if ((ret = pci_check_direct()) != 0) + return ret; + + return pcibios_init_platform(); +} + +subsys_initcall(sh7751_pci_init); + +static int __init __area_sdram_check(unsigned int area) +{ + u32 word; + + word = inl(SH7751_BCR1); + /* check BCR for SDRAM in area */ + if(((word >> area) & 1) == 0) { + printk("PCI: Area %d is not configured for SDRAM. BCR1=0x%x\n", + area, word); + return 0; + } + outl(word, PCI_REG(SH7751_PCIBCR1)); + + word = (u16)inw(SH7751_BCR2); + /* check BCR2 for 32bit SDRAM interface*/ + if(((word >> (area << 1)) & 0x3) != 0x3) { + printk("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%x\n", + area, word); + return 0; + } + outl(word, PCI_REG(SH7751_PCIBCR2)); + + return 1; +} + +int __init sh7751_pcic_init(struct sh7751_pci_address_map *map) +{ + u32 reg; + u32 word; + + /* Set the BCR's to enable PCI access */ + reg = inl(SH7751_BCR1); + reg |= 0x80000; + outl(reg, SH7751_BCR1); + + /* Turn the clocks back on (not done in reset)*/ + outl(0, PCI_REG(SH7751_PCICLKR)); + /* Clear Powerdown IRQ's (not done in reset) */ + word = SH7751_PCIPINT_D3 | SH7751_PCIPINT_D0; + outl(word, PCI_REG(SH7751_PCICLKR)); + + /* + * XXX: This code is unused for the SnapGear boards as it is done in + * the bootloader and doing it here means the MAC addresses loaded by + * the bootloader get lost. + */ +#ifndef CONFIG_SH_SECUREEDGE5410 + /* toggle PCI reset pin */ + word = SH7751_PCICR_PREFIX | SH7751_PCICR_PRST; + outl(word,PCI_REG(SH7751_PCICR)); + /* Wait for a long time... not 1 sec. but long enough */ + mdelay(100); + word = SH7751_PCICR_PREFIX; + outl(word,PCI_REG(SH7751_PCICR)); +#endif + + /* set the command/status bits to: + * Wait Cycle Control + Parity Enable + Bus Master + + * Mem space enable + */ + word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER | + SH7751_PCICONF1_BUM | SH7751_PCICONF1_MES; + outl(word, PCI_REG(SH7751_PCICONF1)); + + /* define this host as the host bridge */ + word = SH7751_PCI_HOST_BRIDGE << 24; + outl(word, PCI_REG(SH7751_PCICONF2)); + + /* Set IO and Mem windows to local address + * Make PCI and local address the same for easy 1 to 1 mapping + * Window0 = map->window0.size @ non-cached area base = SDRAM + * Window1 = map->window1.size @ cached area base = SDRAM + */ + word = map->window0.size - 1; + outl(word, PCI_REG(SH7751_PCILSR0)); + word = map->window1.size - 1; + outl(word, PCI_REG(SH7751_PCILSR1)); + /* Set the values on window 0 PCI config registers */ + word = P2SEGADDR(map->window0.base); + outl(word, PCI_REG(SH7751_PCILAR0)); + outl(word, PCI_REG(SH7751_PCICONF5)); + /* Set the values on window 1 PCI config registers */ + word = PHYSADDR(map->window1.base); + outl(word, PCI_REG(SH7751_PCILAR1)); + outl(word, PCI_REG(SH7751_PCICONF6)); + + /* Set the local 16MB PCI memory space window to + * the lowest PCI mapped address + */ + word = PCIBIOS_MIN_MEM & SH7751_PCIMBR_MASK; + PCIDBG(2,"PCI: Setting upper bits of Memory window to 0x%x\n", word); + outl(word , PCI_REG(SH7751_PCIMBR)); + + /* Map IO space into PCI IO window + * The IO window is 64K-PCIBIOS_MIN_IO in size + * IO addresses will be translated to the + * PCI IO window base address + */ + PCIDBG(3,"PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n", PCIBIOS_MIN_IO, + (64*1024), SH7751_PCI_IO_BASE+PCIBIOS_MIN_IO); + + /* + * XXX: For now, leave this board-specific. In the event we have other + * boards that need to do similar work, this can be wrapped. + */ +#ifdef CONFIG_SH_BIGSUR + bigsur_port_map(PCIBIOS_MIN_IO, (64*1024), SH7751_PCI_IO_BASE+PCIBIOS_MIN_IO,0); +#endif + + /* Make sure the MSB's of IO window are set to access PCI space correctly */ + word = PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK; + PCIDBG(2,"PCI: Setting upper bits of IO window to 0x%x\n", word); + outl(word, PCI_REG(SH7751_PCIIOBR)); + + /* Set PCI WCRx, BCRx's, copy from BSC locations */ + + /* check BCR for SDRAM in specified area */ + switch (map->window0.base) { + case SH7751_CS0_BASE_ADDR: word = __area_sdram_check(0); break; + case SH7751_CS1_BASE_ADDR: word = __area_sdram_check(1); break; + case SH7751_CS2_BASE_ADDR: word = __area_sdram_check(2); break; + case SH7751_CS3_BASE_ADDR: word = __area_sdram_check(3); break; + case SH7751_CS4_BASE_ADDR: word = __area_sdram_check(4); break; + case SH7751_CS5_BASE_ADDR: word = __area_sdram_check(5); break; + case SH7751_CS6_BASE_ADDR: word = __area_sdram_check(6); break; + } + + if (!word) + return 0; + + /* configure the wait control registers */ + word = inl(SH7751_WCR1); + outl(word, PCI_REG(SH7751_PCIWCR1)); + word = inl(SH7751_WCR2); + outl(word, PCI_REG(SH7751_PCIWCR2)); + word = inl(SH7751_WCR3); + outl(word, PCI_REG(SH7751_PCIWCR3)); + word = inl(SH7751_MCR); + outl(word, PCI_REG(SH7751_PCIMCR)); + + /* NOTE: I'm ignoring the PCI error IRQs for now.. + * TODO: add support for the internal error interrupts and + * DMA interrupts... + */ + + /* SH7751 init done, set central function init complete */ + /* use round robin mode to stop a device starving/overruning */ + word = SH7751_PCICR_PREFIX | SH7751_PCICR_CFIN | SH7751_PCICR_ARBM; + outl(word,PCI_REG(SH7751_PCICR)); + + return 1; +} + +char * __init pcibios_setup(char *str) +{ + if (!strcmp(str, "off")) { + pci_probe = 0; + return NULL; + } + + return str; +} + +/* + * IRQ functions + */ +static u8 __init sh7751_no_swizzle(struct pci_dev *dev, u8 *pin) +{ + /* no swizzling */ + return PCI_SLOT(dev->devfn); +} + +static int sh7751_pci_lookup_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + int irq = -1; + + /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */ + irq = pcibios_map_platform_irq(slot,pin); + if( irq < 0 ) { + pr_debug("PCI: Error mapping IRQ on device %s\n", dev->slot_name); + return irq; + } + + pr_debug("Setting IRQ for slot %s to %d\n", dev->slot_name, irq); + + return irq; +} + +void __init pcibios_fixup_irqs(void) +{ + pci_fixup_irqs(sh7751_no_swizzle, sh7751_pci_lookup_irq); +} + diff -puN /dev/null arch/sh/drivers/pci/pci-sh7751.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/pci/pci-sh7751.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,296 @@ +/* + * Low-Level PCI Support for SH7751 targets + * + * Dustin McIntire (dustin@sensoria.com) (c) 2001 + * Paul Mundt (lethal@linux-sh.org) (c) 2003 + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + */ + +#ifndef _PCI_SH7751_H_ +#define _PCI_SH7751_H_ + +#include + +/* set debug level 4=verbose...1=terse */ +//#define DEBUG_PCI 3 +#undef DEBUG_PCI + +#ifdef DEBUG_PCI +#define PCIDBG(n, x...) { if(DEBUG_PCI>=n) printk(x); } +#else +#define PCIDBG(n, x...) +#endif + +/* startup values */ +#define PCI_PROBE_BIOS 1 +#define PCI_PROBE_CONF1 2 +#define PCI_PROBE_CONF2 4 +#define PCI_NO_SORT 0x100 +#define PCI_BIOS_SORT 0x200 +#define PCI_NO_CHECKS 0x400 +#define PCI_ASSIGN_ROMS 0x1000 +#define PCI_BIOS_IRQ_SCAN 0x2000 + +/* Platform Specific Values */ +#define SH7751_VENDOR_ID 0x1054 +#define SH7751_DEVICE_ID 0x3505 +#define SH7751R_DEVICE_ID 0x350e + +/* SH7751 Specific Values */ +#define SH7751_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */ +#define SH7751_PCI_CONFIG_SIZE 0x1000000 /* Config space size */ +#define SH7751_PCI_MEMORY_BASE 0xFD000000 /* Memory space base addr */ +#define SH7751_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ +#define SH7751_PCI_IO_BASE 0xFE240000 /* IO space base address */ +#define SH7751_PCI_IO_SIZE 0x40000 /* Size of IO window */ + +#define SH7751_PCIREG_BASE 0xFE200000 /* PCI regs base address */ +#define PCI_REG(n) (SH7751_PCIREG_BASE+ n) + +#define SH7751_PCICONF0 0x0 /* PCI Config Reg 0 */ + #define SH7751_PCICONF0_DEVID 0xFFFF0000 /* Device ID */ + #define SH7751_PCICONF0_VNDID 0x0000FFFF /* Vendor ID */ +#define SH7751_PCICONF1 0x4 /* PCI Config Reg 1 */ + #define SH7751_PCICONF1_DPE 0x80000000 /* Data Parity Error */ + #define SH7751_PCICONF1_SSE 0x40000000 /* System Error Status */ + #define SH7751_PCICONF1_RMA 0x20000000 /* Master Abort */ + #define SH7751_PCICONF1_RTA 0x10000000 /* Target Abort Rx Status */ + #define SH7751_PCICONF1_STA 0x08000000 /* Target Abort Exec Status */ + #define SH7751_PCICONF1_DEV 0x06000000 /* Timing Status */ + #define SH7751_PCICONF1_DPD 0x01000000 /* Data Parity Status */ + #define SH7751_PCICONF1_FBBC 0x00800000 /* Back 2 Back Status */ + #define SH7751_PCICONF1_UDF 0x00400000 /* User Defined Status */ + #define SH7751_PCICONF1_66M 0x00200000 /* 66Mhz Operation Status */ + #define SH7751_PCICONF1_PM 0x00100000 /* Power Management Status */ + #define SH7751_PCICONF1_PBBE 0x00000200 /* Back 2 Back Control */ + #define SH7751_PCICONF1_SER 0x00000100 /* SERR Output Control */ + #define SH7751_PCICONF1_WCC 0x00000080 /* Wait Cycle Control */ + #define SH7751_PCICONF1_PER 0x00000040 /* Parity Error Response */ + #define SH7751_PCICONF1_VPS 0x00000020 /* VGA Pallet Snoop */ + #define SH7751_PCICONF1_MWIE 0x00000010 /* Memory Write+Invalidate */ + #define SH7751_PCICONF1_SPC 0x00000008 /* Special Cycle Control */ + #define SH7751_PCICONF1_BUM 0x00000004 /* Bus Master Control */ + #define SH7751_PCICONF1_MES 0x00000002 /* Memory Space Control */ + #define SH7751_PCICONF1_IOS 0x00000001 /* I/O Space Control */ +#define SH7751_PCICONF2 0x8 /* PCI Config Reg 2 */ + #define SH7751_PCICONF2_BCC 0xFF000000 /* Base Class Code */ + #define SH7751_PCICONF2_SCC 0x00FF0000 /* Sub-Class Code */ + #define SH7751_PCICONF2_RLPI 0x0000FF00 /* Programming Interface */ + #define SH7751_PCICONF2_REV 0x000000FF /* Revision ID */ +#define SH7751_PCICONF3 0xC /* PCI Config Reg 3 */ + #define SH7751_PCICONF3_BIST7 0x80000000 /* Bist Supported */ + #define SH7751_PCICONF3_BIST6 0x40000000 /* Bist Executing */ + #define SH7751_PCICONF3_BIST3_0 0x0F000000 /* Bist Passed */ + #define SH7751_PCICONF3_HD7 0x00800000 /* Single Funtion device */ + #define SH7751_PCICONF3_HD6_0 0x007F0000 /* Configuration Layout */ + #define SH7751_PCICONF3_LAT 0x0000FF00 /* Latency Timer */ + #define SH7751_PCICONF3_CLS 0x000000FF /* Cache Line Size */ +#define SH7751_PCICONF4 0x10 /* PCI Config Reg 4 */ + #define SH7751_PCICONF4_BASE 0xFFFFFFFC /* I/O Space Base Addr */ + #define SH7751_PCICONF4_ASI 0x00000001 /* Address Space Type */ +#define SH7751_PCICONF5 0x14 /* PCI Config Reg 5 */ + #define SH7751_PCICONF5_BASE 0xFFFFFFF0 /* Mem Space Base Addr */ + #define SH7751_PCICONF5_LAP 0x00000008 /* Prefetch Enabled */ + #define SH7751_PCICONF5_LAT 0x00000006 /* Local Memory type */ + #define SH7751_PCICONF5_ASI 0x00000001 /* Address Space Type */ +#define SH7751_PCICONF6 0x18 /* PCI Config Reg 6 */ + #define SH7751_PCICONF6_BASE 0xFFFFFFF0 /* Mem Space Base Addr */ + #define SH7751_PCICONF6_LAP 0x00000008 /* Prefetch Enabled */ + #define SH7751_PCICONF6_LAT 0x00000006 /* Local Memory type */ + #define SH7751_PCICONF6_ASI 0x00000001 /* Address Space Type */ +/* PCICONF7 - PCICONF10 are undefined */ +#define SH7751_PCICONF11 0x2C /* PCI Config Reg 11 */ + #define SH7751_PCICONF11_SSID 0xFFFF0000 /* Subsystem ID */ + #define SH7751_PCICONF11_SVID 0x0000FFFF /* Subsystem Vendor ID */ +/* PCICONF12 is undefined */ +#define SH7751_PCICONF13 0x34 /* PCI Config Reg 13 */ + #define SH7751_PCICONF13_CPTR 0x000000FF /* PM function pointer */ +/* PCICONF14 is undefined */ +#define SH7751_PCICONF15 0x3C /* PCI Config Reg 15 */ + #define SH7751_PCICONF15_IPIN 0x000000FF /* Interrupt Pin */ +#define SH7751_PCICONF16 0x40 /* PCI Config Reg 16 */ + #define SH7751_PCICONF16_PMES 0xF8000000 /* PME Support */ + #define SH7751_PCICONF16_D2S 0x04000000 /* D2 Support */ + #define SH7751_PCICONF16_D1S 0x02000000 /* D1 Support */ + #define SH7751_PCICONF16_DSI 0x00200000 /* Bit Device Init. */ + #define SH7751_PCICONF16_PMCK 0x00080000 /* Clock for PME req. */ + #define SH7751_PCICONF16_VER 0x00070000 /* PM Version */ + #define SH7751_PCICONF16_NIP 0x0000FF00 /* Next Item Pointer */ + #define SH7751_PCICONF16_CID 0x000000FF /* Capability Identifier */ +#define SH7751_PCICONF17 0x44 /* PCI Config Reg 17 */ + #define SH7751_PCICONF17_DATA 0xFF000000 /* Data field for PM */ + #define SH7751_PCICONF17_PMES 0x00800000 /* PME Status */ + #define SH7751_PCICONF17_DSCL 0x00600000 /* Data Scaling Value */ + #define SH7751_PCICONF17_DSEL 0x001E0000 /* Data Select */ + #define SH7751_PCICONF17_PMEN 0x00010000 /* PME Enable */ + #define SH7751_PCICONF17_PWST 0x00000003 /* Power State */ +/* SH7715 Internal PCI Registers */ +#define SH7751_PCICR 0x100 /* PCI Control Register */ + #define SH7751_PCICR_PREFIX 0xA5000000 /* CR prefix for write */ + #define SH7751_PCICR_TRSB 0x00000200 /* Target Read Single */ + #define SH7751_PCICR_BSWP 0x00000100 /* Target Byte Swap */ + #define SH7751_PCICR_PLUP 0x00000080 /* Enable PCI Pullup */ + #define SH7751_PCICR_ARBM 0x00000040 /* PCI Arbitration Mode */ + #define SH7751_PCICR_MD 0x00000030 /* MD9 and MD10 status */ + #define SH7751_PCICR_SERR 0x00000008 /* SERR output assert */ + #define SH7751_PCICR_INTA 0x00000004 /* INTA output assert */ + #define SH7751_PCICR_PRST 0x00000002 /* PCI Reset Assert */ + #define SH7751_PCICR_CFIN 0x00000001 /* Central Fun. Init Done */ +#define SH7751_PCILSR0 0x104 /* PCI Local Space Register0 */ +#define SH7751_PCILSR1 0x108 /* PCI Local Space Register1 */ +#define SH7751_PCILAR0 0x10C /* PCI Local Address Register1 */ +#define SH7751_PCILAR1 0x110 /* PCI Local Address Register1 */ +#define SH7751_PCIINT 0x114 /* PCI Interrupt Register */ + #define SH7751_PCIINT_MLCK 0x00008000 /* Master Lock Error */ + #define SH7751_PCIINT_TABT 0x00004000 /* Target Abort Error */ + #define SH7751_PCIINT_TRET 0x00000200 /* Target Retry Error */ + #define SH7751_PCIINT_MFDE 0x00000100 /* Master Func. Disable Error */ + #define SH7751_PCIINT_PRTY 0x00000080 /* Address Parity Error */ + #define SH7751_PCIINT_SERR 0x00000040 /* SERR Detection Error */ + #define SH7751_PCIINT_TWDP 0x00000020 /* Tgt. Write Parity Error */ + #define SH7751_PCIINT_TRDP 0x00000010 /* Tgt. Read Parity Error Det. */ + #define SH7751_PCIINT_MTABT 0x00000008 /* Master-Tgt. Abort Error */ + #define SH7751_PCIINT_MMABT 0x00000004 /* Master-Master Abort Error */ + #define SH7751_PCIINT_MWPD 0x00000002 /* Master Write PERR Detect */ + #define SH7751_PCIINT_MRPD 0x00000002 /* Master Read PERR Detect */ +#define SH7751_PCIINTM 0x118 /* PCI Interrupt Mask Register */ +#define SH7751_PCIALR 0x11C /* Error Address Register */ +#define SH7751_PCICLR 0x120 /* Error Command/Data Register */ + #define SH7751_PCICLR_MPIO 0x80000000 /* Error Command/Data Register */ + #define SH7751_PCICLR_MDMA0 0x40000000 /* DMA0 Transfer Error */ + #define SH7751_PCICLR_MDMA1 0x20000000 /* DMA1 Transfer Error */ + #define SH7751_PCICLR_MDMA2 0x10000000 /* DMA2 Transfer Error */ + #define SH7751_PCICLR_MDMA3 0x08000000 /* DMA3 Transfer Error */ + #define SH7751_PCICLR_TGT 0x04000000 /* Target Transfer Error */ + #define SH7751_PCICLR_CMDL 0x0000000F /* PCI Command at Error */ +#define SH7751_PCIAINT 0x130 /* Arbiter Interrupt Register */ + #define SH7751_PCIAINT_MBKN 0x00002000 /* Master Broken Interrupt */ + #define SH7751_PCIAINT_TBTO 0x00001000 /* Target Bus Time Out */ + #define SH7751_PCIAINT_MBTO 0x00001000 /* Master Bus Time Out */ + #define SH7751_PCIAINT_TABT 0x00000008 /* Target Abort */ + #define SH7751_PCIAINT_MABT 0x00000004 /* Master Abort */ + #define SH7751_PCIAINT_RDPE 0x00000002 /* Read Data Parity Error */ + #define SH7751_PCIAINT_WDPE 0x00000002 /* Write Data Parity Error */ +#define SH7751_PCIAINTM 0x134 /* Arbiter Int. Mask Register */ +#define SH7751_PCIBMLR 0x138 /* Error Bus Master Register */ + #define SH7751_PCIBMLR_REQ4 0x00000010 /* REQ4 bus master at error */ + #define SH7751_PCIBMLR_REQ3 0x00000008 /* REQ3 bus master at error */ + #define SH7751_PCIBMLR_REQ2 0x00000004 /* REQ2 bus master at error */ + #define SH7751_PCIBMLR_REQ1 0x00000002 /* REQ1 bus master at error */ + #define SH7751_PCIBMLR_REQ0 0x00000001 /* REQ0 bus master at error */ +#define SH7751_PCIDMABT 0x140 /* DMA Transfer Arb. Register */ + #define SH7751_PCIDMABT_RRBN 0x00000001 /* DMA Arbitor Round-Robin */ +#define SH7751_PCIDPA0 0x180 /* DMA0 Transfer Addr. Register */ +#define SH7751_PCIDLA0 0x184 /* DMA0 Local Addr. Register */ +#define SH7751_PCIDTC0 0x188 /* DMA0 Transfer Cnt. Register */ +#define SH7751_PCIDCR0 0x18C /* DMA0 Control Register */ + #define SH7751_PCIDCR_ALGN 0x00000600 /* DMA Alignment Mode */ + #define SH7751_PCIDCR_MAST 0x00000100 /* DMA Termination Type */ + #define SH7751_PCIDCR_INTM 0x00000080 /* DMA Interrupt Done Mask*/ + #define SH7751_PCIDCR_INTS 0x00000040 /* DMA Interrupt Done Status */ + #define SH7751_PCIDCR_LHLD 0x00000020 /* Local Address Control */ + #define SH7751_PCIDCR_PHLD 0x00000010 /* PCI Address Control*/ + #define SH7751_PCIDCR_IOSEL 0x00000008 /* PCI Address Space Type */ + #define SH7751_PCIDCR_DIR 0x00000004 /* DMA Transfer Direction */ + #define SH7751_PCIDCR_STOP 0x00000002 /* Force DMA Stop */ + #define SH7751_PCIDCR_STRT 0x00000001 /* DMA Start */ +#define SH7751_PCIDPA1 0x190 /* DMA1 Transfer Addr. Register */ +#define SH7751_PCIDLA1 0x194 /* DMA1 Local Addr. Register */ +#define SH7751_PCIDTC1 0x198 /* DMA1 Transfer Cnt. Register */ +#define SH7751_PCIDCR1 0x19C /* DMA1 Control Register */ +#define SH7751_PCIDPA2 0x1A0 /* DMA2 Transfer Addr. Register */ +#define SH7751_PCIDLA2 0x1A4 /* DMA2 Local Addr. Register */ +#define SH7751_PCIDTC2 0x1A8 /* DMA2 Transfer Cnt. Register */ +#define SH7751_PCIDCR2 0x1AC /* DMA2 Control Register */ +#define SH7751_PCIDPA3 0x1B0 /* DMA3 Transfer Addr. Register */ +#define SH7751_PCIDLA3 0x1B4 /* DMA3 Local Addr. Register */ +#define SH7751_PCIDTC3 0x1B8 /* DMA3 Transfer Cnt. Register */ +#define SH7751_PCIDCR3 0x1BC /* DMA3 Control Register */ +#define SH7751_PCIPAR 0x1C0 /* PIO Address Register */ + #define SH7751_PCIPAR_CFGEN 0x80000000 /* Configuration Enable */ + #define SH7751_PCIPAR_BUSNO 0x00FF0000 /* Config. Bus Number */ + #define SH7751_PCIPAR_DEVNO 0x0000FF00 /* Config. Device Number */ + #define SH7751_PCIPAR_REGAD 0x000000FC /* Register Address Number */ +#define SH7751_PCIMBR 0x1C4 /* Memory Base Address Register */ + #define SH7751_PCIMBR_MASK 0xFF000000 /* Memory Space Mask */ + #define SH7751_PCIMBR_LOCK 0x00000001 /* Lock Memory Space */ +#define SH7751_PCIIOBR 0x1C8 /* I/O Base Address Register */ + #define SH7751_PCIIOBR_MASK 0xFFFC0000 /* IO Space Mask */ + #define SH7751_PCIIOBR_LOCK 0x00000001 /* Lock IO Space */ +#define SH7751_PCIPINT 0x1CC /* Power Mgmnt Int. Register */ + #define SH7751_PCIPINT_D3 0x00000002 /* D3 Pwr Mgmt. Interrupt */ + #define SH7751_PCIPINT_D0 0x00000001 /* D0 Pwr Mgmt. Interrupt */ +#define SH7751_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */ +#define SH7751_PCICLKR 0x1D4 /* Clock Ctrl. Register */ + #define SH7751_PCICLKR_PCSTP 0x00000002 /* PCI Clock Stop */ + #define SH7751_PCICLKR_BCSTP 0x00000002 /* BCLK Clock Stop */ +/* For definitions of BCR, MCR see ... */ +#define SH7751_PCIBCR1 0x1E0 /* Memory BCR1 Register */ +#define SH7751_PCIBCR2 0x1E4 /* Memory BCR2 Register */ +#define SH7751_PCIWCR1 0x1E8 /* Wait Control 1 Register */ +#define SH7751_PCIWCR2 0x1EC /* Wait Control 2 Register */ +#define SH7751_PCIWCR3 0x1F0 /* Wait Control 3 Register */ +#define SH7751_PCIMCR 0x1F4 /* Memory Control Register */ +#define SH7751_PCIPCTR 0x200 /* Port Control Register */ + #define SH7751_PCIPCTR_P2EN 0x000400000 /* Port 2 Enable */ + #define SH7751_PCIPCTR_P1EN 0x000200000 /* Port 1 Enable */ + #define SH7751_PCIPCTR_P0EN 0x000100000 /* Port 0 Enable */ + #define SH7751_PCIPCTR_P2UP 0x000000020 /* Port2 Pull Up Enable */ + #define SH7751_PCIPCTR_P2IO 0x000000010 /* Port2 Output Enable */ + #define SH7751_PCIPCTR_P1UP 0x000000008 /* Port1 Pull Up Enable */ + #define SH7751_PCIPCTR_P1IO 0x000000004 /* Port1 Output Enable */ + #define SH7751_PCIPCTR_P0UP 0x000000002 /* Port0 Pull Up Enable */ + #define SH7751_PCIPCTR_P0IO 0x000000001 /* Port0 Output Enable */ +#define SH7751_PCIPDTR 0x204 /* Port Data Register */ + #define SH7751_PCIPDTR_PB5 0x000000020 /* Port 5 Enable */ + #define SH7751_PCIPDTR_PB4 0x000000010 /* Port 4 Enable */ + #define SH7751_PCIPDTR_PB3 0x000000008 /* Port 3 Enable */ + #define SH7751_PCIPDTR_PB2 0x000000004 /* Port 2 Enable */ + #define SH7751_PCIPDTR_PB1 0x000000002 /* Port 1 Enable */ + #define SH7751_PCIPDTR_PB0 0x000000001 /* Port 0 Enable */ +#define SH7751_PCIPDR 0x220 /* Port IO Data Register */ + +/* Memory Control Registers */ +#define SH7751_BCR1 0xFF800000 /* Memory BCR1 Register */ +#define SH7751_BCR2 0xFF800004 /* Memory BCR2 Register */ +#define SH7751_WCR1 0xFF800008 /* Wait Control 1 Register */ +#define SH7751_WCR2 0xFF80000C /* Wait Control 2 Register */ +#define SH7751_WCR3 0xFF800010 /* Wait Control 3 Register */ +#define SH7751_MCR 0xFF800014 /* Memory Control Register */ + +/* General Memory Config Addresses */ +#define SH7751_CS0_BASE_ADDR 0x0 +#define SH7751_MEM_REGION_SIZE 0x04000000 +#define SH7751_CS1_BASE_ADDR (SH7751_CS0_BASE_ADDR + SH7751_MEM_REGION_SIZE) +#define SH7751_CS2_BASE_ADDR (SH7751_CS1_BASE_ADDR + SH7751_MEM_REGION_SIZE) +#define SH7751_CS3_BASE_ADDR (SH7751_CS2_BASE_ADDR + SH7751_MEM_REGION_SIZE) +#define SH7751_CS4_BASE_ADDR (SH7751_CS3_BASE_ADDR + SH7751_MEM_REGION_SIZE) +#define SH7751_CS5_BASE_ADDR (SH7751_CS4_BASE_ADDR + SH7751_MEM_REGION_SIZE) +#define SH7751_CS6_BASE_ADDR (SH7751_CS5_BASE_ADDR + SH7751_MEM_REGION_SIZE) + +/* General PCI values */ +#define SH7751_PCI_HOST_BRIDGE 0x6 + +/* External functions defined per platform i.e. Big Sur, SE... (these could be routed + * through the machine vectors... */ +extern int pcibios_init_platform(void); +extern int pcibios_map_platform_irq(u8 slot, u8 pin); + +struct sh7751_pci_address_space { + unsigned long base; + unsigned long size; +}; + +struct sh7751_pci_address_map { + struct sh7751_pci_address_space window0; + struct sh7751_pci_address_space window1; +}; + +/* arch/sh/drivers/pci/pci-sh7751.c */ +extern int sh7751_pcic_init(struct sh7751_pci_address_map *map); + +#endif /* _PCI_SH7751_H_ */ + diff -puN /dev/null arch/sh/drivers/pci/pci-st40.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/pci/pci-st40.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,423 @@ +/* + * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * Support functions for the ST40 PCI hardware. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "pci-st40.h" + +/* This is in P2 of course */ +#define ST40PCI_BASE_ADDRESS (0xb0000000) +#define ST40PCI_MEM_ADDRESS (ST40PCI_BASE_ADDRESS+0x0) +#define ST40PCI_IO_ADDRESS (ST40PCI_BASE_ADDRESS+0x06000000) +#define ST40PCI_REG_ADDRESS (ST40PCI_BASE_ADDRESS+0x07000000) + +#define ST40PCI_REG(x) (ST40PCI_REG_ADDRESS+(ST40PCI_##x)) + +#define ST40PCI_WRITE(reg,val) writel((val),ST40PCI_REG(reg)) +#define ST40PCI_WRITE_SHORT(reg,val) writew((val),ST40PCI_REG(reg)) +#define ST40PCI_WRITE_BYTE(reg,val) writeb((val),ST40PCI_REG(reg)) + +#define ST40PCI_READ(reg) readl(ST40PCI_REG(reg)) +#define ST40PCI_READ_SHORT(reg) readw(ST40PCI_REG(reg)) +#define ST40PCI_READ_BYTE(reg) readb(ST40PCI_REG(reg)) + +#define ST40PCI_SERR_IRQ 64 +#define ST40PCI_SERR_INT_GROUP 0 +#define ST40PCI_SERR_INT_POS 0 +#define ST40PCI_SERR_INT_PRI 15 + +#define ST40PCI_ERR_IRQ 65 +#define ST40PCI_ERR_INT_GROUP 1 +#define ST40PCI_ERR_INT_POS 1 +#define ST40PCI_ERR_INT_PRI 14 + + +/* Macros to extract PLL params */ +#define PLL_MDIV(reg) ( ((unsigned)reg) & 0xff ) +#define PLL_NDIV(reg) ( (((unsigned)reg)>>8) & 0xff ) +#define PLL_PDIV(reg) ( (((unsigned)reg)>>16) & 0x3 ) +#define PLL_SETUP(reg) ( (((unsigned)reg)>>19) & 0x1ff ) + +/* Build up the appropriate settings */ +#define PLL_SET(mdiv,ndiv,pdiv,setup) \ +( ((mdiv)&0xff) | (((ndiv)&0xff)<<8) | (((pdiv)&3)<<16)| (((setup)&0x1ff)<<19)) + +#define PLLPCICR (0xbb040000+0x10) + +#define PLLPCICR_POWERON (1<<28) +#define PLLPCICR_OUT_EN (1<<29) +#define PLLPCICR_LOCKSELECT (1<<30) +#define PLLPCICR_LOCK (1<<31) + + +#define PLL_25MHZ 0x793c8512 +#define PLL_33MHZ PLL_SET(18,88,3,295) + + +static __init void SetPCIPLL(void) +{ + /* Stop the PLL */ + writel(0, PLLPCICR); + + /* Always run at 33Mhz. The PCI clock is totally async + * to the rest of the system + */ + writel(PLL_33MHZ | PLLPCICR_POWERON, PLLPCICR); + + printk("ST40PCI: Waiting for PCI PLL to lock\n"); + while ((readl(PLLPCICR) & PLLPCICR_LOCK) == 0); + writel(readl(PLLPCICR) | PLLPCICR_OUT_EN, PLLPCICR); +} + + +static irqreturn_t st40_pci_irq(int irq, void *dev_instance, struct pt_regs *regs) +{ + + unsigned pci_int, pci_air, pci_cir, pci_aint; + + pci_int = ST40PCI_READ(INT); + pci_cir = ST40PCI_READ(CIR); + pci_air = ST40PCI_READ(AIR); + + if (pci_int) { + printk("PCI INTERRUPT!\n"); + printk("PCI INT -> 0x%x\n", pci_int & 0xffff); + printk("PCI AIR -> 0x%x\n", pci_air); + printk("PCI CIR -> 0x%x\n", pci_cir); + ST40PCI_WRITE(INT, ~0); + } + + pci_aint = ST40PCI_READ(AINT); + if (pci_aint) { + printk("PCI ARB INTERRUPT!\n"); + printk("PCI AINT -> 0x%x\n", pci_aint); + printk("PCI AIR -> 0x%x\n", pci_air); + printk("PCI CIR -> 0x%x\n", pci_cir); + ST40PCI_WRITE(AINT, ~0); + } + + return IRQ_HANDLED; +} + + +/* Rounds a number UP to the nearest power of two. Used for + * sizing the PCI window. + */ +static u32 __init r2p2(u32 num) +{ + int i = 31; + u32 tmp = num; + + if (num == 0) + return 0; + + do { + if (tmp & (1 << 31)) + break; + i--; + tmp <<= 1; + } while (i >= 0); + + tmp = 1 << i; + /* If the original number isn't a power of 2, round it up */ + if (tmp != num) + tmp <<= 1; + + return tmp; +} + +static void __init pci_fixup_ide_bases(struct pci_dev *d) +{ + int i; + + /* + * PCI IDE controllers use non-standard I/O port decoding, respect it. + */ + if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) + return; + printk("PCI: IDE base address fixup for %s\n", d->slot_name); + for(i=0; i<4; i++) { + struct resource *r = &d->resource[i]; + if ((r->start & ~0x80) == 0x374) { + r->start |= 2; + r->end = r->start; + } + } +} + + +/* Add future fixups here... */ +struct pci_fixup pcibios_fixups[] = { + { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases }, + { 0 } +}; + +int __init st40pci_init(unsigned memStart, unsigned memSize) +{ + u32 lsr0; + + SetPCIPLL(); + + /* Initialises the ST40 pci subsystem, performing a reset, then programming + * up the address space decoders appropriately + */ + + /* Should reset core here as well methink */ + + ST40PCI_WRITE(CR, CR_LOCK_MASK | CR_SOFT_RESET); + + /* Loop while core resets */ + while (ST40PCI_READ(CR) & CR_SOFT_RESET); + + /* Now, lets reset all the cards on the bus with extreme prejudice */ + ST40PCI_WRITE(CR, CR_LOCK_MASK | CR_RSTCTL); + udelay(250); + + /* Set bus active, take it out of reset */ + ST40PCI_WRITE(CR, CR_LOCK_MASK | CR_CFINT | CR_PFCS | CR_PFE); + + /* The PCI spec says that no access must be made to the bus until 1 second + * after reset. This seem ludicrously long, but some delay is needed here + */ + mdelay(1000); + + /* Switch off interrupts */ + ST40PCI_WRITE(INTM, 0); + ST40PCI_WRITE(AINT, 0); + + /* Allow it to be a master */ + + ST40PCI_WRITE_SHORT(CSR_CMD, + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | + PCI_COMMAND_IO); + + /* Accesse to the 0xb0000000 -> 0xb6000000 area will go through to 0x10000000 -> 0x16000000 + * on the PCI bus. This allows a nice 1-1 bus to phys mapping. + */ + + + ST40PCI_WRITE(MBR, 0x10000000); + /* Always set the max size 128M (actually, it is only 96MB wide) */ + ST40PCI_WRITE(MBMR, 0x07ff0000); + + /* I/O addresses are mapped at 0xb6000000 -> 0xb7000000. These are changed to 0, to + * allow cards that have legacy io such as vga to function correctly. This gives a + * maximum of 64K of io/space as only the bottom 16 bits of the address are copied + * over to the bus when the transaction is made. 64K of io space is more than enough + */ + ST40PCI_WRITE(IOBR, 0x0); + /* Set up the 64K window */ + ST40PCI_WRITE(IOBMR, 0x0); + + /* Now we set up the mbars so the PCI bus can see the memory of the machine */ + + if (memSize < (64 * 1024)) { + printk("Ridiculous memory size of 0x%x?\n",memSize); + return 0; + } + + lsr0 = + (memSize > + (512 * 1024 * 1024)) ? 0x1fff0001 : ((r2p2(memSize) - + 0x10000) | 0x1); + + ST40PCI_WRITE(LSR0, lsr0); + + ST40PCI_WRITE(CSR_MBAR0, memStart); + ST40PCI_WRITE(LAR0, memStart); + + /* Maximise timeout values */ + ST40PCI_WRITE_BYTE(CSR_TRDY, 0xff); + ST40PCI_WRITE_BYTE(CSR_RETRY, 0xff); + ST40PCI_WRITE_BYTE(CSR_MIT, 0xff); + + + /* Install the pci interrupt handlers */ + make_intc2_irq(ST40PCI_SERR_IRQ, INTC2_BASE0, + ST40PCI_SERR_INT_GROUP, ST40PCI_SERR_INT_POS, + ST40PCI_SERR_INT_PRI); + + make_intc2_irq(ST40PCI_ERR_IRQ, INTC2_BASE0, ST40PCI_ERR_INT_GROUP, + ST40PCI_ERR_INT_POS, ST40PCI_ERR_INT_PRI); + + + return 1; +} + +char * __init pcibios_setup(char *str) +{ + return str; +} + + +#define SET_CONFIG_BITS(bus,devfn,where)\ + (((bus) << 16) | ((devfn) << 8) | ((where) & ~3) | (bus!=0)) + +#define CONFIG_CMD(bus, devfn, where) SET_CONFIG_BITS(bus->number,devfn,where) + + +static int CheckForMasterAbort(void) +{ + if (ST40PCI_READ(INT) & INT_MADIM) { + /* Should we clear config space version as well ??? */ + ST40PCI_WRITE(INT, INT_MADIM); + ST40PCI_WRITE_SHORT(CSR_STATUS, 0); + return 1; + } + + return 0; +} + +/* Write to config register */ +static int st40pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val) +{ + ST40PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); + switch (size) { + case 1: + *val = (u8)ST40PCI_READ_BYTE(PDR + (where & 3)); + break; + case 2: + *val = (u16)ST40PCI_READ_SHORT(PDR + (where & 2)); + break; + case 4: + *val = ST40PCI_READ(PDR); + break; + } + + if (CheckForMasterAbort()){ + switch (size) { + case 1: + *val = (u8)0xff; + break; + case 2: + *val = (u16)0xffff; + break; + case 4: + *val = 0xffffffff; + break; + } + } + + return PCIBIOS_SUCCESSFUL; +} + +static int st40pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) +{ + ST40PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); + + switch (size) { + case 1: + ST40PCI_WRITE_BYTE(PDR + (where & 3), (u8)val); + break; + case 2: + ST40PCI_WRITE_SHORT(PDR + (where & 2), (u16)val); + break; + case 4: + ST40PCI_WRITE(PDR, val); + break; + } + + CheckForMasterAbort(); + + return PCIBIOS_SUCCESSFUL; +} + +static struct pci_ops pci_config_ops = { + .read = st40pci_read, + .write = st40pci_write, +}; + + +/* Everything hangs off this */ +static struct pci_bus *pci_root_bus; + + +static u8 __init no_swizzle(struct pci_dev *dev, u8 * pin) +{ + return PCI_SLOT(dev->devfn); +} + + +/* This needs to be shunted out of here into the board specific bit */ +#define HARP_PCI_IRQ 1 +#define HARP_BRIDGE_IRQ 2 +#define OVERDRIVE_SLOT0_IRQ 0 + +static int __init map_harp_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + switch (slot) { +#ifdef CONFIG_SH_STB1_HARP + case 2: /*This is the PCI slot on the */ + return HARP_PCI_IRQ; + case 1: /* this is the bridge */ + return HARP_BRIDGE_IRQ; +#elif defined(CONFIG_SH_STB1_OVERDRIVE) + case 1: + case 2: + case 3: + return slot - 1; +#else +#error Unknown board +#endif + default: + return -1; + } +} + +void __init pcibios_init(void) +{ + extern unsigned long memory_start, memory_end; + + if (sh_mv.mv_init_pci != NULL) { + sh_mv.mv_init_pci(); + } + + /* The pci subsytem needs to know where memory is and how much + * of it there is. I've simply made these globals. A better mechanism + * is probably needed. + */ + st40pci_init(PHYSADDR(memory_start), + PHYSADDR(memory_end) - PHYSADDR(memory_start)); + + if (request_irq(ST40PCI_ERR_IRQ, st40_pci_irq, + SA_INTERRUPT, "st40pci", NULL)) { + printk(KERN_ERR "st40pci: Cannot hook interrupt\n"); + return; + } + + /* Enable the PCI interrupts on the device */ + ST40PCI_WRITE(INTM, ~0); + ST40PCI_WRITE(AINT, ~0); + + /* Map the io address apprioately */ +#ifdef CONFIG_HD64465 + hd64465_port_map(PCIBIOS_MIN_IO, (64 * 1024) - PCIBIOS_MIN_IO + 1, + ST40_IO_ADDR + PCIBIOS_MIN_IO, 0); +#endif + + /* ok, do the scan man */ + pci_root_bus = pci_scan_bus(0, &pci_config_ops, NULL); + pci_assign_unassigned_resources(); + pci_fixup_irqs(no_swizzle, map_harp_irq); + +} + +void __init pcibios_fixup_bus(struct pci_bus *bus) +{ +} diff -puN /dev/null arch/sh/drivers/pci/pci-st40.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/drivers/pci/pci-st40.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * Defintions for the ST40 PCI hardware. + */ + +#ifndef __PCI_ST40_H__ +#define __PCI_ST40_H__ + +#define ST40PCI_VCR_STATUS 0x00 + +#define ST40PCI_VCR_VERSION 0x08 + +#define ST40PCI_CR 0x10 + +#define CR_SOFT_RESET (1<<12) +#define CR_PFCS (1<<11) +#define CR_PFE (1<<9) +#define CR_BMAM (1<<6) +#define CR_HOST (1<<5) +#define CR_CLKEN (1<<4) +#define CR_SOCS (1<<3) +#define CR_IOCS (1<<2) +#define CR_RSTCTL (1<<1) +#define CR_CFINT (1<<0) +#define CR_LOCK_MASK 0x5a000000 + + +#define ST40PCI_LSR0 0X14 +#define ST40PCI_LAR0 0x1c + +#define ST40PCI_INT 0x24 +#define INT_MADIM (1<<2) + + +#define ST40PCI_INTM 0x28 +#define ST40PCI_AIR 0x2c +#define ST40PCI_CIR 0x30 +#define ST40PCI_AINT 0x40 +#define ST40PCI_AINTM 0x44 +#define ST40PCI_BMIR 0x48 +#define ST40PCI_PAR 0x4c +#define ST40PCI_MBR 0x50 +#define ST40PCI_IOBR 0x54 +#define ST40PCI_PINT 0x58 +#define ST40PCI_PINTM 0x5c +#define ST40PCI_MBMR 0x70 +#define ST40PCI_IOBMR 0x74 +#define ST40PCI_PDR 0x78 + +/* These are configs space registers */ +#define ST40PCI_CSR_VID 0x10000 +#define ST40PCI_CSR_DID 0x10002 +#define ST40PCI_CSR_CMD 0x10004 +#define ST40PCI_CSR_STATUS 0x10006 +#define ST40PCI_CSR_MBAR0 0x10010 +#define ST40PCI_CSR_TRDY 0x10040 +#define ST40PCI_CSR_RETRY 0x10041 +#define ST40PCI_CSR_MIT 0x1000d + +#define ST40_IO_ADDR 0xb6000000 + +#endif /* __PCI_ST40_H__ */ diff -puN arch/sh/Kconfig~sh-merge arch/sh/Kconfig --- 25/arch/sh/Kconfig~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/Kconfig 2004-01-09 21:32:27.000000000 -0800 @@ -25,14 +25,6 @@ config RWSEM_GENERIC_SPINLOCK config RWSEM_XCHGADD_ALGORITHM bool -config GENERIC_ISA_DMA - bool - default y - -config VARIABLE_CLOCK_TICK_RATE - bool - default y - source "init/Kconfig" @@ -54,6 +46,12 @@ config SH_7751_SOLUTION_ENGINE Select 7751 SolutionEngine if configuring for a Hitachi SH7751 evalutation board. +config SH_7751_SYSTEMH + bool "SystemH7751R" + help + Select SystemH if you are configuring for a Renesas SystemH + 7751R evaluation board. + config SH_STB1_HARP bool "STB1_Harp" @@ -102,6 +100,8 @@ config SH_EC3104 config SH_SATURN bool "Saturn" + help + Select Saturn if configuring for a SEGA Saturn. config SH_DREAMCAST bool "Dreamcast" @@ -132,6 +132,13 @@ config SH_ADX config SH_MPC1211 bool "MPC1211" +config SH_SECUREEDGE5410 + bool "SecureEdge5410" + help + Select SecureEdge5410 if configuring for a SnapGear SH board. + This includes both the OEM SecureEdge products as well as the + SME product line. + config SH_UNKNOWN bool "BareCPU" help @@ -146,6 +153,85 @@ config SH_UNKNOWN endchoice +choice + prompt "Processor family" + default CPU_SH4 + help + This option determines the CPU family to compile for. Supported + targets are SH-2, SH-3, and SH-4. These options are independent of + CPU functionality. As such, SH-DSP users will still want to select + their respective processor family in addition to the DSP support + option. + +config CPU_SH2 + bool "SH-2" + select SH_WRITETHROUGH + +config CPU_SH3 + bool "SH-3" + +config CPU_SH4 + bool "SH-4" + +endchoice + +choice + prompt "Processor subtype" + +config CPU_SUBTYPE_SH7604 + bool "SH7604" + depends on CPU_SH2 + help + Select SH7604 if you have SH7604 + +config CPU_SUBTYPE_SH7300 + bool "SH7300" + depends on CPU_SH3 + +config CPU_SUBTYPE_SH7707 + bool "SH7707" + depends on CPU_SH3 + help + Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. + +config CPU_SUBTYPE_SH7708 + bool "SH7708" + depends on CPU_SH3 + help + Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or + if you have a 100 Mhz SH-3 HD6417708R CPU. + +config CPU_SUBTYPE_SH7709 + bool "SH7709" + depends on CPU_SH3 + help + Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. + +config CPU_SUBTYPE_SH7750 + bool "SH7750" + depends on CPU_SH4 + help + Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. + +config CPU_SUBTYPE_SH7751 + bool "SH7751/SH7751R" + depends on CPU_SH4 + help + Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, + or if you have a HD6417751R CPU. + +config CPU_SUBTYPE_SH7760 + bool "SH7760" + depends on CPU_SH4 + +config CPU_SUBTYPE_ST40STB1 + bool "ST40STB1" + depends on CPU_SH4 + help + Select ST40STB1 if you have a ST40STB1 CPU. + +endchoice + config MMU bool "Support for memory management hardware" depends on !CPU_SH2 @@ -169,8 +255,8 @@ config CMDLINE # Platform-specific memory start and size definitions config MEMORY_START hex "Physical memory start address" if !MEMORY_SET || MEMORY_OVERRIDE - default "08000000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || SH_MPC1211 - default "0c000000" if !MEMORY_OVERRIDE && (SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE) + default "0x08000000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || SH_MPC1211 || SH_SECUREEDGE5410 + default "0x0c000000" if !MEMORY_OVERRIDE && (SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE) ---help--- Computers built with Hitachi SuperH processors always map the ROM starting at address zero. But the processor @@ -187,11 +273,11 @@ config MEMORY_START config MEMORY_SIZE hex "Physical memory size" if !MEMORY_SET || MEMORY_OVERRIDE - default "00400000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || !MEMORY_OVERRIDE && (SH_HP600 || SH_BIGSUR || SH_SH2000) - default "01000000" if !MEMORY_OVERRIDE && SH_DREAMCAST - default "04000000" if !MEMORY_OVERRIDE && SH_7751_SOLUTION_ENGINE - default "02000000" if !MEMORY_OVERRIDE && SH_SOLUTION_ENGINE - default "08000000" if SH_MPC1211 + default "0x00400000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || !MEMORY_OVERRIDE && (SH_HP600 || SH_BIGSUR || SH_SH2000) + default "0x01000000" if !MEMORY_OVERRIDE && SH_DREAMCAST || SH_SECUREEDGE5410 + default "0x04000000" if !MEMORY_OVERRIDE && SH_7751_SOLUTION_ENGINE + default "0x02000000" if !MEMORY_OVERRIDE && SH_SOLUTION_ENGINE + default "0x08000000" if SH_MPC1211 help This sets the default memory size assumed by your SH kernel. It can be overridden as normal by the 'mem=' argument on the kernel command @@ -201,7 +287,7 @@ config MEMORY_SIZE config MEMORY_SET bool - depends on !MEMORY_OVERRIDE && (SH_MPC1211 || SH_ADX || SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE) + depends on !MEMORY_OVERRIDE && (SH_MPC1211 || SH_ADX || SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_SECUREEDGE5410) default y help This is an option about which you will never be asked a question. @@ -254,15 +340,13 @@ endchoice config CF_BASE_ADDR hex depends on CF_ENABLER - default "b8000000" if CF_AREA6 - default "b4000000" if CF_AREA5 - -endmenu + default "0xb8000000" if CF_AREA6 + default "0xb4000000" if CF_AREA5 # The SH7750 RTC module is disabled in the Dreamcast config SH_RTC bool - depends on !SH_DREAMCAST + depends on !SH_DREAMCAST && !SH_SATURN default y help Selecting this option will allow the Linux kernel to emulate @@ -270,9 +354,16 @@ config SH_RTC If unsure, say N. -# This is also board-specific -config PCI_AUTO - bool +config SH_DSP + bool "DSP support" + depends on !CPU_SH4 + default y + help + Selecting this option will enable support for SH processors that + have DSP units (ie, SH2-DSP and SH3-DSP). It is safe to say Y here + by default, as the existance of the DSP will be probed at runtime. + + This option must be set in order to enable the DSP. config SH_HP600 bool @@ -289,91 +380,10 @@ config DISCONTIGMEM or have huge holes in the physical address space for other reasons. See for more. - -menu "Processor type and features" - -# -# Ick, get rid of all this CPU_SUBTYPE nonsense. Just probe it, fill in -# cpu_data, and leave it alone. (Feasible for SH-4 at least, and some -# SH-3). ++paulm -# -choice - prompt "Processor type" - default CPU_SUBTYPE_SH7708 - -config CPU_SUBTYPE_SH7604 - bool "SH7604" - help - Select SH7604 if you have SH7604 - -config CPU_SUBTYPE_SH7707 - bool "SH7707" - ---help--- - Select the type of SuperH processor you have. This information is - used for optimizing and configuration purposes. - - Select SH7604 if you have a SH-2 CPU. - - Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. - - Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or - if you have a 100 Mhz SH-3 HD6417708R CPU. - - Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. - - Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. - - Select SH7751 if you have a SH7751 - - Select ST40STB1 if you have a ST40STB1 - -config CPU_SUBTYPE_SH7708 - bool "SH7708" - help - Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or - if you have a 100 Mhz SH-3 HD6417708R CPU. - -config CPU_SUBTYPE_SH7709 - bool "SH7709" - help - Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. - -config CPU_SUBTYPE_SH7750 - bool "SH7750" - help - Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. - -config CPU_SUBTYPE_SH7751 - bool "SH7751" - help - Select SH7750 if you have a 166 Mhz SH-4 HD6417751 CPU. - -config CPU_SUBTYPE_ST40STB1 - bool "ST40STB1" - help - Select ST40STB1 if you have a ST40STB1 CPU. - -endchoice - -config CPU_SH2 - bool - depends on CPU_SUBTYPE_SH7604 - default y - -config CPU_SH3 - bool - depends on !CPU_SH2 && (CPU_SUBTYPE_SH7707 || CPU_SUBTYPE_SH7708 || CPU_SUBTYPE_SH7709) - default y - -config CPU_SH4 - bool - depends on !CPU_SH3 && !CPU_SH2 && (CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_ST40STB1) - default y - config ZERO_PAGE_OFFSET hex "Zero page offset" - default "00001000" if !SH_MPC1211 - default "00004000" if SH_MPC1211 + default "0x00001000" if !SH_MPC1211 + default "0x00004000" if SH_MPC1211 help This sets the default offset of zero page. @@ -385,18 +395,26 @@ config ST40_LMI_MEMORY config MEMORY_START hex depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY - default "08000000" + default "0x08000000" config MEMORY_SIZE hex depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY - default "00400000" + default "0x00400000" config MEMORY_SET bool depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY default y +config BOOT_LINK_OFFSET + hex "Link address offset for booting" + default "0x00800000" + help + This option allows you to set the link address offset of the zImage. + This can be useful if you are on a board which has a small amount of + memory. + config CPU_LITTLE_ENDIAN bool "Little Endian" help @@ -442,6 +460,13 @@ config SH_OCRAM If unsure, say N. +config SH_STORE_QUEUES + bool "Support for Store Queues" + depends on CPU_SH4 + help + Selecting this option will enable an in-kernel API for manipulating + the store queues integrated in the SH-4 processors. + config SMP bool "Symmetric multi-processing support" ---help--- @@ -477,13 +502,18 @@ config NR_CPUS This is purely to save memory - each supported CPU adds approximately eight kilobytes to the kernel image. -config SH_DMA - bool "DMA controller (DMAC) support" - help - Selecting this option will provide same API as PC's Direct Memory - Access Controller(8237A) for SuperH DMAC. - - If unsure, say N. +config SH_PCLK_FREQ + int "Peripheral clock frequency (in Hz)" + default "49876504" if CPU_SUBTYPE_SH7750 + default "60013568" if CPU_SUBTYPE_SH7751 + default "1193182" + help + This option is used to specify the peripheral clock frequency. This + option must be set for each processor in order for the kernel to + function reliably. If no sane default exists, we use a default from + the legacy i8254. Any discrepancies will be reported on boot time + with an auto-probed frequency which should be considered the proper + value for your hardware. config CPU_FREQ bool "CPU Frequency scaling" @@ -518,80 +548,9 @@ config SH_CPU_FREQ source "drivers/cpufreq/Kconfig" -# A board must have defined HD6446X_SERIES in order to see these -choice - prompt "HD6446x options" - depends HD6446X_SERIES - default HD64461 - -config HD64461 - bool "Hitachi HD64461 companion chip support" - depends on CPU_SUBTYPE_SH7709 - ---help--- - The Hitachi HD64461 provides an interface for - the SH7709 CPU, supporting a LCD controller, - CRT color controller, IrDA up to 4 Mbps, and a - PCMCIA controller supporting 2 slots. - - More information is available at - . - - Say Y if you want support for the HD64461. - Otherwise, say N. - -config HD64465 - bool "Hitachi HD64465 companion chip support" - depends on CPU_SUBTYPE_SH7750 - ---help--- - The Hitachi HD64465 provides an interface for - the SH7750 CPU, supporting a LCD controller, - CRT color controller, IrDA, USB, PCMCIA, - keyboard controller, and a printer interface. - - More information is available at - . - - Say Y if you want support for the HD64465. - Otherwise, say N. - -endchoice - -# These will also be split into the Kconfig's below -config HD64461_IRQ - int "HD64461 IRQ" - depends on HD64461 - default "36" - help - The default setting of the HD64461 IRQ is 36. - - Do not change this unless you know what you are doing. - -config HD64461_ENABLER - bool "HD64461 PCMCIA enabler" - depends on HD64461 - help - Say Y here if you want to enable PCMCIA support - via the HD64461 companion chip. - Otherwise, say N. - +source "arch/sh/drivers/dma/Kconfig" -config HD64465_IOBASE - hex "HD64465 start address" - depends on HD64465 - default "b0000000" - help - The default setting of the HD64465 IO base address is 0xb0000000. - - Do not change this unless you know what you are doing. - -config HD64465_IRQ - int "HD64465 IRQ" - depends on HD64465 - default "5" - help - The default setting of the HD64465 IRQ is 5. - - Do not change this unless you know what you are doing. +source "arch/sh/cchips/Kconfig" endmenu @@ -601,9 +560,13 @@ menu "Bus options (PCI, PCMCIA, EISA, MC # Even on SuperH devices which don't have an ISA bus, # this variable helps the PCMCIA modules handle # IRQ requesting properly -- Greg Banks. +# +# Though we're generally not interested in it when +# we're not using PCMCIA, so we make it dependent on +# PCMCIA outright. -- PFM. config ISA bool - default y + default y if PCMCIA help Find out whether you have ISA slots on your motherboard. ISA is the name of a bus system, i.e. the way the CPU talks to the other stuff @@ -637,68 +600,11 @@ config MCA config SBUS bool -config PCI - bool "PCI support" - help - Find out whether you have a PCI motherboard. PCI is the name of a - bus system, i.e. the way the CPU talks to the other stuff inside - your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or - VESA. If you have PCI, say Y, otherwise N. - - The PCI-HOWTO, available from - , contains valuable - information about which PCI hardware does work under Linux and which - doesn't. - -choice - prompt "PCI access mode" - depends on PCI - default PCI_GOANY - -config PCI_GOBIOS - bool "BIOS" - ---help--- - On PCI systems, the BIOS can be used to detect the PCI devices and - determine their configuration. However, some old PCI motherboards - have BIOS bugs and may crash if this is done. Also, some embedded - PCI-based systems don't have any BIOS at all. Linux can also try to - detect the PCI hardware directly without using the BIOS. - - With this option, you can specify how Linux should detect the PCI - devices. If you choose "BIOS", the BIOS will be used, if you choose - "Direct", the BIOS won't be used, and if you choose "Any", the - kernel will try the direct access method and falls back to the BIOS - if that doesn't work. If unsure, go with the default, which is - "Any". - -config PCI_GODIRECT - bool "Direct" - -config PCI_GOANY - bool "Any" - -endchoice - -config PCI_BIOS - bool - depends on PCI && (PCI_GOBIOS || PCI_GOANY) - default y - -config PCI_DIRECT +config MAPLE bool - depends on PCI && (PCI_GODIRECT || PCI_GOANY) - default y + default y if SH_DREAMCAST -config SH_PCIDMA_NONCOHERENT - bool "Cache and PCI noncoherent" - depends on PCI - help - Enable this option if your platform does not have a CPU cache which - remains coherent with PCI DMA. It is safest to say 'Y', although you - will see better performance if you can say 'N', because the PCI DMA - code will not have to flush the CPU's caches. If you have a PCI host - bridge integrated with your SH CPU, refer carefully to the chip specs - to see if you can say 'N' here. Otherwise, leave it as 'Y'. +source "arch/sh/drivers/pci/Kconfig" source "drivers/pci/Kconfig" @@ -762,10 +668,6 @@ source "drivers/telephony/Kconfig" # source "drivers/input/Kconfig" -#if [ "$CONFIG_SH_DREAMCAST" = "y" ]; then -# source drivers/maple/Config.in -#fi - menu "Character devices" config VT @@ -1136,6 +1038,7 @@ source "sound/Kconfig" source "drivers/usb/Kconfig" +source "arch/sh/oprofile/Kconfig" menu "Kernel hacking" @@ -1184,6 +1087,97 @@ config SH_EARLY_PRINTK when the kernel may crash or hang before the serial console is initialised. If unsure, say N. +config KGDB + bool "Include KGDB kernel debugger" + help + Include in-kernel hooks for kgdb, the Linux kernel source level + debugger. See for more information. + Unless you are intending to debug the kernel, say N here. + +menu "KGDB configuration options" + depends on KGDB + +config MORE_COMPILE_OPTIONS + bool "Add any additional compile options" + help + If you want to add additional CFLAGS to the kernel build, enable this + option and then enter what you would like to add in the next question. + Note however that -g is already appended with the selection of KGDB. + +config COMPILE_OPTIONS + string "Additional compile arguments" + depends on MORE_COMPILE_OPTIONS + +config KGDB_NMI + bool "Enter KGDB on NMI" + default n + +config KGDB_THREAD + bool "Include KGDB thread support" + default y + +config SH_KGDB_CONSOLE + bool "Console messages through GDB" + default n + +config KGDB_SYSRQ + bool "Allow SysRq 'G' to enter KGDB" + default y + +config KGDB_KERNEL_ASSERTS + bool "Include KGDB kernel assertions" + default n + +comment "Serial port setup" + +config KGDB_DEFPORT + int "Port number (ttySCn)" + default "1" + +config KGDB_DEFBAUD + int "Baud rate" + default "115200" + +choice + prompt "Parity" + depends on KGDB + default KGDB_DEFPARITY_N + +config KGDB_DEFPARITY_N + bool "None" + +config KGDB_DEFPARITY_E + bool "Even" + +config KGDB_DEFPARITY_O + bool "Odd" + +endchoice + +choice + prompt "Data bits" + depends on KGDB + default KGDB_DEFBITS_8 + +config KGDB_DEFBITS_8 + bool "8" + +config KGDB_DEFBITS_7 + bool "7" + +endchoice + +endmenu + +config FRAME_POINTER + bool "Compile the kernel with frame pointers" + default y if KGDB + help + If you say Y here the resulting kernel image will be slightly larger + and slower, but it will give very useful debugging information. + If you don't debug the kernel, you can say N, but we may not be able + to solve problems without frame pointers. + endmenu source "security/Kconfig" diff -puN -L arch/sh/kernel/cpu/dma.c arch/sh/kernel/cpu/dma.c~sh-merge /dev/null --- 25/arch/sh/kernel/cpu/dma.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,211 +0,0 @@ -/* - * arch/sh/kernel/cpu/dma.c - * - * Copyright (C) 2000 Takashi YOSHII - * Copyright (C) 2003 Paul Mundt - * - * PC like DMA API for SuperH's DMAC. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#include -#include -#include -#include -#include - -#include -#include - -static struct dma_info_t *dma_info[MAX_DMA_CHANNELS]; -static struct dma_info_t *autoinit_info[SH_MAX_DMA_CHANNELS] = {0}; -extern spinlock_t dma_spin_lock; - -/* - * The SuperH DMAC supports a number of transmit sizes, we list them here, - * with their respective values as they appear in the CHCR registers. - * - * Defaults to a 64-bit transfer size. - */ -enum { - XMIT_SZ_64BIT = 0, - XMIT_SZ_8BIT = 1, - XMIT_SZ_16BIT = 2, - XMIT_SZ_32BIT = 3, - XMIT_SZ_256BIT = 4, -}; - -/* - * The DMA count is defined as the number of bytes to transfer. - */ -static unsigned int ts_shift[] = { - [XMIT_SZ_64BIT] 3, - [XMIT_SZ_8BIT] 0, - [XMIT_SZ_16BIT] 1, - [XMIT_SZ_32BIT] 2, - [XMIT_SZ_256BIT] 5, -}; - -/* - * We determine the correct shift size based off of the CHCR transmit size - * for the given channel. Since we know that it will take: - * - * info->count >> ts_shift[transmit_size] - * - * iterations to complete the transfer. - */ -static inline unsigned int calc_xmit_shift(struct dma_info_t *info) -{ - return ts_shift[(ctrl_inl(CHCR[info->chan]) >> 4) & 0x0007]; -} - -static irqreturn_t dma_tei(int irq, void *dev_id, struct pt_regs *regs) -{ - int chan = irq - DMTE_IRQ[0]; - struct dma_info_t *info = autoinit_info[chan]; - - if( info->mode & DMA_MODE_WRITE ) - ctrl_outl(info->mem_addr, SAR[info->chan]); - else - ctrl_outl(info->mem_addr, DAR[info->chan]); - - ctrl_outl(info->count >> calc_xmit_shift(info), DMATCR[info->chan]); - ctrl_outl(ctrl_inl(CHCR[info->chan])&~CHCR_TE, CHCR[info->chan]); - - return IRQ_HANDLED; -} - -static struct irqaction irq_tei = { - .handler = dma_tei, - .flags = SA_INTERRUPT, - .name = "dma_tei", -}; - -void setup_dma(unsigned int dmanr, struct dma_info_t *info) -{ - make_ipr_irq(DMTE_IRQ[info->chan], DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY); - setup_irq(DMTE_IRQ[info->chan], &irq_tei); - dma_info[dmanr] = info; -} - -unsigned long claim_dma_lock(void) -{ - unsigned long flags; - spin_lock_irqsave(&dma_spin_lock, flags); - return flags; -} - -void release_dma_lock(unsigned long flags) -{ - spin_unlock_irqrestore(&dma_spin_lock, flags); -} - -void enable_dma(unsigned int dmanr) -{ - struct dma_info_t *info = dma_info[dmanr]; - unsigned long chcr; - - chcr = ctrl_inl(CHCR[info->chan]); - chcr |= CHCR_DE; - ctrl_outl(chcr, CHCR[info->chan]); -} - -void disable_dma(unsigned int dmanr) -{ - struct dma_info_t *info = dma_info[dmanr]; - unsigned long chcr; - - chcr = ctrl_inl(CHCR[info->chan]); - chcr &= ~CHCR_DE; - ctrl_outl(chcr, CHCR[info->chan]); -} - -void set_dma_mode(unsigned int dmanr, char mode) -{ - struct dma_info_t *info = dma_info[dmanr]; - - info->mode = mode; - set_dma_addr(dmanr, info->mem_addr); - set_dma_count(dmanr, info->count); - autoinit_info[info->chan] = info; -} - -void set_dma_addr(unsigned int dmanr, unsigned int a) -{ - struct dma_info_t *info = dma_info[dmanr]; - unsigned long sar, dar; - - info->mem_addr = a; - sar = (info->mode & DMA_MODE_WRITE)? info->mem_addr: info->dev_addr; - dar = (info->mode & DMA_MODE_WRITE)? info->dev_addr: info->mem_addr; - ctrl_outl(sar, SAR[info->chan]); - ctrl_outl(dar, DAR[info->chan]); -} - -void set_dma_count(unsigned int dmanr, unsigned int count) -{ - struct dma_info_t *info = dma_info[dmanr]; - info->count = count; - ctrl_outl(count >> calc_xmit_shift(info), DMATCR[info->chan]); -} - -int get_dma_residue(unsigned int dmanr) -{ - struct dma_info_t *info = dma_info[dmanr]; - return (ctrl_inl(DMATCR[info->chan]) << calc_xmit_shift(info)); -} - -#if defined(CONFIG_CPU_SH4) -static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs) -{ - printk(KERN_WARNING "DMAE: DMAOR=%x\n",ctrl_inl(DMAOR)); - ctrl_outl(ctrl_inl(DMAOR)&~DMAOR_NMIF, DMAOR); - ctrl_outl(ctrl_inl(DMAOR)&~DMAOR_AE, DMAOR); - ctrl_outl(ctrl_inl(DMAOR)|DMAOR_DME, DMAOR); - - return IRQ_HANDLED; -} - -static struct irqaction irq_err = { - .handler = dma_err, - .flags = SA_INTERRUPT, - .name = "dma_err", -}; -#endif - -int __init init_dma(void) -{ -#if defined(CONFIG_CPU_SH4) - make_ipr_irq(DMAE_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY); - setup_irq(DMAE_IRQ, &irq_err); -#endif - - ctrl_outl(DMAOR_DME, DMAOR); - return 0; -} - -static void __exit exit_dma(void) -{ -#ifdef CONFIG_CPU_SH4 - free_irq(DMAE_IRQ, 0); -#endif -} - -module_init(init_dma); -module_exit(exit_dma); - -MODULE_LICENSE("GPL"); - -EXPORT_SYMBOL(setup_dma); -EXPORT_SYMBOL(claim_dma_lock); -EXPORT_SYMBOL(release_dma_lock); -EXPORT_SYMBOL(enable_dma); -EXPORT_SYMBOL(disable_dma); -EXPORT_SYMBOL(set_dma_mode); -EXPORT_SYMBOL(set_dma_addr); -EXPORT_SYMBOL(set_dma_count); -EXPORT_SYMBOL(get_dma_residue); - diff -puN /dev/null arch/sh/kernel/cpu/init.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/kernel/cpu/init.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,214 @@ +/* + * arch/sh/kernel/cpu/init.c + * + * CPU init code + * + * Copyright (C) 2002, 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +extern void detect_cpu_and_cache_system(void); + +/* + * Generic wrapper for command line arguments to disable on-chip + * peripherals (nofpu, nodsp, and so forth). + */ +#define onchip_setup(x) \ +static int x##_disabled __initdata = 0; \ + \ +static int __init x##_setup(char *opts) \ +{ \ + x##_disabled = 1; \ + return 0; \ +} \ +__setup("no" __stringify(x), x##_setup); + +onchip_setup(fpu); +onchip_setup(dsp); + +/* + * Generic first-level cache init + */ +static void __init cache_init(void) +{ + unsigned long ccr, flags = 0; + + if (cpu_data->type == CPU_SH_NONE) + panic("Unknown CPU"); + + jump_to_P2(); + ccr = ctrl_inl(CCR); + + /* + * If the cache is already enabled .. flush it. + */ + if (ccr & CCR_CACHE_ENABLE) { + unsigned long entries, i, j; + + entries = cpu_data->dcache.sets; + + /* + * If the OC is already in RAM mode, we only have + * half of the entries to flush.. + */ + if (ccr & CCR_CACHE_ORA) + entries >>= 1; + + for (i = 0; i < entries; i++) { + for (j = 0; j < cpu_data->dcache.ways; j++) { + unsigned long data, addr; + + addr = CACHE_OC_ADDRESS_ARRAY | + (j << cpu_data->dcache.way_shift) | + (i << cpu_data->dcache.entry_shift); + + data = ctrl_inl(addr); + + if ((data & (SH_CACHE_UPDATED | SH_CACHE_VALID)) + == (SH_CACHE_UPDATED | SH_CACHE_VALID)) + ctrl_outl(data & ~SH_CACHE_UPDATED, addr); + } + } + } + + /* + * Default CCR values .. enable the caches + * and flush them immediately.. + */ + flags |= CCR_CACHE_ENABLE | CCR_CACHE_INVALIDATE; + +#ifdef CCR_CACHE_EMODE + flags |= (ccr & CCR_CACHE_EMODE); +#endif + +#ifdef CONFIG_SH_WRITETHROUGH + /* Turn on Write-through caching */ + flags |= CCR_CACHE_WT; +#else + /* .. or default to Write-back */ + flags |= CCR_CACHE_CB; +#endif + +#ifdef CONFIG_SH_OCRAM + /* Turn on OCRAM -- halve the OC */ + flags |= CCR_CACHE_ORA; + cpu_data->dcache.sets >>= 1; +#endif + + ctrl_outl(flags, CCR); + back_to_P1(); +} + +#ifdef CONFIG_SH_DSP +static void __init release_dsp(void) +{ + unsigned long sr; + + /* Clear SR.DSP bit */ + __asm__ __volatile__ ( + "stc\tsr, %0\n\t" + "and\t%1, %0\n\t" + "ldc\t%0, sr\n\t" + : "=&r" (sr) + : "r" (~SR_DSP) + ); +} + +static void __init dsp_init(void) +{ + unsigned long sr; + + /* + * Set the SR.DSP bit, wait for one instruction, and then read + * back the SR value. + */ + __asm__ __volatile__ ( + "stc\tsr, %0\n\t" + "or\t%1, %0\n\t" + "ldc\t%0, sr\n\t" + "nop\n\t" + "stc\tsr, %0\n\t" + : "=&r" (sr) + : "r" (SR_DSP) + ); + + /* If the DSP bit is still set, this CPU has a DSP */ + if (sr & SR_DSP) + set_bit(CPU_HAS_DSP, &(cpu_data->flags)); + + /* Now that we've determined the DSP status, clear the DSP bit. */ + release_dsp(); +} +#endif /* CONFIG_SH_DSP */ + +/* + * sh_cpu_init + * + * This is our initial entry point for each CPU, and is invoked on the boot + * CPU prior to calling start_kernel(). For SMP, a combination of this and + * start_secondary() will bring up each processor to a ready state prior + * to hand forking the idle loop. + * + * We do all of the basic processor init here, including setting up the + * caches, FPU, DSP, kicking the UBC, etc. By the time start_kernel() is + * hit (and subsequently platform_setup()) things like determining the + * CPU subtype and initial configuration will all be done. + * + * Each processor family is still responsible for doing its own probing + * and cache configuration in detect_cpu_and_cache_system(). + */ +asmlinkage void __init sh_cpu_init(void) +{ + /* First, probe the CPU */ + detect_cpu_and_cache_system(); + + /* Init the cache */ + cache_init(); + + /* Disable the FPU */ + if (fpu_disabled) { + printk("FPU Disabled\n"); + cpu_data->flags &= ~CPU_HAS_FPU; + release_fpu(); + } + + /* FPU initialization */ + if (test_bit(CPU_HAS_FPU, &(cpu_data->flags))) { + clear_thread_flag(TIF_USEDFPU); + current->used_math = 0; + } + +#ifdef CONFIG_SH_DSP + /* Probe for DSP */ + dsp_init(); + + /* Disable the DSP */ + if (dsp_disabled) { + printk("DSP Disabled\n"); + cpu_data->flags &= ~CPU_HAS_DSP; + release_dsp(); + } +#endif + +#ifdef CONFIG_UBC_WAKEUP + /* + * Some brain-damaged loaders decided it would be a good idea to put + * the UBC to sleep. This causes some issues when it comes to things + * like PTRACE_SINGLESTEP or doing hardware watchpoints in GDB. So .. + * we wake it up and hope that all is well. + */ + ubc_wakeup(); +#endif +} + diff -puN arch/sh/kernel/cpu/Makefile~sh-merge arch/sh/kernel/cpu/Makefile --- 25/arch/sh/kernel/cpu/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/cpu/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -2,13 +2,12 @@ # Makefile for the Linux/SuperH CPU-specifc backends. # -obj-y := irq_ipr.o irq_imask.o +obj-y := irq_ipr.o irq_imask.o init.o obj-$(CONFIG_CPU_SH2) += sh2/ obj-$(CONFIG_CPU_SH3) += sh3/ obj-$(CONFIG_CPU_SH4) += sh4/ -obj-$(CONFIG_SH_DMA) += dma.o obj-$(CONFIG_SH_RTC) += rtc.o obj-$(CONFIG_UBC_WAKEUP) += ubc.o diff -puN /dev/null arch/sh/kernel/cpu/sh3/ex.S --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/kernel/cpu/sh3/ex.S 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,124 @@ +/* + * arch/sh/kernel/cpu/sh3/ex.S + * + * The SH-3 exception vector table. + + * Copyright (C) 1999, 2000, 2002 Niibe Yutaka + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + */ +#include +#include + + .align 2 + .data + +ENTRY(exception_handling_table) + .long exception_error /* 000 */ + .long exception_error +#if defined(CONFIG_MMU) + .long tlb_miss_load /* 040 */ + .long tlb_miss_store + .long initial_page_write + .long tlb_protection_violation_load + .long tlb_protection_violation_store + .long address_error_load + .long address_error_store /* 100 */ +#else + .long exception_error ! tlb miss load /* 040 */ + .long exception_error ! tlb miss store + .long exception_error ! initial page write + .long exception_error ! tlb prot violation load + .long exception_error ! tlb prot violation store + .long exception_error ! address error load + .long exception_error ! address error store /* 100 */ +#endif + .long exception_error ! fpu_exception /* 120 */ + .long exception_error /* 140 */ + .long system_call ! Unconditional Trap /* 160 */ + .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ + .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ +ENTRY(nmi_slot) +#if defined (CONFIG_KGDB_NMI) + .long debug_enter /* 1C0 */ ! Allow trap to debugger +#else + .long exception_none /* 1C0 */ ! Not implemented yet +#endif +ENTRY(user_break_point_trap) + .long break_point_trap /* 1E0 */ +ENTRY(interrupt_table) + ! external hardware + .long do_IRQ ! 0000 /* 200 */ + .long do_IRQ ! 0001 + .long do_IRQ ! 0010 + .long do_IRQ ! 0011 + .long do_IRQ ! 0100 + .long do_IRQ ! 0101 + .long do_IRQ ! 0110 + .long do_IRQ ! 0111 + .long do_IRQ ! 1000 /* 300 */ + .long do_IRQ ! 1001 + .long do_IRQ ! 1010 + .long do_IRQ ! 1011 + .long do_IRQ ! 1100 + .long do_IRQ ! 1101 + .long do_IRQ ! 1110 + .long exception_error + ! Internal hardware + .long do_IRQ ! TMU0 tuni0 /* 400 */ + .long do_IRQ ! TMU1 tuni1 + .long do_IRQ ! TMU2 tuni2 + .long do_IRQ ! ticpi2 + .long do_IRQ ! RTC ati + .long do_IRQ ! pri + .long do_IRQ ! cui + .long do_IRQ ! SCI eri + .long do_IRQ ! rxi /* 500 */ + .long do_IRQ ! txi + .long do_IRQ ! tei + .long do_IRQ ! WDT iti /* 560 */ + .long do_IRQ ! REF rcmi + .long do_IRQ ! rovi + .long do_IRQ + .long do_IRQ /* 5E0 */ +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) + .long do_IRQ ! 32 IRQ irq0 /* 600 */ + .long do_IRQ ! 33 irq1 + .long do_IRQ ! 34 irq2 + .long do_IRQ ! 35 irq3 + .long do_IRQ ! 36 irq4 + .long do_IRQ ! 37 irq5 + .long do_IRQ ! 38 + .long do_IRQ ! 39 + .long do_IRQ ! 40 PINT pint0-7 /* 700 */ + .long do_IRQ ! 41 pint8-15 + .long do_IRQ ! 42 + .long do_IRQ ! 43 + .long do_IRQ ! 44 + .long do_IRQ ! 45 + .long do_IRQ ! 46 + .long do_IRQ ! 47 + .long do_IRQ ! 48 DMAC dei0 /* 800 */ + .long do_IRQ ! 49 dei1 + .long do_IRQ ! 50 dei2 + .long do_IRQ ! 51 dei3 + .long do_IRQ ! 52 IrDA eri1 + .long do_IRQ ! 53 rxi1 + .long do_IRQ ! 54 bri1 + .long do_IRQ ! 55 txi1 + .long do_IRQ ! 56 SCIF eri2 + .long do_IRQ ! 57 rxi2 + .long do_IRQ ! 58 bri2 + .long do_IRQ ! 59 txi2 + .long do_IRQ ! 60 ADC adi /* 980 */ +#if defined(CONFIG_CPU_SUBTYPE_SH7707) + .long do_IRQ ! 61 LCDC lcdi /* 9A0 */ + .long do_IRQ ! 62 PCC pcc0i + .long do_IRQ ! 63 pcc1i /* 9E0 */ +#endif +#endif + diff -puN arch/sh/kernel/cpu/sh3/Makefile~sh-merge arch/sh/kernel/cpu/sh3/Makefile --- 25/arch/sh/kernel/cpu/sh3/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/cpu/sh3/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -2,3 +2,5 @@ # Makefile for the Linux/SuperH SH-3 backends. # +obj-y := ex.o + diff -puN /dev/null arch/sh/kernel/cpu/sh4/ex.S --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/kernel/cpu/sh4/ex.S 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,316 @@ +/* + * arch/sh/kernel/cpu/sh4/ex.S + * + * The SH-4 exception vector table. + + * Copyright (C) 1999, 2000, 2002 Niibe Yutaka + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + */ +#include +#include + + .align 2 + .data + +ENTRY(exception_handling_table) + .long exception_error /* 000 */ + .long exception_error +#if defined(CONFIG_MMU) + .long tlb_miss_load /* 040 */ + .long tlb_miss_store + .long initial_page_write + .long tlb_protection_violation_load + .long tlb_protection_violation_store + .long address_error_load + .long address_error_store /* 100 */ +#else + .long exception_error ! tlb miss load /* 040 */ + .long exception_error ! tlb miss store + .long exception_error ! initial page write + .long exception_error ! tlb prot violation load + .long exception_error ! tlb prot violation store + .long exception_error ! address error load + .long exception_error ! address error store /* 100 */ +#endif + + .long do_fpu_error /* 120 */ + .long exception_error /* 140 */ + .long system_call ! Unconditional Trap /* 160 */ + .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ + .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ +ENTRY(nmi_slot) +#if defined (CONFIG_KGDB_NMI) + .long debug_enter /* 1C0 */ ! Allow trap to debugger +#else + .long exception_none /* 1C0 */ ! Not implemented yet +#endif +ENTRY(user_break_point_trap) + .long break_point_trap /* 1E0 */ +ENTRY(interrupt_table) + ! external hardware + .long do_IRQ ! 0000 /* 200 */ + .long do_IRQ ! 0001 + .long do_IRQ ! 0010 + .long do_IRQ ! 0011 + .long do_IRQ ! 0100 + .long do_IRQ ! 0101 + .long do_IRQ ! 0110 + .long do_IRQ ! 0111 + .long do_IRQ ! 1000 /* 300 */ + .long do_IRQ ! 1001 + .long do_IRQ ! 1010 + .long do_IRQ ! 1011 + .long do_IRQ ! 1100 + .long do_IRQ ! 1101 + .long do_IRQ ! 1110 + .long exception_error + ! Internal hardware + .long do_IRQ ! TMU0 tuni0 /* 400 */ + .long do_IRQ ! TMU1 tuni1 + .long do_IRQ ! TMU2 tuni2 + .long do_IRQ ! ticpi2 +#if defined(CONFIG_CPU_SUBTYPE_SH7760) + .long exception_error + .long exception_error + .long exception_error + .long exception_error + .long exception_error /* 500 */ + .long exception_error + .long exception_error +#else + .long do_IRQ ! RTC ati + .long do_IRQ ! pri + .long do_IRQ ! cui + .long do_IRQ ! SCI eri + .long do_IRQ ! rxi /* 500 */ + .long do_IRQ ! txi + .long do_IRQ ! tei +#endif + .long do_IRQ ! WDT iti /* 560 */ + .long do_IRQ ! REF rcmi + .long do_IRQ ! rovi + .long do_IRQ + .long do_IRQ /* 5E0 */ + .long do_IRQ ! 32 Hitachi UDI /* 600 */ + .long do_IRQ ! 33 GPIO + .long do_IRQ ! 34 DMAC dmte0 + .long do_IRQ ! 35 dmte1 + .long do_IRQ ! 36 dmte2 + .long do_IRQ ! 37 dmte3 + .long do_IRQ ! 38 dmae + .long exception_error ! 39 /* 6E0 */ +#if defined(CONFIG_CPU_SUBTYPE_SH7760) + .long exception_error /* 700 */ + .long exception_error + .long exception_error + .long exception_error /* 760 */ +#else + .long do_IRQ ! 40 SCIF eri /* 700 */ + .long do_IRQ ! 41 rxi + .long do_IRQ ! 42 bri + .long do_IRQ ! 43 txi +#endif +#if CONFIG_NR_ONCHIP_DMA_CHANNELS == 8 + .long do_IRQ ! 44 DMAC dmte4 /* 780 */ + .long do_IRQ ! 45 dmte5 + .long do_IRQ ! 46 dmte6 + .long do_IRQ ! 47 dmte7 /* 7E0 */ +#else + .long exception_error ! 44 /* 780 */ + .long exception_error ! 45 + .long exception_error ! 46 + .long exception_error ! 47 +#endif + .long do_fpu_state_restore ! 48 /* 800 */ + .long do_fpu_state_restore ! 49 /* 820 */ +#if defined(CONFIG_CPU_SUBTYPE_SH7751) + .long exception_error /* 840 */ + .long exception_error + .long exception_error + .long exception_error + .long exception_error + .long exception_error + .long exception_error /* 900 */ + .long exception_error + .long exception_error + .long exception_error + .long exception_error + .long exception_error + .long exception_error + .long exception_error + .long do_IRQ ! PCI serr /* A00 */ + .long do_IRQ ! dma3 + .long do_IRQ ! dma2 + .long do_IRQ ! dma1 + .long do_IRQ ! dma0 + .long do_IRQ ! pwon + .long do_IRQ ! pwdwn + .long do_IRQ ! err + .long do_IRQ ! TMU3 tuni3 /* B00 */ + .long exception_error + .long exception_error + .long exception_error + .long do_IRQ ! TMU4 tuni4 /* B80 */ +#elif defined(CONFIG_CPU_SUBTYPE_SH7760) + .long do_IRQ ! IRQ irq6 /* 840 */ + .long do_IRQ ! irq7 + .long do_IRQ ! SCIF eri0 + .long do_IRQ ! rxi0 + .long do_IRQ ! bri0 + .long do_IRQ ! txi0 + .long do_IRQ ! HCAN2 cani0 /* 900 */ + .long do_IRQ ! cani1 + .long do_IRQ ! SSI ssii0 + .long do_IRQ ! ssii1 + .long do_IRQ ! HAC haci0 + .long do_IRQ ! haci1 + .long do_IRQ ! IIC iici0 + .long do_IRQ ! iici1 + .long do_IRQ ! USB usbi /* A00 */ + .long do_IRQ ! LCDC vint + .long exception_error + .long exception_error + .long do_IRQ ! DMABRG dmabrgi0 + .long do_IRQ ! dmabrgi1 + .long do_IRQ ! dmabrgi2 + .long exception_error + .long do_IRQ ! SCIF eri1 /* B00 */ + .long do_IRQ ! rxi1 + .long do_IRQ ! bri1 + .long do_IRQ ! txi1 + .long do_IRQ ! eri2 + .long do_IRQ ! rxi2 + .long do_IRQ ! bri2 + .long do_IRQ ! txi2 + .long do_IRQ ! SIM simeri /* C00 */ + .long do_IRQ ! simrxi + .long do_IRQ ! simtxi + .long do_IRQ ! simtei + .long do_IRQ ! HSPI spii + .long exception_error + .long exception_error + .long exception_error + .long do_IRQ ! MMCIF mmci0 /* D00 */ + .long do_IRQ ! mmci1 + .long do_IRQ ! mmci2 + .long do_IRQ ! mmci3 + .long exception_error + .long exception_error + .long exception_error + .long exception_error + .long exception_error /* E00 */ + .long exception_error + .long exception_error + .long exception_error + .long do_IRQ ! MFI mfii + .long exception_error + .long exception_error + .long exception_error + .long exception_error /* F00 */ + .long exception_error + .long exception_error + .long exception_error + .long do_IRQ ! ADC adi + .long do_IRQ ! CMT cmti /* FA0 */ +#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) + .long exception_error ! 50 0x840 + .long exception_error ! 51 0x860 + .long exception_error ! 52 0x880 + .long exception_error ! 53 0x8a0 + .long exception_error ! 54 0x8c0 + .long exception_error ! 55 0x8e0 + .long exception_error ! 56 0x900 + .long exception_error ! 57 0x920 + .long exception_error ! 58 0x940 + .long exception_error ! 59 0x960 + .long exception_error ! 60 0x980 + .long exception_error ! 61 0x9a0 + .long exception_error ! 62 0x9c0 + .long exception_error ! 63 0x9e0 + .long do_IRQ ! 64 0xa00 PCI serr + .long do_IRQ ! 65 0xa20 err + .long do_IRQ ! 66 0xa40 ad + .long do_IRQ ! 67 0xa60 pwr_dwn + .long exception_error ! 68 0xa80 + .long exception_error ! 69 0xaa0 + .long exception_error ! 70 0xac0 + .long exception_error ! 71 0xae0 + .long do_IRQ ! 72 0xb00 DMA INT0 + .long do_IRQ ! 73 0xb20 INT1 + .long do_IRQ ! 74 0xb40 INT2 + .long do_IRQ ! 75 0xb60 INT3 + .long do_IRQ ! 76 0xb80 INT4 + .long exception_error ! 77 0xba0 + .long do_IRQ ! 78 0xbc0 DMA ERR + .long exception_error ! 79 0xbe0 + .long do_IRQ ! 80 0xc00 PIO0 + .long do_IRQ ! 81 0xc20 PIO1 + .long do_IRQ ! 82 0xc40 PIO2 + .long exception_error ! 83 0xc60 + .long exception_error ! 84 0xc80 + .long exception_error ! 85 0xca0 + .long exception_error ! 86 0xcc0 + .long exception_error ! 87 0xce0 + .long exception_error ! 88 0xd00 + .long exception_error ! 89 0xd20 + .long exception_error ! 90 0xd40 + .long exception_error ! 91 0xd60 + .long exception_error ! 92 0xd80 + .long exception_error ! 93 0xda0 + .long exception_error ! 94 0xdc0 + .long exception_error ! 95 0xde0 + .long exception_error ! 96 0xe00 + .long exception_error ! 97 0xe20 + .long exception_error ! 98 0xe40 + .long exception_error ! 99 0xe60 + .long exception_error ! 100 0xe80 + .long exception_error ! 101 0xea0 + .long exception_error ! 102 0xec0 + .long exception_error ! 103 0xee0 + .long exception_error ! 104 0xf00 + .long exception_error ! 105 0xf20 + .long exception_error ! 106 0xf40 + .long exception_error ! 107 0xf60 + .long exception_error ! 108 0xf80 + .long exception_error ! 109 0xfa0 + .long exception_error ! 110 0xfc0 + .long exception_error ! 111 0xfe0 + .long do_IRQ ! 112 0x1000 Mailbox + .long exception_error ! 113 0x1020 + .long exception_error ! 114 0x1040 + .long exception_error ! 115 0x1060 + .long exception_error ! 116 0x1080 + .long exception_error ! 117 0x10a0 + .long exception_error ! 118 0x10c0 + .long exception_error ! 119 0x10e0 + .long exception_error ! 120 0x1100 + .long exception_error ! 121 0x1120 + .long exception_error ! 122 0x1140 + .long exception_error ! 123 0x1160 + .long exception_error ! 124 0x1180 + .long exception_error ! 125 0x11a0 + .long exception_error ! 126 0x11c0 + .long exception_error ! 127 0x11e0 + .long exception_error ! 128 0x1200 + .long exception_error ! 129 0x1220 + .long exception_error ! 130 0x1240 + .long exception_error ! 131 0x1260 + .long exception_error ! 132 0x1280 + .long exception_error ! 133 0x12a0 + .long exception_error ! 134 0x12c0 + .long exception_error ! 135 0x12e0 + .long exception_error ! 136 0x1300 + .long exception_error ! 137 0x1320 + .long exception_error ! 138 0x1340 + .long exception_error ! 139 0x1360 + .long do_IRQ ! 140 0x1380 EMPI INV_ADDR + .long exception_error ! 141 0x13a0 + .long exception_error ! 142 0x13c0 + .long exception_error ! 143 0x13e0 +#endif + diff -puN arch/sh/kernel/cpu/sh4/fpu.c~sh-merge arch/sh/kernel/cpu/sh4/fpu.c --- 25/arch/sh/kernel/cpu/sh4/fpu.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/cpu/sh4/fpu.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: fpu.c,v 1.2 2003/05/04 19:29:54 lethal Exp $ +/* $Id: fpu.c,v 1.3 2003/09/23 23:15:44 lethal Exp $ * * linux/arch/sh/kernel/fpu.c * @@ -18,6 +18,14 @@ #include #include +/* The PR (precision) bit in the FP Status Register must be clear when + * an frchg instruction is executed, otherwise the instruction is undefined. + * Executing frchg with PR set causes a trap on some SH4 implementations. + */ + +#define FPSCR_RCHG 0x00000000 + + /* * Save FPU registers onto task structure. * Assume called with FPU enabled (SR.FD=0). @@ -61,9 +69,11 @@ save_fpu(struct task_struct *tsk) "fmov.s fr3, @-%0\n\t" "fmov.s fr2, @-%0\n\t" "fmov.s fr1, @-%0\n\t" - "fmov.s fr0, @-%0" + "fmov.s fr0, @-%0\n\t" + "lds %2, fpscr\n\t" : /* no output */ : "r" ((char *)(&tsk->thread.fpu.hard.status)), + "r" (FPSCR_RCHG), "r" (FPSCR_INIT) : "memory"); @@ -112,7 +122,7 @@ restore_fpu(struct task_struct *tsk) "lds.l @%0+, fpscr\n\t" "lds.l @%0+, fpul\n\t" : /* no output */ - : "r" (&tsk->thread.fpu), "r" (FPSCR_INIT) + : "r" (&tsk->thread.fpu), "r" (FPSCR_RCHG) : "memory"); } @@ -160,9 +170,10 @@ fpu_init(void) "fsts fpul, fr13\n\t" "fsts fpul, fr14\n\t" "fsts fpul, fr15\n\t" - "frchg" + "frchg\n\t" + "lds %2, fpscr\n\t" : /* no output */ - : "r" (0), "r" (FPSCR_INIT)); + : "r" (0), "r" (FPSCR_RCHG), "r" (FPSCR_INIT)); } /** diff -puN arch/sh/kernel/cpu/sh4/Makefile~sh-merge arch/sh/kernel/cpu/sh4/Makefile --- 25/arch/sh/kernel/cpu/sh4/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/cpu/sh4/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -2,13 +2,8 @@ # Makefile for the Linux/SuperH SH-4 backends. # -obj-y := fpu.o +obj-y := fpu.o ex.o obj-$(CONFIG_CPU_SUBTYPE_ST40STB1) += irq_intc2.o -obj-$(CONFIG_CPU_SUBTYPE_SH7751) += irq_intc2.o - -ifeq ($(CONFIG_PCI),y) -obj-$(CONFIG_CPU_SUBTYPE_ST40STB1) += pci-st40.o -obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o -endif +obj-$(CONFIG_SH_STORE_QUEUES) += sq.o diff -puN -L arch/sh/kernel/cpu/sh4/pci-sh7751.c arch/sh/kernel/cpu/sh4/pci-sh7751.c~sh-merge /dev/null --- 25/arch/sh/kernel/cpu/sh4/pci-sh7751.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,503 +0,0 @@ -/* - * Low-Level PCI Support for the SH7751 - * - * Dustin McIntire (dustin@sensoria.com) - * Derived from arch/i386/kernel/pci-*.c which bore the message: - * (c) 1999--2000 Martin Mares - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -struct pci_ops *pci_check_direct(void); -void pcibios_resource_survey(void); -static u8 pcibios_swizzle(struct pci_dev *dev, u8 *pin); -static int pcibios_lookup_irq(struct pci_dev *dev, u8 slot, u8 pin); - -unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1; -int pcibios_last_bus = -1; -struct pci_bus *pci_root_bus; -struct pci_ops *pci_root_ops; - -/* - * Direct access to PCI hardware... - */ - -#ifdef CONFIG_PCI_DIRECT - - -#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3)) - -#define PCI_REG(reg) (SH7751_PCIREG_BASE+reg) - -/* - * Functions for accessing PCI configuration space with type 1 accesses - */ -static int pci_conf1_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) -{ - unsigned long flags; - u32 word; - - /* - * PCIPDR may only be accessed as 32 bit words, - * so we must do byte alignment by hand - */ - local_irq_save(flags); - outl(CONFIG_CMD(bus,devfn,where), PCI_REG(SH7751_PCIPAR)); - word = inl(PCI_REG(SH7751_PCIPDR)); - local_irq_restore(flags); - - switch (size) { - case 1: - switch (where & 0x3) { - case 3: *value = (u8)(word >> 24); break; - case 2: *value = (u8)(word >> 16); break; - case 1: *value = (u8)(word >> 8); break; - } - break; - case 2: - switch (where & 0x2) { - case 2: *value = (u16)(word >> 16); break; - case 1: *value = (u16)(word >> 8); break; - } - break; - case 4: - *value = word; - break; - } - - PCIDBG(4,"pci_conf1_read@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),*value); - - return PCIBIOS_SUCCESSFUL; -} - -/* - * Since SH7751 only does 32bit access we'll have to do a read,mask,write operation. - * We'll allow an odd byte offset, though it should be illegal. - */ -static int pci_conf1_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) -{ - u32 word,mask; - unsigned long flags; - u32 shift = (where & 3) * 8; - - if(size == 1) { - mask = ((1 << 8) - 1) << shift; // create the byte mask - } else if(size == 2){ - if(shift == 24) - return PCIBIOS_BAD_REGISTER_NUMBER; - mask = ((1 << 16) - 1) << shift; // create the word mask - } - - local_irq_save(flags); - outl(CONFIG_CMD(bus,devfn,where), PCI_REG(SH7751_PCIPAR)); - - if(size == 4){ - outl(value, PCI_REG(SH7751_PCIPDR)); - local_irq_restore(flags); - - PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),value); - - return PCIBIOS_SUCCESSFUL; - } - - word = inl(PCI_REG(SH7751_PCIPDR)) ; - word &= ~mask; - word |= value << shift; - outl(word, PCI_REG(SH7751_PCIPDR)); - local_irq_restore(flags); - - PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),word); - - return PCIBIOS_SUCCESSFUL; -} - -#undef CONFIG_CMD - -static struct pci_ops pci_direct_conf1 = { - .read = pci_conf1_read, - .write = pci_conf1_write, -}; - -struct pci_ops * __init pci_check_direct(void) -{ - unsigned int tmp, id; - - /* check for SH7751 hardware */ - id = (SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID; - if(inl(SH7751_PCIREG_BASE+SH7751_PCICONF0) != id) { - PCIDBG(2,"PCI: This is not an SH7751\n"); - return NULL; - } - /* - * Check if configuration works. - */ - if (pci_probe & PCI_PROBE_CONF1) { - tmp = inl (PCI_REG(SH7751_PCIPAR)); - outl (0x80000000, PCI_REG(SH7751_PCIPAR)); - if (inl (PCI_REG(SH7751_PCIPAR)) == 0x80000000) { - outl (tmp, PCI_REG(SH7751_PCIPAR)); - printk(KERN_INFO "PCI: Using configuration type 1\n"); - request_region(PCI_REG(SH7751_PCIPAR), 8, "PCI conf1"); - return &pci_direct_conf1; - } - outl (tmp, PCI_REG(SH7751_PCIPAR)); - } - - PCIDBG(2,"PCI: pci_check_direct failed\n"); - return NULL; -} - -#endif - -/* - * BIOS32 and PCI BIOS handling. - * - * The BIOS version of the pci functions is not yet implemented but it is left - * in for completeness. Currently an error will be generated at compile time. - */ - -#ifdef CONFIG_PCI_BIOS - -#error PCI BIOS is not yet supported on SH7751 - -#endif /* CONFIG_PCI_BIOS */ - -/***************************************************************************************/ - -/* - * Handle bus scanning and fixups .... - */ - - -/* - * Discover remaining PCI buses in case there are peer host bridges. - * We use the number of last PCI bus provided by the PCI BIOS. - */ -static void __init pcibios_fixup_peer_bridges(void) -{ - int n; - struct pci_bus bus; - struct pci_dev dev; - u16 l; - - if (pcibios_last_bus <= 0 || pcibios_last_bus >= 0xff) - return; - PCIDBG(2,"PCI: Peer bridge fixup\n"); - for (n=0; n <= pcibios_last_bus; n++) { - if (pci_find_bus(0, n)) - continue; - bus.number = n; - bus.ops = pci_root_ops; - dev.bus = &bus; - for(dev.devfn=0; dev.devfn<256; dev.devfn += 8) - if (!pci_read_config_word(&dev, PCI_VENDOR_ID, &l) && - l != 0x0000 && l != 0xffff) { - PCIDBG(3,"Found device at %02x:%02x [%04x]\n", n, dev.devfn, l); - printk(KERN_INFO "PCI: Discovered peer bus %02x\n", n); - pci_scan_bus(n, pci_root_ops, NULL); - break; - } - } -} - - -static void __init pci_fixup_ide_bases(struct pci_dev *d) -{ - int i; - - /* - * PCI IDE controllers use non-standard I/O port decoding, respect it. - */ - if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) - return; - PCIDBG(3,"PCI: IDE base address fixup for %s\n", pci_name(d)); - for(i=0; i<4; i++) { - struct resource *r = &d->resource[i]; - if ((r->start & ~0x80) == 0x374) { - r->start |= 2; - r->end = r->start; - } - } -} - - -/* Add future fixups here... */ -struct pci_fixup pcibios_fixups[] = { - { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases }, - { 0 } -}; - -/* - * Called after each bus is probed, but before its children - * are examined. - */ - -void __init pcibios_fixup_bus(struct pci_bus *b) -{ - pci_read_bridge_bases(b); -} - -/* - * Initialization. Try all known PCI access methods. Note that we support - * using both PCI BIOS and direct access: in such cases, we use I/O ports - * to access config space. - * - * Note that the platform specific initialization (BSC registers, and memory - * space mapping) will be called via the machine vectors (sh_mv.mv_pci_init()) if it - * exitst and via the platform defined function pcibios_init_platform(). - * See pci_bigsur.c for implementation; - * - * The BIOS version of the pci functions is not yet implemented but it is left - * in for completeness. Currently an error will be genereated at compile time. - */ - -void __init pcibios_init(void) -{ - struct pci_ops *bios = NULL; - struct pci_ops *dir = NULL; - - PCIDBG(1,"PCI: Starting intialization.\n"); -#ifdef CONFIG_PCI_BIOS - if ((pci_probe & PCI_PROBE_BIOS) && ((bios = pci_find_bios()))) { - pci_probe |= PCI_BIOS_SORT; - pci_bios_present = 1; - } -#endif -#ifdef CONFIG_PCI_DIRECT - if (pci_probe & PCI_PROBE_CONF1 ) - dir = pci_check_direct(); -#endif - if (dir) { - pci_root_ops = dir; - if(!pcibios_init_platform()) - PCIDBG(1,"PCI: Initialization failed\n"); - if (sh_mv.mv_init_pci != NULL) - sh_mv.mv_init_pci(); - } - else if (bios) - pci_root_ops = bios; - else { - PCIDBG(1,"PCI: No PCI bus detected\n"); - return; - } - - PCIDBG(1,"PCI: Probing PCI hardware\n"); - pci_root_bus = pci_scan_bus(0, pci_root_ops, NULL); - //pci_assign_unassigned_resources(); - pci_fixup_irqs(pcibios_swizzle, pcibios_lookup_irq); - pcibios_fixup_peer_bridges(); - pcibios_resource_survey(); - -#ifdef CONFIG_PCI_BIOS - if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT)) - pcibios_sort(); -#endif -} - -char * __init pcibios_setup(char *str) -{ - if (!strcmp(str, "off")) { - pci_probe = 0; - return NULL; - } -#ifdef CONFIG_PCI_BIOS - else if (!strcmp(str, "bios")) { - pci_probe = PCI_PROBE_BIOS; - return NULL; - } else if (!strcmp(str, "nobios")) { - pci_probe &= ~PCI_PROBE_BIOS; - return NULL; - } else if (!strcmp(str, "nosort")) { - pci_probe |= PCI_NO_SORT; - return NULL; - } else if (!strcmp(str, "biosirq")) { - pci_probe |= PCI_BIOS_IRQ_SCAN; - return NULL; - } -#endif -#ifdef CONFIG_PCI_DIRECT - else if (!strcmp(str, "conf1")) { - pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS; - return NULL; - } -#endif - else if (!strcmp(str, "rom")) { - pci_probe |= PCI_ASSIGN_ROMS; - return NULL; - } else if (!strncmp(str, "lastbus=", 8)) { - pcibios_last_bus = simple_strtol(str+8, NULL, 0); - return NULL; - } - return str; -} - -/* - * Allocate the bridge and device resources - */ - -static void __init pcibios_allocate_bus_resources(struct list_head *bus_list) -{ - struct list_head *ln; - struct pci_bus *bus; - struct pci_dev *dev; - int idx; - struct resource *r, *pr; - - PCIDBG(2,"PCI: pcibios_allocate_bus_reasources called\n" ); - /* Depth-First Search on bus tree */ - for (ln=bus_list->next; ln != bus_list; ln=ln->next) { - bus = pci_bus_b(ln); - if ((dev = bus->self)) { - for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) { - r = &dev->resource[idx]; - if (!r->start) - continue; - pr = pci_find_parent_resource(dev, r); - if (!pr || request_resource(pr, r) < 0) - printk(KERN_ERR "PCI: Cannot allocate resource region %d of bridge %s\n", idx, pci_name(dev)); - } - } - pcibios_allocate_bus_resources(&bus->children); - } -} - -static void __init pcibios_allocate_resources(int pass) -{ - struct pci_dev *dev; - int idx, disabled; - u16 command; - struct resource *r, *pr; - - PCIDBG(2,"PCI: pcibios_allocate_resources pass %d called\n", pass); - pci_for_each_dev(dev) { - pci_read_config_word(dev, PCI_COMMAND, &command); - for(idx = 0; idx < 6; idx++) { - r = &dev->resource[idx]; - if (r->parent) /* Already allocated */ - continue; - if (!r->start) /* Address not assigned at all */ - continue; - if (r->flags & IORESOURCE_IO) - disabled = !(command & PCI_COMMAND_IO); - else - disabled = !(command & PCI_COMMAND_MEMORY); - if (pass == disabled) { - PCIDBG(3,"PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n", - r->start, r->end, r->flags, disabled, pass); - pr = pci_find_parent_resource(dev, r); - if (!pr || request_resource(pr, r) < 0) { - printk(KERN_ERR "PCI: Cannot allocate resource region %d of device %s\n", idx, pci_name(dev)); - /* We'll assign a new address later */ - r->end -= r->start; - r->start = 0; - } - } - } - if (!pass) { - r = &dev->resource[PCI_ROM_RESOURCE]; - if (r->flags & PCI_ROM_ADDRESS_ENABLE) { - /* Turn the ROM off, leave the resource region, but keep it unregistered. */ - u32 reg; - PCIDBG(3,"PCI: Switching off ROM of %s\n", pci_name(dev)); - r->flags &= ~PCI_ROM_ADDRESS_ENABLE; - pci_read_config_dword(dev, dev->rom_base_reg, ®); - pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE); - } - } - } -} - -static void __init pcibios_assign_resources(void) -{ - struct pci_dev *dev; - int idx; - struct resource *r; - - PCIDBG(2,"PCI: pcibios_assign_resources called\n"); - pci_for_each_dev(dev) { - int class = dev->class >> 8; - - /* Don't touch classless devices and host bridges */ - if (!class || class == PCI_CLASS_BRIDGE_HOST) - continue; - - for(idx=0; idx<6; idx++) { - r = &dev->resource[idx]; - - /* - * Don't touch IDE controllers and I/O ports of video cards! - */ - if ((class == PCI_CLASS_STORAGE_IDE && idx < 4) || - (class == PCI_CLASS_DISPLAY_VGA && (r->flags & IORESOURCE_IO))) - continue; - - /* - * We shall assign a new address to this resource, either because - * the BIOS forgot to do so or because we have decided the old - * address was unusable for some reason. - */ - if (!r->start && r->end) - pci_assign_resource(dev, idx); - } - - if (pci_probe & PCI_ASSIGN_ROMS) { - r = &dev->resource[PCI_ROM_RESOURCE]; - r->end -= r->start; - r->start = 0; - if (r->end) - pci_assign_resource(dev, PCI_ROM_RESOURCE); - } - } -} - -void __init pcibios_resource_survey(void) -{ - PCIDBG(1,"PCI: Allocating resources\n"); - pcibios_allocate_bus_resources(&pci_root_buses); - pcibios_allocate_resources(0); - pcibios_allocate_resources(1); - pcibios_assign_resources(); -} - - -/***************************************************************************************/ -/* - * IRQ functions - */ -static u8 __init pcibios_swizzle(struct pci_dev *dev, u8 *pin) -{ - /* no swizzling */ - return PCI_SLOT(dev->devfn); -} - -static int pcibios_lookup_irq(struct pci_dev *dev, u8 slot, u8 pin) -{ - int irq = -1; - - /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */ - irq = pcibios_map_platform_irq(slot,pin); - if( irq < 0 ) { - PCIDBG(3,"PCI: Error mapping IRQ on device %s\n", dev->name); - return irq; - } - - PCIDBG(2,"Setting IRQ for slot %s to %d\n", pci_name(dev), irq); - - return irq; -} diff -puN -L arch/sh/kernel/cpu/sh4/pci-st40.c arch/sh/kernel/cpu/sh4/pci-st40.c~sh-merge /dev/null --- 25/arch/sh/kernel/cpu/sh4/pci-st40.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,423 +0,0 @@ -/* - * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Support functions for the ST40 PCI hardware. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "pci-st40.h" - -/* This is in P2 of course */ -#define ST40PCI_BASE_ADDRESS (0xb0000000) -#define ST40PCI_MEM_ADDRESS (ST40PCI_BASE_ADDRESS+0x0) -#define ST40PCI_IO_ADDRESS (ST40PCI_BASE_ADDRESS+0x06000000) -#define ST40PCI_REG_ADDRESS (ST40PCI_BASE_ADDRESS+0x07000000) - -#define ST40PCI_REG(x) (ST40PCI_REG_ADDRESS+(ST40PCI_##x)) - -#define ST40PCI_WRITE(reg,val) writel((val),ST40PCI_REG(reg)) -#define ST40PCI_WRITE_SHORT(reg,val) writew((val),ST40PCI_REG(reg)) -#define ST40PCI_WRITE_BYTE(reg,val) writeb((val),ST40PCI_REG(reg)) - -#define ST40PCI_READ(reg) readl(ST40PCI_REG(reg)) -#define ST40PCI_READ_SHORT(reg) readw(ST40PCI_REG(reg)) -#define ST40PCI_READ_BYTE(reg) readb(ST40PCI_REG(reg)) - -#define ST40PCI_SERR_IRQ 64 -#define ST40PCI_SERR_INT_GROUP 0 -#define ST40PCI_SERR_INT_POS 0 -#define ST40PCI_SERR_INT_PRI 15 - -#define ST40PCI_ERR_IRQ 65 -#define ST40PCI_ERR_INT_GROUP 1 -#define ST40PCI_ERR_INT_POS 1 -#define ST40PCI_ERR_INT_PRI 14 - - -/* Macros to extract PLL params */ -#define PLL_MDIV(reg) ( ((unsigned)reg) & 0xff ) -#define PLL_NDIV(reg) ( (((unsigned)reg)>>8) & 0xff ) -#define PLL_PDIV(reg) ( (((unsigned)reg)>>16) & 0x3 ) -#define PLL_SETUP(reg) ( (((unsigned)reg)>>19) & 0x1ff ) - -/* Build up the appropriate settings */ -#define PLL_SET(mdiv,ndiv,pdiv,setup) \ -( ((mdiv)&0xff) | (((ndiv)&0xff)<<8) | (((pdiv)&3)<<16)| (((setup)&0x1ff)<<19)) - -#define PLLPCICR (0xbb040000+0x10) - -#define PLLPCICR_POWERON (1<<28) -#define PLLPCICR_OUT_EN (1<<29) -#define PLLPCICR_LOCKSELECT (1<<30) -#define PLLPCICR_LOCK (1<<31) - - -#define PLL_25MHZ 0x793c8512 -#define PLL_33MHZ PLL_SET(18,88,3,295) - - -static __init void SetPCIPLL(void) -{ - /* Stop the PLL */ - writel(0, PLLPCICR); - - /* Always run at 33Mhz. The PCI clock is totally async - * to the rest of the system - */ - writel(PLL_33MHZ | PLLPCICR_POWERON, PLLPCICR); - - printk("ST40PCI: Waiting for PCI PLL to lock\n"); - while ((readl(PLLPCICR) & PLLPCICR_LOCK) == 0); - writel(readl(PLLPCICR) | PLLPCICR_OUT_EN, PLLPCICR); -} - - -static irqreturn_t st40_pci_irq(int irq, void *dev_instance, struct pt_regs *regs) -{ - - unsigned pci_int, pci_air, pci_cir, pci_aint; - - pci_int = ST40PCI_READ(INT); - pci_cir = ST40PCI_READ(CIR); - pci_air = ST40PCI_READ(AIR); - - if (pci_int) { - printk("PCI INTERRUPT!\n"); - printk("PCI INT -> 0x%x\n", pci_int & 0xffff); - printk("PCI AIR -> 0x%x\n", pci_air); - printk("PCI CIR -> 0x%x\n", pci_cir); - ST40PCI_WRITE(INT, ~0); - } - - pci_aint = ST40PCI_READ(AINT); - if (pci_aint) { - printk("PCI ARB INTERRUPT!\n"); - printk("PCI AINT -> 0x%x\n", pci_aint); - printk("PCI AIR -> 0x%x\n", pci_air); - printk("PCI CIR -> 0x%x\n", pci_cir); - ST40PCI_WRITE(AINT, ~0); - } - - return IRQ_HANDLED; -} - - -/* Rounds a number UP to the nearest power of two. Used for - * sizing the PCI window. - */ -static u32 __init r2p2(u32 num) -{ - int i = 31; - u32 tmp = num; - - if (num == 0) - return 0; - - do { - if (tmp & (1 << 31)) - break; - i--; - tmp <<= 1; - } while (i >= 0); - - tmp = 1 << i; - /* If the original number isn't a power of 2, round it up */ - if (tmp != num) - tmp <<= 1; - - return tmp; -} - -static void __init pci_fixup_ide_bases(struct pci_dev *d) -{ - int i; - - /* - * PCI IDE controllers use non-standard I/O port decoding, respect it. - */ - if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) - return; - printk("PCI: IDE base address fixup for %s\n", pci_name(d)); - for(i=0; i<4; i++) { - struct resource *r = &d->resource[i]; - if ((r->start & ~0x80) == 0x374) { - r->start |= 2; - r->end = r->start; - } - } -} - - -/* Add future fixups here... */ -struct pci_fixup pcibios_fixups[] = { - { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases }, - { 0 } -}; - -int __init st40pci_init(unsigned memStart, unsigned memSize) -{ - u32 lsr0; - - SetPCIPLL(); - - /* Initialises the ST40 pci subsystem, performing a reset, then programming - * up the address space decoders appropriately - */ - - /* Should reset core here as well methink */ - - ST40PCI_WRITE(CR, CR_LOCK_MASK | CR_SOFT_RESET); - - /* Loop while core resets */ - while (ST40PCI_READ(CR) & CR_SOFT_RESET); - - /* Now, lets reset all the cards on the bus with extreme prejudice */ - ST40PCI_WRITE(CR, CR_LOCK_MASK | CR_RSTCTL); - udelay(250); - - /* Set bus active, take it out of reset */ - ST40PCI_WRITE(CR, CR_LOCK_MASK | CR_CFINT | CR_PFCS | CR_PFE); - - /* The PCI spec says that no access must be made to the bus until 1 second - * after reset. This seem ludicrously long, but some delay is needed here - */ - mdelay(1000); - - /* Switch off interrupts */ - ST40PCI_WRITE(INTM, 0); - ST40PCI_WRITE(AINT, 0); - - /* Allow it to be a master */ - - ST40PCI_WRITE_SHORT(CSR_CMD, - PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | - PCI_COMMAND_IO); - - /* Accesse to the 0xb0000000 -> 0xb6000000 area will go through to 0x10000000 -> 0x16000000 - * on the PCI bus. This allows a nice 1-1 bus to phys mapping. - */ - - - ST40PCI_WRITE(MBR, 0x10000000); - /* Always set the max size 128M (actually, it is only 96MB wide) */ - ST40PCI_WRITE(MBMR, 0x07ff0000); - - /* I/O addresses are mapped at 0xb6000000 -> 0xb7000000. These are changed to 0, to - * allow cards that have legacy io such as vga to function correctly. This gives a - * maximum of 64K of io/space as only the bottom 16 bits of the address are copied - * over to the bus when the transaction is made. 64K of io space is more than enough - */ - ST40PCI_WRITE(IOBR, 0x0); - /* Set up the 64K window */ - ST40PCI_WRITE(IOBMR, 0x0); - - /* Now we set up the mbars so the PCI bus can see the memory of the machine */ - - if (memSize < (64 * 1024)) { - printk("Ridiculous memory size of 0x%x?\n",memSize); - return 0; - } - - lsr0 = - (memSize > - (512 * 1024 * 1024)) ? 0x1fff0001 : ((r2p2(memSize) - - 0x10000) | 0x1); - - ST40PCI_WRITE(LSR0, lsr0); - - ST40PCI_WRITE(CSR_MBAR0, memStart); - ST40PCI_WRITE(LAR0, memStart); - - /* Maximise timeout values */ - ST40PCI_WRITE_BYTE(CSR_TRDY, 0xff); - ST40PCI_WRITE_BYTE(CSR_RETRY, 0xff); - ST40PCI_WRITE_BYTE(CSR_MIT, 0xff); - - - /* Install the pci interrupt handlers */ - make_intc2_irq(ST40PCI_SERR_IRQ, INTC2_BASE0, - ST40PCI_SERR_INT_GROUP, ST40PCI_SERR_INT_POS, - ST40PCI_SERR_INT_PRI); - - make_intc2_irq(ST40PCI_ERR_IRQ, INTC2_BASE0, ST40PCI_ERR_INT_GROUP, - ST40PCI_ERR_INT_POS, ST40PCI_ERR_INT_PRI); - - - return 1; -} - -char * __init pcibios_setup(char *str) -{ - return str; -} - - -#define SET_CONFIG_BITS(bus,devfn,where)\ - (((bus) << 16) | ((devfn) << 8) | ((where) & ~3) | (bus!=0)) - -#define CONFIG_CMD(bus, devfn, where) SET_CONFIG_BITS(bus->number,devfn,where) - - -static int CheckForMasterAbort(void) -{ - if (ST40PCI_READ(INT) & INT_MADIM) { - /* Should we clear config space version as well ??? */ - ST40PCI_WRITE(INT, INT_MADIM); - ST40PCI_WRITE_SHORT(CSR_STATUS, 0); - return 1; - } - - return 0; -} - -/* Write to config register */ -static int st40pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val) -{ - ST40PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); - switch (size) { - case 1: - *val = (u8)ST40PCI_READ_BYTE(PDR + (where & 3)); - break; - case 2: - *val = (u16)ST40PCI_READ_SHORT(PDR + (where & 2)); - break; - case 4: - *val = ST40PCI_READ(PDR); - break; - } - - if (CheckForMasterAbort()){ - switch (size) { - case 1: - *val = (u8)0xff; - break; - case 2: - *val = (u16)0xffff; - break; - case 4: - *val = 0xffffffff; - break; - } - } - - return PCIBIOS_SUCCESSFUL; -} - -static int st40pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) -{ - ST40PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); - - switch (size) { - case 1: - ST40PCI_WRITE_BYTE(PDR + (where & 3), (u8)val); - break; - case 2: - ST40PCI_WRITE_SHORT(PDR + (where & 2), (u16)val); - break; - case 4: - ST40PCI_WRITE(PDR, val); - break; - } - - CheckForMasterAbort(); - - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops pci_config_ops = { - .read = st40pci_read, - .write = st40pci_write, -}; - - -/* Everything hangs off this */ -static struct pci_bus *pci_root_bus; - - -static u8 __init no_swizzle(struct pci_dev *dev, u8 * pin) -{ - return PCI_SLOT(dev->devfn); -} - - -/* This needs to be shunted out of here into the board specific bit */ -#define HARP_PCI_IRQ 1 -#define HARP_BRIDGE_IRQ 2 -#define OVERDRIVE_SLOT0_IRQ 0 - -static int __init map_harp_irq(struct pci_dev *dev, u8 slot, u8 pin) -{ - switch (slot) { -#ifdef CONFIG_SH_STB1_HARP - case 2: /*This is the PCI slot on the */ - return HARP_PCI_IRQ; - case 1: /* this is the bridge */ - return HARP_BRIDGE_IRQ; -#elif defined(CONFIG_SH_STB1_OVERDRIVE) - case 1: - case 2: - case 3: - return slot - 1; -#else -#error Unknown board -#endif - default: - return -1; - } -} - -void __init pcibios_init(void) -{ - extern unsigned long memory_start, memory_end; - - if (sh_mv.mv_init_pci != NULL) { - sh_mv.mv_init_pci(); - } - - /* The pci subsytem needs to know where memory is and how much - * of it there is. I've simply made these globals. A better mechanism - * is probably needed. - */ - st40pci_init(PHYSADDR(memory_start), - PHYSADDR(memory_end) - PHYSADDR(memory_start)); - - if (request_irq(ST40PCI_ERR_IRQ, st40_pci_irq, - SA_INTERRUPT, "st40pci", NULL)) { - printk(KERN_ERR "st40pci: Cannot hook interrupt\n"); - return; - } - - /* Enable the PCI interrupts on the device */ - ST40PCI_WRITE(INTM, ~0); - ST40PCI_WRITE(AINT, ~0); - - /* Map the io address apprioately */ -#ifdef CONFIG_HD64465 - hd64465_port_map(PCIBIOS_MIN_IO, (64 * 1024) - PCIBIOS_MIN_IO + 1, - ST40_IO_ADDR + PCIBIOS_MIN_IO, 0); -#endif - - /* ok, do the scan man */ - pci_root_bus = pci_scan_bus(0, &pci_config_ops, NULL); - pci_assign_unassigned_resources(); - pci_fixup_irqs(no_swizzle, map_harp_irq); - -} - -void __init pcibios_fixup_bus(struct pci_bus *bus) -{ -} diff -puN -L arch/sh/kernel/cpu/sh4/pci-st40.h arch/sh/kernel/cpu/sh4/pci-st40.h~sh-merge /dev/null --- 25/arch/sh/kernel/cpu/sh4/pci-st40.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,66 +0,0 @@ -/* - * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Defintions for the ST40 PCI hardware. - */ - -#ifndef __PCI_ST40_H__ -#define __PCI_ST40_H__ - -#define ST40PCI_VCR_STATUS 0x00 - -#define ST40PCI_VCR_VERSION 0x08 - -#define ST40PCI_CR 0x10 - -#define CR_SOFT_RESET (1<<12) -#define CR_PFCS (1<<11) -#define CR_PFE (1<<9) -#define CR_BMAM (1<<6) -#define CR_HOST (1<<5) -#define CR_CLKEN (1<<4) -#define CR_SOCS (1<<3) -#define CR_IOCS (1<<2) -#define CR_RSTCTL (1<<1) -#define CR_CFINT (1<<0) -#define CR_LOCK_MASK 0x5a000000 - - -#define ST40PCI_LSR0 0X14 -#define ST40PCI_LAR0 0x1c - -#define ST40PCI_INT 0x24 -#define INT_MADIM (1<<2) - - -#define ST40PCI_INTM 0x28 -#define ST40PCI_AIR 0x2c -#define ST40PCI_CIR 0x30 -#define ST40PCI_AINT 0x40 -#define ST40PCI_AINTM 0x44 -#define ST40PCI_BMIR 0x48 -#define ST40PCI_PAR 0x4c -#define ST40PCI_MBR 0x50 -#define ST40PCI_IOBR 0x54 -#define ST40PCI_PINT 0x58 -#define ST40PCI_PINTM 0x5c -#define ST40PCI_MBMR 0x70 -#define ST40PCI_IOBMR 0x74 -#define ST40PCI_PDR 0x78 - -/* These are configs space registers */ -#define ST40PCI_CSR_VID 0x10000 -#define ST40PCI_CSR_DID 0x10002 -#define ST40PCI_CSR_CMD 0x10004 -#define ST40PCI_CSR_STATUS 0x10006 -#define ST40PCI_CSR_MBAR0 0x10010 -#define ST40PCI_CSR_TRDY 0x10040 -#define ST40PCI_CSR_RETRY 0x10041 -#define ST40PCI_CSR_MIT 0x1000d - -#define ST40_IO_ADDR 0xb6000000 - -#endif /* __PCI_ST40_H__ */ diff -puN /dev/null arch/sh/kernel/cpu/sh4/sq.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/kernel/cpu/sh4/sq.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,484 @@ +/* + * arch/sh/kernel/cpu/sq.c + * + * General management API for SH-4 integrated Store Queues + * + * Copyright (C) 2001, 2002, 2003 Paul Mundt + * Copyright (C) 2001, 2002 M. R. Brown + * + * Some of this code has been adopted directly from the old arch/sh/mm/sq.c + * hack that was part of the LinuxDC project. For all intensive purposes, this + * is a completely new interface that really doesn't have much in common with + * the old zone-based approach at all. Infact, I'm only listing it here for + * general completeness. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +static LIST_HEAD(sq_mapping_list); + +/** + * sq_flush - Flush (prefetch) the store queue cache + * + * @addr: the store queue address to flush + * + * Executes a prefetch instruction on the specified store queue cache, + * so that the cached data is written to physical memory. + */ +inline void sq_flush(void *addr) +{ + __asm__ __volatile__ ("pref @%0": "=r" (addr) : : "memory"); +} + +/** + * sq_flush_range - Flush (prefetch) a specific SQ range + * + * @start: the store queue address to start flushing from + * @len: the length to flush + * + * Flushes the store queue cache from @start to @start + @len in a + * linear fashion. + */ +void sq_flush_range(unsigned long start, unsigned int len) +{ + volatile unsigned long *sq = (unsigned long *)start; + + /* Flush the queues */ + for (len >>= 5; len--; sq += 8) + sq_flush((void *)sq); + + /* Wait for completion */ + sq = (volatile unsigned long *)start; +} + +static struct sq_mapping *__sq_alloc_mapping(unsigned long virt, unsigned long phys, unsigned long size, const char *name) +{ + struct sq_mapping *map; + + if (virt + size > SQ_ADDRMAX) + return ERR_PTR(-ENOSPC); + + map = kmalloc(sizeof(struct sq_mapping), GFP_KERNEL); + if (!map) + return ERR_PTR(-ENOMEM); + + INIT_LIST_HEAD(&map->list); + + map->sq_addr = virt; + map->addr = phys; + map->size = size; + map->name = name; + + list_add(&map->list, &sq_mapping_list); + + return map; +} + +static unsigned long __sq_get_next_addr(void) +{ + if (!list_empty(&sq_mapping_list)) { + struct list_head *pos, *tmp; + + /* + * Read one off the list head, as it will have the highest + * mapped allocation. Set the next one up right above it. + * + * This is somewhat sub-optimal, as we don't look at + * gaps between allocations or anything lower then the + * highest-level allocation. + * + * However, in the interest of performance and the general + * lack of desire to do constant list rebalancing, we don't + * worry about it. + */ + list_for_each_safe(pos, tmp, &sq_mapping_list) { + struct sq_mapping *entry; + + entry = list_entry(pos, typeof(*entry), list); + + return entry->sq_addr + entry->size; + } + } + + return P4SEG_STORE_QUE; +} + +/** + * __sq_remap - Perform a translation from the SQ to a phys addr + * + * @phys: Physical address to map store queues too. + * @virt: Associated store queue address. + * + * Maps the store queue address @virt to the physical address @phys. + */ +static struct sq_mapping *__sq_remap(struct sq_mapping *map) +{ + /* + * First check the MMU status.. + */ +#ifndef CONFIG_MMU + /* + * Without an MMU (or with it turned off), this is much more + * straightforward, as we can just load up each queue's QACR with + * the physical address appropriately masked. + */ + ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0); + ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1); +#else + unsigned long flags, pteh, ptel; + pgprot_t pgprot; + pgd_t *pgd; + pmd_t *pmd; + pte_t *pte; + + /* + * With an MMU on the other hand, things are slightly more involved. + * Namely, we have to have a direct mapping between the SQ addr and + * the associated physical address in the UTLB by way of setting up + * a virt<->phys translation by hand. We do this by simply specifying + * the SQ addr in UTLB.VPN and the associated physical address in + * UTLB.PPN. + * + * Notably, even though this is a special case translation, and some + * of the configuration bits are meaningless, we're still required + * to have a valid ASID context in PTEH. + * + * We could also probably get by without explicitly setting PTEA, but + * we do it here just for good measure. + */ + local_irq_save(flags); + + pteh = map->sq_addr; + ctrl_outl((pteh & MMU_VPN_MASK) | get_asid(), MMU_PTEH); + + ptel = map->addr & PAGE_MASK; + ctrl_outl(((ptel >> 28) & 0xe) | (ptel & 0x1), MMU_PTEA); + + pgprot = pgprot_noncached(PAGE_KERNEL); + + ptel &= _PAGE_FLAGS_HARDWARE_MASK; + ptel |= pgprot_val(pgprot); + ctrl_outl(ptel, MMU_PTEL); + + __asm__ __volatile__ ("ldtlb" : : : "memory"); + + /* + * Next, we need to map ourselves in the kernel page table, so that + * future accesses after a TLB flush will be handled when we take a + * page fault. + * + * Theoretically we could just do this directly and not worry about + * setting up the translation by hand ahead of time, but for the + * cases where we want a one-shot SQ mapping followed by a quick + * writeout before we hit the TLB flush, we do it anyways. This way + * we at least save ourselves the initial page fault overhead. + */ + pgd = pgd_offset_k(map->sq_addr); + + spin_lock(&init_mm.page_table_lock); + + pmd = pmd_alloc(&init_mm, pgd, map->sq_addr); + if (!pmd) + goto out; + + pte = pte_alloc_map(&init_mm, pmd, map->sq_addr); + if (!pte) + goto out; + if (!pte_none(*pte)) { + pte_unmap(pte); + goto out; + } + + set_pte(pte, mk_pte(phys_to_page(map->addr), pgprot)); + pte_unmap(pte); + +out: + spin_unlock(&init_mm.page_table_lock); + sq_flush((void *)pteh); + + local_irq_restore(flags); + +#endif /* CONFIG_MMU */ + + return map; +} + +/** + * sq_remap - Map a physical address through the Store Queues + * + * @phys: Physical address of mapping. + * @size: Length of mapping. + * @name: User invoking mapping. + * + * Remaps the physical address @phys through the next available store queue + * address of @size length. @name is logged at boot time as well as through + * the procfs interface. + * + * A pre-allocated and filled sq_mapping pointer is returned, and must be + * cleaned up with a call to sq_unmap() when the user is done with the + * mapping. + */ +struct sq_mapping *sq_remap(unsigned long phys, unsigned int size, const char *name) +{ + struct sq_mapping *map; + unsigned long virt; + unsigned int psz; + + phys &= PAGE_MASK; + + virt = __sq_get_next_addr(); + psz = (size + (PAGE_SIZE - 1)) / PAGE_SIZE; + map = __sq_alloc_mapping(virt, phys, size, name); + + printk("sqremap: %15s [%4d page%s] va 0x%08lx pa 0x%08lx\n", + map->name ? map->name : "???", + psz, psz == 1 ? " " : "s", + map->sq_addr, map->addr); + + return __sq_remap(map); +} + +/** + * sq_unmap - Unmap a Store Queue allocation + * + * @map: Pre-allocated Store Queue mapping. + * + * Unmaps the store queue allocation @map that was previously created by + * sq_remap(). Also frees up the pte that was previously inserted into + * the kernel page table and discards the UTLB translation. + */ +void sq_unmap(struct sq_mapping *map) +{ +#ifdef CONFIG_MMU + pgd_t *pgd; + pmd_t *pmd; + pte_t *pte; + + pgd = pgd_offset_k(map->sq_addr); + pmd = pmd_offset(pgd, map->sq_addr); + + if (pmd_none(*pmd)) + return; + if (pmd_bad(*pmd)) { + pmd_ERROR(*pmd); + pmd_clear(pmd); + return; + } + + pte = pte_offset_kernel(pmd, map->sq_addr); + if (pte_none(*pte) || pte_not_present(*pte)) + return; + + ptep_get_and_clear(pte); + + __flush_tlb_page(get_asid(), map->sq_addr & PAGE_MASK); +#endif + + list_del(&map->list); + kfree(map); +} + +/** + * sq_clear - Clear a store queue range + * + * @addr: Address to start clearing from. + * @len: Length to clear. + * + * A quick zero-fill implementation for clearing out memory that has been + * remapped through the store queues. + */ +void sq_clear(unsigned long addr, unsigned int len) +{ + int i; + + /* Clear out both queues linearly */ + for (i = 0; i < 8; i++) { + ctrl_outl(0, addr + i + 0); + ctrl_outl(0, addr + i + 8); + } + + sq_flush_range(addr, len); +} + +/** + * sq_vma_unmap - Unmap a VMA range + * + * @area: VMA containing range. + * @addr: Start of range. + * @len: Length of range. + * + * Searches the sq_mapping_list for a mapping matching the sq addr @addr, + * and subsequently frees up the entry. Further cleanup is done by generic + * code. + */ +static void sq_vma_unmap(struct vm_area_struct *area, + unsigned long addr, size_t len) +{ + struct list_head *pos, *tmp; + + list_for_each_safe(pos, tmp, &sq_mapping_list) { + struct sq_mapping *entry; + + entry = list_entry(pos, typeof(*entry), list); + + if (entry->sq_addr == addr) { + /* + * We could probably get away without doing the tlb flush + * here, as generic code should take care of most of this + * when unmapping the rest of the VMA range for us. Leave + * it in for added sanity for the time being.. + */ + __flush_tlb_page(get_asid(), entry->sq_addr & PAGE_MASK); + + list_del(&entry->list); + kfree(entry); + + return; + } + } +} + +/** + * sq_vma_sync - Sync a VMA range + * + * @area: VMA containing range. + * @start: Start of range. + * @len: Length of range. + * @flags: Additional flags. + * + * Synchronizes an sq mapped range by flushing the store queue cache for + * the duration of the mapping. + * + * Used internally for user mappings, which must use msync() to prefetch + * the store queue cache. + */ +static int sq_vma_sync(struct vm_area_struct *area, + unsigned long start, size_t len, unsigned int flags) +{ + sq_flush_range(start, len); + + return 0; +} + +static struct vm_operations_struct sq_vma_ops = { + .unmap = sq_vma_unmap, + .sync = sq_vma_sync, +}; + +/** + * sq_mmap - mmap() for /dev/cpu/sq + * + * @file: unused. + * @vma: VMA to remap. + * + * Remap the specified vma @vma through the store queues, and setup associated + * information for the new mapping. Also build up the page tables for the new + * area. + */ +static int sq_mmap(struct file *file, struct vm_area_struct *vma) +{ + unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; + unsigned long size = vma->vm_end - vma->vm_start; + struct sq_mapping *map; + + /* + * We're not interested in any arbitrary virtual address that has + * been stuck in the VMA, as we already know what addresses we + * want. Save off the size, and reposition the VMA to begin at + * the next available sq address. + */ + vma->vm_start = __sq_get_next_addr(); + vma->vm_end = vma->vm_start + size; + + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + vma->vm_flags |= VM_IO | VM_RESERVED; + + map = __sq_alloc_mapping(vma->vm_start, offset, size, "Userspace"); + + if (io_remap_page_range(vma, map->sq_addr, map->addr, + size, vma->vm_page_prot)) + return -EAGAIN; + + vma->vm_ops = &sq_vma_ops; + + return 0; +} + +#ifdef CONFIG_PROC_FS +static int sq_mapping_read_proc(char *buf, char **start, off_t off, + int len, int *eof, void *data) +{ + struct list_head *pos; + char *p = buf; + + list_for_each_prev(pos, &sq_mapping_list) { + struct sq_mapping *entry; + + entry = list_entry(pos, typeof(*entry), list); + + p += sprintf(p, "%08lx-%08lx [%08lx]: %s\n", entry->sq_addr, + entry->sq_addr + entry->size - 1, entry->addr, + entry->name); + } + + return p - buf; +} +#endif + +static struct file_operations sq_fops = { + .owner = THIS_MODULE, + .mmap = sq_mmap, +}; + +static struct miscdevice sq_dev = { + .minor = STORE_QUEUE_MINOR, + .name = "sq", + .devfs_name = "cpu/sq", + .fops = &sq_fops, +}; + +static int __init sq_api_init(void) +{ + printk(KERN_NOTICE "sq: Registering store queue API.\n"); + +#ifdef CONFIG_PROC_FS + create_proc_read_entry("sq_mapping", 0, 0, sq_mapping_read_proc, 0); +#endif + + return misc_register(&sq_dev); +} + +static void __exit sq_api_exit(void) +{ + misc_deregister(&sq_dev); +} + +module_init(sq_api_init); +module_exit(sq_api_exit); + +MODULE_AUTHOR("Paul Mundt , M. R. Brown "); +MODULE_DESCRIPTION("Simple API for SH-4 integrated Store Queues"); +MODULE_LICENSE("GPL"); + +EXPORT_SYMBOL(sq_remap); +EXPORT_SYMBOL(sq_unmap); +EXPORT_SYMBOL(sq_clear); +EXPORT_SYMBOL(sq_flush); +EXPORT_SYMBOL(sq_flush_range); + diff -puN -L arch/sh/kernel/dma.c arch/sh/kernel/dma.c~sh-merge /dev/null --- 25/arch/sh/kernel/dma.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,142 +0,0 @@ -/* - * arch/sh/kernel/dma.c - * - * Copyright (C) 2000 Takashi YOSHII - * - * PC like DMA API for SuperH's DMAC. - */ - -#include -#include -#include -#include - -#include -#include - -static struct dma_info_t *dma_info[MAX_DMA_CHANNELS]; -static struct dma_info_t *autoinit_info[SH_MAX_DMA_CHANNELS] = {0}; -static spinlock_t dma_spin_lock; - -static unsigned int calc_chcr(struct dma_info_t *info) -{ - unsigned int chcr; - - chcr = ( info->mode & DMA_MODE_WRITE )? info->mode_write : info->mode_read; - if( info->mode & DMA_AUTOINIT ) - chcr |= CHCR_IE; - return chcr; -} - -static __inline__ int ts_shift(unsigned long chcr) -{ - return ((int[]){3,0,1,2,5,0,0,0})[(chcr>>4)&0x000007]; -} - -static void dma_tei(int irq, void *dev_id, struct pt_regs *regs) -{ - int chan = irq - DMTE_IRQ[0]; - struct dma_info_t *info = autoinit_info[chan]; - - if( info->mode & DMA_MODE_WRITE ) - ctrl_outl(info->mem_addr, SAR[info->chan]); - else - ctrl_outl(info->mem_addr, DAR[info->chan]); - - ctrl_outl(info->count>>ts_shift(calc_chcr(info)), DMATCR[info->chan]); - ctrl_outl(ctrl_inl(CHCR[info->chan])&~CHCR_TE, CHCR[info->chan]); -} - -static struct irqaction irq_tei = { dma_tei, SA_INTERRUPT, 0, "dma_tei", NULL, NULL}; - -void setup_dma(unsigned int dmanr, struct dma_info_t *info) -{ - make_ipr_irq(DMTE_IRQ[info->chan], DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY); - setup_irq(DMTE_IRQ[info->chan], &irq_tei); - dma_info[dmanr] = info; -} - -unsigned long claim_dma_lock(void) -{ - unsigned long flags; - spin_lock_irqsave(&dma_spin_lock, flags); - return flags; -} - -void release_dma_lock(unsigned long flags) -{ - spin_unlock_irqrestore(&dma_spin_lock, flags); -} - -void enable_dma(unsigned int dmanr) -{ - struct dma_info_t *info = dma_info[dmanr]; - ctrl_outl(calc_chcr(info)|CHCR_DE, CHCR[info->chan]); -} - -void disable_dma(unsigned int dmanr) -{ - struct dma_info_t *info = dma_info[dmanr]; - ctrl_outl(calc_chcr(info)&~CHCR_DE, CHCR[info->chan]); -} - -void set_dma_mode(unsigned int dmanr, char mode) -{ - struct dma_info_t *info = dma_info[dmanr]; - - info->mode = mode; - set_dma_addr(dmanr, info->mem_addr); - set_dma_count(dmanr, info->count); - autoinit_info[info->chan] = info; -} - -void set_dma_addr(unsigned int dmanr, unsigned int a) -{ - struct dma_info_t *info = dma_info[dmanr]; - unsigned long sar, dar; - - info->mem_addr = a; - sar = (info->mode & DMA_MODE_WRITE)? info->mem_addr: info->dev_addr; - dar = (info->mode & DMA_MODE_WRITE)? info->dev_addr: info->mem_addr; - ctrl_outl(sar, SAR[info->chan]); - ctrl_outl(dar, DAR[info->chan]); -} - -void set_dma_count(unsigned int dmanr, unsigned int count) -{ - struct dma_info_t *info = dma_info[dmanr]; - info->count = count; - ctrl_outl(count>>ts_shift(calc_chcr(info)), DMATCR[info->chan]); -} - -int get_dma_residue(unsigned int dmanr) -{ - struct dma_info_t *info = dma_info[dmanr]; - return ctrl_inl(DMATCR[info->chan])<preempt_count + tst r0, r0 + bf restore_all +need_resched: + mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags + tst #_TIF_NEED_RESCHED, r0 ! need_resched set? + bt restore_all + + stc sr, r0 ! interrupts disabled? + tst #0xf0, r0 + bf restore_all + + mov.l 1f, r0 + mov.l r0, @(TI_PRE_COUNT,r8) + + STI() + mov.l 2f, r0 + jsr @r0 + nop + mov #0, r0 + mov.l r0, @(TI_PRE_COUNT,r8) + CLI() + + bra need_resched + nop + + .align 2 +1: .long PREEMPT_ACTIVE +2: .long schedule +#endif + ENTRY(resume_userspace) ! r8: current_thread_info - /* CLI */ - stc sr, r0 - or #0xf0, r0 - ldc r0, sr - ! + CLI() mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags tst #_TIF_WORK_MASK, r0 bt/s restore_all @@ -377,10 +429,7 @@ work_resched: mov.l 1f, r1 jsr @r1 ! schedule nop - /* CLI */ - stc sr, r0 - or #0xf0, r0 - ldc r0, sr + CLI() ! mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags tst #_TIF_WORK_MASK, r0 @@ -469,7 +518,7 @@ ret_from_fork: .align 2 1: .long schedule_tail ! -system_call: +ENTRY(system_call) mov.l 1f, r9 mov.l @r9, r8 ! Read from TRA (Trap Address) Register ! @@ -510,10 +559,7 @@ syscall_call: mov.l r0, @(OFF_R0,r15) ! save the return value ! syscall_exit: - /* CLI */ - stc sr, r0 - or #0xf0, r0 - ldc r0, sr + CLI() ! GET_THREAD_INFO(r8) mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags @@ -550,6 +596,40 @@ restore_all: lds.l @r15+, macl add #4, r15 ! Skip syscall number ! +#ifdef CONFIG_SH_DSP + mov.l @r15+, k0 ! DSP mode marker + mov.l 5f, k1 + cmp/eq k0, k1 ! Do we have a DSP stack frame? + bf skip_restore + + stc sr, k0 ! Enable CPU DSP mode + or k1, k0 ! (within kernel it may be disabled) + ldc k0, sr + mov r2, k0 ! Backup r2 + + ! Restore DSP registers from stack + mov r15, r2 + movs.l @r2+, a1 + movs.l @r2+, a0g + movs.l @r2+, a1g + movs.l @r2+, m0 + movs.l @r2+, m1 + mov r2, r15 + + lds.l @r15+, a0 + lds.l @r15+, x0 + lds.l @r15+, x1 + lds.l @r15+, y0 + lds.l @r15+, y1 + lds.l @r15+, dsr + ldc.l @r15+, rs + ldc.l @r15+, re + ldc.l @r15+, mod + + mov k0, r2 ! Restore r2 +skip_restore: +#endif + ! ! Calculate new SR value mov k3, k2 ! original SR value mov.l 8f, k1 @@ -576,6 +656,7 @@ restore_all: mov #0, k1 mov.b k1, @k0 #endif + mov.l @r15+, k2 ! restore EXPEVT mov k4, r15 rte nop @@ -585,14 +666,12 @@ restore_all: 2: .long NR_syscalls 3: .long sys_call_table 4: .long do_syscall_trace +5: .long 0x00001000 ! DSP 7: .long 0x30000000 8: .long 0x00008000 ! FD 9: .long 0xffff7f0f ! ~(IMASK+FD) __INV_IMASK: .long 0xffffff0f ! ~(IMASK) -#if defined(CONFIG_KGDB_NMI) -10: .long in_nmi -#endif ! Exception Vector Base ! @@ -637,7 +716,7 @@ interrupt: nop .align 2 5: .long NMI_VEC -6: .long SYMBOL_NAME(in_nmi) +6: .long in_nmi 0: #endif /* defined(CONFIG_KGDB_NMI) */ bra handle_exception @@ -669,7 +748,50 @@ handle_exception: ! 1: mov #-1, k4 mov.l 2f, k1 + ! +#ifdef CONFIG_SH_DSP + mov.l r2, @-r15 ! Save r2, we need another reg + stc sr, k4 + mov.l 1f, r2 + tst r2, k4 ! Check if in DSP mode + mov.l @r15+, r2 ! Restore r2 now + bt/s skip_save + mov #0, k4 ! Set marker for no stack frame + + mov r2, k4 ! Backup r2 (in k4) for later + + ! Save DSP registers on stack + stc.l mod, @-r15 + stc.l re, @-r15 + stc.l rs, @-r15 + sts.l dsr, @-r15 + sts.l y1, @-r15 + sts.l y0, @-r15 + sts.l x1, @-r15 + sts.l x0, @-r15 + sts.l a0, @-r15 + + ! GAS is broken, does not generate correct "movs.l Ds,@-As" instr. + + ! FIXME: Make sure that this is still the case with newer toolchains, + ! as we're not at all interested in supporting ancient toolchains at + ! this point. -- PFM. + + mov r15, r2 + .word 0xf653 ! movs.l a1, @-r2 + .word 0xf6f3 ! movs.l a0g, @-r2 + .word 0xf6d3 ! movs.l a1g, @-r2 + .word 0xf6c3 ! movs.l m0, @-r2 + .word 0xf6e3 ! movs.l m1, @-r2 + mov r2, r15 + + mov k4, r2 ! Restore r2 + mov.l 1f, k4 ! Force DSP stack frame +skip_save: + mov.l k4, @-r15 ! Push DSP mode marker onto stack +#endif ! Save the user registers on the stack. + mov.l k2, @-r15 ! EXPEVT mov.l k4, @-r15 ! set TRA (default: -1) ! sts.l macl, @-r15 @@ -715,264 +837,17 @@ handle_exception: nop .align 2 +1: .long 0x00001000 ! DSP=1 2: .long 0x000000f0 ! FD=0, IMASK=15 3: .long 0xcfffffff ! RB=0, BL=0 4: .long exception_handling_table .align 2 -none: +ENTRY(exception_none) rts nop -.data -ENTRY(exception_handling_table) - .long error - .long error -#if defined(CONFIG_MMU) - .long tlb_miss_load - .long tlb_miss_store - .long initial_page_write - .long tlb_protection_violation_load - .long tlb_protection_violation_store - .long address_error_load - .long address_error_store -#else - .long error ! tlb miss load - .long error ! tlb miss store - .long error ! initial page write - .long error ! tlb prot violation load - .long error ! tlb prot violation store - .long error ! address error load - .long error ! address error store -#endif - -#if defined(CONFIG_CPU_SH4) - .long do_fpu_error -#else - .long error ! fpu_exception -#endif - .long error - .long system_call ! Unconditional Trap - .long error ! reserved_instruction (filled by trap_init) - .long error ! illegal_slot_instruction (filled by trap_init) -ENTRY(nmi_slot) -#if defined (CONFIG_KGDB_NMI) - .long debug_enter ! Allow trap to debugger -#else - .long none ! Not implemented yet -#endif -ENTRY(user_break_point_trap) - .long break_point_trap -ENTRY(interrupt_table) - ! external hardware - .long do_IRQ ! 0000 - .long do_IRQ ! 0001 - .long do_IRQ ! 0010 - .long do_IRQ ! 0011 - .long do_IRQ ! 0100 - .long do_IRQ ! 0101 - .long do_IRQ ! 0110 - .long do_IRQ ! 0111 - .long do_IRQ ! 1000 - .long do_IRQ ! 1001 - .long do_IRQ ! 1010 - .long do_IRQ ! 1011 - .long do_IRQ ! 1100 - .long do_IRQ ! 1101 - .long do_IRQ ! 1110 - .long error - ! Internal hardware - .long do_IRQ ! TMU0 tuni0 - .long do_IRQ ! TMU1 tuni1 - .long do_IRQ ! TMU2 tuni2 - .long do_IRQ ! ticpi2 - .long do_IRQ ! RTC ati - .long do_IRQ ! pri - .long do_IRQ ! cui - .long do_IRQ ! SCI eri - .long do_IRQ ! rxi - .long do_IRQ ! txi - .long do_IRQ ! tei - .long do_IRQ ! WDT iti - .long do_IRQ ! REF rcmi - .long do_IRQ ! rovi - .long do_IRQ - .long do_IRQ -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) - .long do_IRQ ! 32 IRQ irq0 - .long do_IRQ ! 33 irq1 - .long do_IRQ ! 34 irq2 - .long do_IRQ ! 35 irq3 - .long do_IRQ ! 36 irq4 - .long do_IRQ ! 37 irq5 - .long do_IRQ ! 38 - .long do_IRQ ! 39 - .long do_IRQ ! 40 PINT pint0-7 - .long do_IRQ ! 41 pint8-15 - .long do_IRQ ! 42 - .long do_IRQ ! 43 - .long do_IRQ ! 44 - .long do_IRQ ! 45 - .long do_IRQ ! 46 - .long do_IRQ ! 47 - .long do_IRQ ! 48 DMAC dei0 - .long do_IRQ ! 49 dei1 - .long do_IRQ ! 50 dei2 - .long do_IRQ ! 51 dei3 - .long do_IRQ ! 52 IrDA eri1 - .long do_IRQ ! 53 rxi1 - .long do_IRQ ! 54 bri1 - .long do_IRQ ! 55 txi1 - .long do_IRQ ! 56 SCIF eri2 - .long do_IRQ ! 57 rxi2 - .long do_IRQ ! 58 bri2 - .long do_IRQ ! 59 txi2 - .long do_IRQ ! 60 ADC adi -#if defined(CONFIG_CPU_SUBTYPE_SH7707) - .long do_IRQ ! 61 LCDC lcdi - .long do_IRQ ! 62 PCC pcc0i - .long do_IRQ ! 63 pcc1i -#endif -#elif defined(CONFIG_CPU_SH4) - .long do_IRQ ! 32 Hitachi UDI - .long do_IRQ ! 33 GPIO - .long do_IRQ ! 34 DMAC dmte0 - .long do_IRQ ! 35 dmte1 - .long do_IRQ ! 36 dmte2 - .long do_IRQ ! 37 dmte3 - .long do_IRQ ! 38 dmae - .long error ! 39 - .long do_IRQ ! 40 SCIF eri - .long do_IRQ ! 41 rxi - .long do_IRQ ! 42 bri - .long do_IRQ ! 43 txi - .long error ! 44 - .long error ! 45 - .long error ! 46 - .long error ! 47 - .long do_fpu_state_restore ! 48 - .long do_fpu_state_restore ! 49 -#endif -#if defined(CONFIG_CPU_SUBTYPE_SH7751) - .long error - .long error - .long error - .long error - .long error - .long error - .long error - .long error - .long error - .long error - .long error - .long error - .long error - .long error - .long do_IRQ ! PCI serr - .long do_IRQ ! dma3 - .long do_IRQ ! dma2 - .long do_IRQ ! dma1 - .long do_IRQ ! dma0 - .long do_IRQ ! pwon - .long do_IRQ ! pwdwn - .long do_IRQ ! err -#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) - .long error ! 50 0x840 - .long error ! 51 0x860 - .long error ! 52 0x880 - .long error ! 53 0x8a0 - .long error ! 54 0x8c0 - .long error ! 55 0x8e0 - .long error ! 56 0x900 - .long error ! 57 0x920 - .long error ! 58 0x940 - .long error ! 59 0x960 - .long error ! 60 0x980 - .long error ! 61 0x9a0 - .long error ! 62 0x9c0 - .long error ! 63 0x9e0 - .long do_IRQ ! 64 0xa00 PCI serr - .long do_IRQ ! 65 0xa20 err - .long do_IRQ ! 66 0xa40 ad - .long do_IRQ ! 67 0xa60 pwr_dwn - .long error ! 68 0xa80 - .long error ! 69 0xaa0 - .long error ! 70 0xac0 - .long error ! 71 0xae0 - .long do_IRQ ! 72 0xb00 DMA INT0 - .long do_IRQ ! 73 0xb20 INT1 - .long do_IRQ ! 74 0xb40 INT2 - .long do_IRQ ! 75 0xb60 INT3 - .long do_IRQ ! 76 0xb80 INT4 - .long error ! 77 0xba0 - .long do_IRQ ! 78 0xbc0 DMA ERR - .long error ! 79 0xbe0 - .long do_IRQ ! 80 0xc00 PIO0 - .long do_IRQ ! 81 0xc20 PIO1 - .long do_IRQ ! 82 0xc40 PIO2 - .long error ! 83 0xc60 - .long error ! 84 0xc80 - .long error ! 85 0xca0 - .long error ! 86 0xcc0 - .long error ! 87 0xce0 - .long error ! 88 0xd00 - .long error ! 89 0xd20 - .long error ! 90 0xd40 - .long error ! 91 0xd60 - .long error ! 92 0xd80 - .long error ! 93 0xda0 - .long error ! 94 0xdc0 - .long error ! 95 0xde0 - .long error ! 96 0xe00 - .long error ! 97 0xe20 - .long error ! 98 0xe40 - .long error ! 99 0xe60 - .long error ! 100 0xe80 - .long error ! 101 0xea0 - .long error ! 102 0xec0 - .long error ! 103 0xee0 - .long error ! 104 0xf00 - .long error ! 105 0xf20 - .long error ! 106 0xf40 - .long error ! 107 0xf60 - .long error ! 108 0xf80 - .long error ! 109 0xfa0 - .long error ! 110 0xfc0 - .long error ! 111 0xfe0 - .long do_IRQ ! 112 0x1000 Mailbox - .long error ! 113 0x1020 - .long error ! 114 0x1040 - .long error ! 115 0x1060 - .long error ! 116 0x1080 - .long error ! 117 0x10a0 - .long error ! 118 0x10c0 - .long error ! 119 0x10e0 - .long error ! 120 0x1100 - .long error ! 121 0x1120 - .long error ! 122 0x1140 - .long error ! 123 0x1160 - .long error ! 124 0x1180 - .long error ! 125 0x11a0 - .long error ! 126 0x11c0 - .long error ! 127 0x11e0 - .long error ! 128 0x1200 - .long error ! 129 0x1220 - .long error ! 130 0x1240 - .long error ! 131 0x1260 - .long error ! 132 0x1280 - .long error ! 133 0x12a0 - .long error ! 134 0x12c0 - .long error ! 135 0x12e0 - .long error ! 136 0x1300 - .long error ! 137 0x1320 - .long error ! 138 0x1340 - .long error ! 139 0x1360 - .long do_IRQ ! 140 0x1380 EMPI INV_ADDR - .long error ! 141 0x13a0 - .long error ! 142 0x13c0 - .long error ! 143 0x13e0 -#endif - + .data ENTRY(sys_call_table) .long sys_ni_syscall /* 0 - old "setup()" system call*/ .long sys_exit @@ -1242,6 +1117,12 @@ ENTRY(sys_call_table) .long sys_clock_gettime /* 265 */ .long sys_clock_getres .long sys_clock_nanosleep + .long sys_statfs64 + .long sys_fstatfs64 + .long sys_tgkill /* 270 */ + .long sys_utimes + .long sys_fadvise64_64_wrapper + .long sys_ni_syscall /* Reserved for vserver */ .rept NR_syscalls-(.-sys_call_table)/4 .long sys_ni_syscall diff -puN -L arch/sh/kernel/fpu.c arch/sh/kernel/fpu.c~sh-merge /dev/null --- 25/arch/sh/kernel/fpu.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,314 +0,0 @@ -/* $Id: fpu.c,v 1.29 2000/03/22 13:42:10 gniibe Exp $ - * - * linux/arch/sh/kernel/fpu.c - * - * Save/restore floating point context for signal handlers. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka - * - * FIXME! These routines can be optimized in big endian case. - */ - -#include -#include -#include -#include - -/* - * Save FPU registers onto task structure. - * Assume called with FPU enabled (SR.FD=0). - */ -void -save_fpu(struct task_struct *tsk) -{ - asm volatile("sts.l fpul, @-%0\n\t" - "sts.l fpscr, @-%0\n\t" - "lds %1, fpscr\n\t" - "frchg\n\t" - "fmov.s fr15, @-%0\n\t" - "fmov.s fr14, @-%0\n\t" - "fmov.s fr13, @-%0\n\t" - "fmov.s fr12, @-%0\n\t" - "fmov.s fr11, @-%0\n\t" - "fmov.s fr10, @-%0\n\t" - "fmov.s fr9, @-%0\n\t" - "fmov.s fr8, @-%0\n\t" - "fmov.s fr7, @-%0\n\t" - "fmov.s fr6, @-%0\n\t" - "fmov.s fr5, @-%0\n\t" - "fmov.s fr4, @-%0\n\t" - "fmov.s fr3, @-%0\n\t" - "fmov.s fr2, @-%0\n\t" - "fmov.s fr1, @-%0\n\t" - "fmov.s fr0, @-%0\n\t" - "frchg\n\t" - "fmov.s fr15, @-%0\n\t" - "fmov.s fr14, @-%0\n\t" - "fmov.s fr13, @-%0\n\t" - "fmov.s fr12, @-%0\n\t" - "fmov.s fr11, @-%0\n\t" - "fmov.s fr10, @-%0\n\t" - "fmov.s fr9, @-%0\n\t" - "fmov.s fr8, @-%0\n\t" - "fmov.s fr7, @-%0\n\t" - "fmov.s fr6, @-%0\n\t" - "fmov.s fr5, @-%0\n\t" - "fmov.s fr4, @-%0\n\t" - "fmov.s fr3, @-%0\n\t" - "fmov.s fr2, @-%0\n\t" - "fmov.s fr1, @-%0\n\t" - "fmov.s fr0, @-%0" - : /* no output */ - : "r" ((char *)(&tsk->thread.fpu.hard.status)), - "r" (FPSCR_INIT) - : "memory"); - - tsk->flags &= ~PF_USEDFPU; - release_fpu(); -} - -static void -restore_fpu(struct task_struct *tsk) -{ - asm volatile("lds %1, fpscr\n\t" - "fmov.s @%0+, fr0\n\t" - "fmov.s @%0+, fr1\n\t" - "fmov.s @%0+, fr2\n\t" - "fmov.s @%0+, fr3\n\t" - "fmov.s @%0+, fr4\n\t" - "fmov.s @%0+, fr5\n\t" - "fmov.s @%0+, fr6\n\t" - "fmov.s @%0+, fr7\n\t" - "fmov.s @%0+, fr8\n\t" - "fmov.s @%0+, fr9\n\t" - "fmov.s @%0+, fr10\n\t" - "fmov.s @%0+, fr11\n\t" - "fmov.s @%0+, fr12\n\t" - "fmov.s @%0+, fr13\n\t" - "fmov.s @%0+, fr14\n\t" - "fmov.s @%0+, fr15\n\t" - "frchg\n\t" - "fmov.s @%0+, fr0\n\t" - "fmov.s @%0+, fr1\n\t" - "fmov.s @%0+, fr2\n\t" - "fmov.s @%0+, fr3\n\t" - "fmov.s @%0+, fr4\n\t" - "fmov.s @%0+, fr5\n\t" - "fmov.s @%0+, fr6\n\t" - "fmov.s @%0+, fr7\n\t" - "fmov.s @%0+, fr8\n\t" - "fmov.s @%0+, fr9\n\t" - "fmov.s @%0+, fr10\n\t" - "fmov.s @%0+, fr11\n\t" - "fmov.s @%0+, fr12\n\t" - "fmov.s @%0+, fr13\n\t" - "fmov.s @%0+, fr14\n\t" - "fmov.s @%0+, fr15\n\t" - "frchg\n\t" - "lds.l @%0+, fpscr\n\t" - "lds.l @%0+, fpul\n\t" - : /* no output */ - : "r" (&tsk->thread.fpu), "r" (FPSCR_INIT) - : "memory"); -} - -/* - * Load the FPU with signalling NANS. This bit pattern we're using - * has the property that no matter whether considered as single or as - * double precission represents signaling NANS. - */ - -static void -fpu_init(void) -{ - asm volatile("lds %0, fpul\n\t" - "lds %1, fpscr\n\t" - "fsts fpul, fr0\n\t" - "fsts fpul, fr1\n\t" - "fsts fpul, fr2\n\t" - "fsts fpul, fr3\n\t" - "fsts fpul, fr4\n\t" - "fsts fpul, fr5\n\t" - "fsts fpul, fr6\n\t" - "fsts fpul, fr7\n\t" - "fsts fpul, fr8\n\t" - "fsts fpul, fr9\n\t" - "fsts fpul, fr10\n\t" - "fsts fpul, fr11\n\t" - "fsts fpul, fr12\n\t" - "fsts fpul, fr13\n\t" - "fsts fpul, fr14\n\t" - "fsts fpul, fr15\n\t" - "frchg\n\t" - "fsts fpul, fr0\n\t" - "fsts fpul, fr1\n\t" - "fsts fpul, fr2\n\t" - "fsts fpul, fr3\n\t" - "fsts fpul, fr4\n\t" - "fsts fpul, fr5\n\t" - "fsts fpul, fr6\n\t" - "fsts fpul, fr7\n\t" - "fsts fpul, fr8\n\t" - "fsts fpul, fr9\n\t" - "fsts fpul, fr10\n\t" - "fsts fpul, fr11\n\t" - "fsts fpul, fr12\n\t" - "fsts fpul, fr13\n\t" - "fsts fpul, fr14\n\t" - "fsts fpul, fr15\n\t" - "frchg" - : /* no output */ - : "r" (0), "r" (FPSCR_INIT)); -} - -/** - * denormal_to_double - Given denormalized float number, - * store double float - * - * @fpu: Pointer to sh_fpu_hard structure - * @n: Index to FP register - */ -static void -denormal_to_double (struct sh_fpu_hard_struct *fpu, int n) -{ - unsigned long du, dl; - unsigned long x = fpu->fpul; - int exp = 1023 - 126; - - if (x != 0 && (x & 0x7f800000) == 0) { - du = (x & 0x80000000); - while ((x & 0x00800000) == 0) { - x <<= 1; - exp--; - } - x &= 0x007fffff; - du |= (exp << 20) | (x >> 3); - dl = x << 29; - - fpu->fp_regs[n] = du; - fpu->fp_regs[n+1] = dl; - } -} - -/** - * ieee_fpe_handler - Handle denormalized number exception - * - * @regs: Pointer to register structure - * - * Returns 1 when it's handled (should not cause exception). - */ -static int -ieee_fpe_handler (struct pt_regs *regs) -{ - unsigned short insn = *(unsigned short *) regs->pc; - unsigned short finsn; - unsigned long nextpc; - int nib[4] = { - (insn >> 12) & 0xf, - (insn >> 8) & 0xf, - (insn >> 4) & 0xf, - insn & 0xf}; - - if (nib[0] == 0xb || - (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */ - regs->pr = regs->pc + 4; - - if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */ - nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3); - finsn = *(unsigned short *) (regs->pc + 2); - } else if (nib[0] == 0x8 && nib[1] == 0xd) { /* bt/s */ - if (regs->sr & 1) - nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1); - else - nextpc = regs->pc + 4; - finsn = *(unsigned short *) (regs->pc + 2); - } else if (nib[0] == 0x8 && nib[1] == 0xf) { /* bf/s */ - if (regs->sr & 1) - nextpc = regs->pc + 4; - else - nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1); - finsn = *(unsigned short *) (regs->pc + 2); - } else if (nib[0] == 0x4 && nib[3] == 0xb && - (nib[2] == 0x0 || nib[2] == 0x2)) { /* jmp & jsr */ - nextpc = regs->regs[nib[1]]; - finsn = *(unsigned short *) (regs->pc + 2); - } else if (nib[0] == 0x0 && nib[3] == 0x3 && - (nib[2] == 0x0 || nib[2] == 0x2)) { /* braf & bsrf */ - nextpc = regs->pc + 4 + regs->regs[nib[1]]; - finsn = *(unsigned short *) (regs->pc + 2); - } else if (insn == 0x000b) { /* rts */ - nextpc = regs->pr; - finsn = *(unsigned short *) (regs->pc + 2); - } else { - nextpc = regs->pc + 2; - finsn = insn; - } - - if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ - struct task_struct *tsk = current; - - save_fpu(tsk); - if ((tsk->thread.fpu.hard.fpscr & (1 << 17))) { - /* FPU error */ - denormal_to_double (&tsk->thread.fpu.hard, - (finsn >> 8) & 0xf); - tsk->thread.fpu.hard.fpscr &= - ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); - grab_fpu(); - restore_fpu(tsk); - tsk->flags |= PF_USEDFPU; - } else { - tsk->thread.trap_no = 11; - tsk->thread.error_code = 0; - force_sig(SIGFPE, tsk); - } - - regs->pc = nextpc; - return 1; - } - - return 0; -} - -asmlinkage void -do_fpu_error(unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7, - struct pt_regs regs) -{ - struct task_struct *tsk = current; - - if (ieee_fpe_handler (®s)) - return; - - regs.pc += 2; - save_fpu(tsk); - tsk->thread.trap_no = 11; - tsk->thread.error_code = 0; - force_sig(SIGFPE, tsk); -} - -asmlinkage void -do_fpu_state_restore(unsigned long r4, unsigned long r5, unsigned long r6, - unsigned long r7, struct pt_regs regs) -{ - struct task_struct *tsk = current; - - grab_fpu(); - if (!user_mode(®s)) { - printk(KERN_ERR "BUG: FPU is used in kernel mode.\n"); - return; - } - - if (tsk->used_math) { - /* Using the FPU again. */ - restore_fpu(tsk); - } else { - /* First time FPU user. */ - fpu_init(); - tsk->used_math = 1; - } - tsk->flags |= PF_USEDFPU; -} diff -puN arch/sh/kernel/head.S~sh-merge arch/sh/kernel/head.S --- 25/arch/sh/kernel/head.S~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/head.S 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: head.S,v 1.6 2003/05/04 19:29:53 lethal Exp $ +/* $Id: head.S,v 1.7 2003/09/01 17:58:19 lethal Exp $ * * arch/sh/kernel/head.S * @@ -50,7 +50,7 @@ ENTRY(_stext) sub r1, r0 ! ldc r0, r7_bank ! ... and initial thread_info ! - ! Enable cache + ! Additional CPU initialization mov.l 6f, r0 jsr @r0 nop @@ -73,4 +73,4 @@ ENTRY(_stext) 3: .long __bss_start 4: .long _end 5: .long start_kernel -6: .long sh_cache_init +6: .long sh_cpu_init diff -puN arch/sh/kernel/io.c~sh-merge arch/sh/kernel/io.c --- 25/arch/sh/kernel/io.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/io.c 2004-01-09 21:32:27.000000000 -0800 @@ -10,186 +10,6 @@ #include #include -unsigned char _inb(unsigned long port) -{ - return __inb(port); -} -EXPORT_SYMBOL(_inb); - -unsigned short _inw(unsigned long port) -{ - return __inw(port); -} -EXPORT_SYMBOL(_inw); - -unsigned int _inl(unsigned long port) -{ - return __inl(port); -} -EXPORT_SYMBOL(_inl); - -void _outb(unsigned char b, unsigned long port) -{ - __outb(b, port); -} -EXPORT_SYMBOL(_outb); - -void _outw(unsigned short b, unsigned long port) -{ - __outw(b, port); -} -EXPORT_SYMBOL(_outw); - - -void _outl(unsigned int b, unsigned long port) -{ - __outl(b, port); -} -EXPORT_SYMBOL(_outl); - - -unsigned char _inb_p(unsigned long port) -{ - return __inb_p(port); -} -EXPORT_SYMBOL(_inb_p); - -unsigned short _inw_p(unsigned long port) -{ - return __inw_p(port); -} -EXPORT_SYMBOL(_inw_p); - - -void _outb_p(unsigned char b, unsigned long port) -{ - __outb_p(b, port); -} -EXPORT_SYMBOL(_outb_p); - -void _outw_p(unsigned short b, unsigned long port) -{ - __outw_p(b, port); -} -EXPORT_SYMBOL(_outw_p); - -void _insb(unsigned long port, void *buffer, unsigned long count) -{ - return __insb(port, buffer, count); -} -EXPORT_SYMBOL(_insb); - -void _insw(unsigned long port, void *buffer, unsigned long count) -{ - __insw(port, buffer, count); -} -EXPORT_SYMBOL(_insw); - -void _insl(unsigned long port, void *buffer, unsigned long count) -{ - __insl(port, buffer, count); -} -EXPORT_SYMBOL(_insl); - -void _outsb(unsigned long port, const void *buffer, unsigned long count) -{ - __outsb(port, buffer, count); -} -EXPORT_SYMBOL(_outsb); - -void _outsw(unsigned long port, const void *buffer, unsigned long count) -{ - __outsw(port, buffer, count); -} -EXPORT_SYMBOL(_outsw); - -void _outsl(unsigned long port, const void *buffer, unsigned long count) -{ - __outsl(port, buffer, count); - -} -EXPORT_SYMBOL(_outsl); - -unsigned char ___raw_readb(unsigned long addr) -{ - return __readb(addr); -} -EXPORT_SYMBOL(___raw_readb); - -unsigned short ___raw_readw(unsigned long addr) -{ - return __readw(addr); -} -EXPORT_SYMBOL(___raw_readw); - -unsigned int ___raw_readl(unsigned long addr) -{ - return __readl(addr); -} -EXPORT_SYMBOL(___raw_readl); - -unsigned char _readb(unsigned long addr) -{ - unsigned long r = __readb(addr); - mb(); - return r; -} -EXPORT_SYMBOL(_readb); - -unsigned short _readw(unsigned long addr) -{ - unsigned long r = __readw(addr); - mb(); - return r; -} -EXPORT_SYMBOL(_readw); - -unsigned int _readl(unsigned long addr) -{ - unsigned long r = __readl(addr); - mb(); - return r; -} -EXPORT_SYMBOL(_readl); - -void ___raw_writeb(unsigned char b, unsigned long addr) -{ - __writeb(b, addr); -} - -void ___raw_writew(unsigned short b, unsigned long addr) -{ - __writew(b, addr); -} -EXPORT_SYMBOL(___raw_writew); - -void ___raw_writel(unsigned int b, unsigned long addr) -{ - __writel(b, addr); -} -EXPORT_SYMBOL(___raw_writel); - -void _writeb(unsigned char b, unsigned long addr) -{ - __writeb(b, addr); - mb(); -} -EXPORT_SYMBOL(_writeb); - -void _writew(unsigned short b, unsigned long addr) -{ - __writew(b, addr); - mb(); -} -EXPORT_SYMBOL(_writew); - -void _writel(unsigned int b, unsigned long addr) -{ - __writel(b, addr); - mb(); -} -EXPORT_SYMBOL(_writel); - /* * Copy data from IO memory space to "real" memory space. * This needs to be optimized. @@ -230,3 +50,8 @@ void memset_io(unsigned long dst, int c dst++; } } + +EXPORT_SYMBOL(memcpy_fromio); +EXPORT_SYMBOL(memcpy_toio); +EXPORT_SYMBOL(memset_io); + diff -puN arch/sh/kernel/irq.c~sh-merge arch/sh/kernel/irq.c --- 25/arch/sh/kernel/irq.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/irq.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: irq.c,v 1.12 2003/06/28 15:34:55 lethal Exp $ +/* $Id: irq.c,v 1.19 2004/01/10 01:25:32 lethal Exp $ * * linux/arch/sh/kernel/irq.c * @@ -30,6 +30,7 @@ #include #include #include +#include #include #include @@ -45,6 +46,7 @@ irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned = { [0 ... NR_IRQS-1] = { .handler = &no_irq_type, + .lock = SPIN_LOCK_UNLOCKED } }; @@ -150,23 +152,88 @@ int handle_IRQ_event(unsigned int irq, s add_interrupt_randomness(irq); local_irq_disable(); + return retval; +} - if (retval != 1) { - static int count = 100; +static void __report_bad_irq(int irq, irq_desc_t *desc, irqreturn_t action_ret) +{ + struct irqaction *action; - if (count) { - count--; + if (action_ret != IRQ_HANDLED && action_ret != IRQ_NONE) { + printk(KERN_ERR "irq event %d: bogus return value %x\n", + irq, action_ret); + } else { + printk(KERN_ERR "irq %d: nobody cared!\n", irq); + } + dump_stack(); + printk(KERN_ERR "handlers:\n"); + action = desc->action; + do { + printk(KERN_ERR "[<%p>]", action->handler); + print_symbol(" (%s)", + (unsigned long)action->handler); + printk("\n"); + action = action->next; + } while (action); +} - if (retval) { - printk("irq event %d: bogus retval mask %x\n", - irq, retval); - } else { - printk("irq %d: nobody cared\n", irq); - } - } +static void report_bad_irq(int irq, irq_desc_t *desc, irqreturn_t action_ret) +{ + static int count = 100; + + if (count) { + count--; + __report_bad_irq(irq, desc, action_ret); + } +} + +static int noirqdebug; + +static int __init noirqdebug_setup(char *str) +{ + noirqdebug = 1; + printk("IRQ lockup detection disabled\n"); + return 1; +} + +__setup("noirqdebug", noirqdebug_setup); + +/* + * If 99,900 of the previous 100,000 interrupts have not been handled then + * assume that the IRQ is stuck in some manner. Drop a diagnostic and try to + * turn the IRQ off. + * + * (The other 100-of-100,000 interrupts may have been a correctly-functioning + * device sharing an IRQ with the failing one) + * + * Called under desc->lock + */ +static void note_interrupt(int irq, irq_desc_t *desc, irqreturn_t action_ret) +{ + if (action_ret != IRQ_HANDLED) { + desc->irqs_unhandled++; + if (action_ret != IRQ_NONE) + report_bad_irq(irq, desc, action_ret); } - return status; + desc->irq_count++; + if (desc->irq_count < 100000) + return; + + desc->irq_count = 0; + if (desc->irqs_unhandled > 99900) { + /* + * The interrupt is stuck + */ + __report_bad_irq(irq, desc, action_ret); + /* + * Now kill the IRQ + */ + printk(KERN_EMERG "Disabling IRQ #%d\n", irq); + desc->status |= IRQ_DISABLED; + desc->handler->disable(irq); + } + desc->irqs_unhandled = 0; } /* @@ -194,8 +261,10 @@ inline void disable_irq_nosync(unsigned */ void disable_irq(unsigned int irq) { + irq_desc_t *desc = irq_desc + irq; disable_irq_nosync(irq); - synchronize_irq(irq); + if (desc->action) + synchronize_irq(irq); } void enable_irq(unsigned int irq) @@ -206,7 +275,7 @@ void enable_irq(unsigned int irq) spin_lock_irqsave(&desc->lock, flags); switch (desc->depth) { case 1: { - unsigned int status = desc->status & ~IRQ_DISABLED; + unsigned int status = desc->status & ~(IRQ_DISABLED | IRQ_INPROGRESS); desc->status = status; if ((status & (IRQ_PENDING | IRQ_REPLAY)) == IRQ_PENDING) { desc->status = status | IRQ_REPLAY; @@ -243,7 +312,6 @@ asmlinkage int do_IRQ(unsigned long r4, * handled by some other CPU. (or is disabled) */ int irq; - int cpu = smp_processor_id(); irq_desc_t *desc; struct irqaction * action; unsigned int status; @@ -259,7 +327,7 @@ asmlinkage int do_IRQ(unsigned long r4, :"=z" (irq)); irq = irq_demux(irq); - kstat_cpu(cpu).irqs[irq]++; + kstat_this_cpu.irqs[irq]++; desc = irq_desc + irq; spin_lock(&desc->lock); desc->handler->ack(irq); @@ -302,10 +370,13 @@ asmlinkage int do_IRQ(unsigned long r4, * SMP environment. */ for (;;) { + irqreturn_t action_ret; + spin_unlock(&desc->lock); - handle_IRQ_event(irq, ®s, action); + action_ret = handle_IRQ_event(irq, ®s, action); spin_lock(&desc->lock); - + if (!noirqdebug) + note_interrupt(irq, desc, action_ret); if (likely(!(desc->status & IRQ_PENDING))) break; desc->status &= ~IRQ_PENDING; @@ -454,16 +525,17 @@ unsigned long probe_irq_on(void) * Wait for spurious interrupts to trigger */ for (delay = jiffies + HZ/10; time_after(delay, jiffies); ) - /* about 100ms delay */ synchronize_irq(); + /* about 100ms delay */ barrier(); /* * Now filter out any obviously spurious interrupts */ val = 0; for (i=0; ilock); status = desc->status; diff -puN arch/sh/kernel/kgdb_stub.c~sh-merge arch/sh/kernel/kgdb_stub.c --- 25/arch/sh/kernel/kgdb_stub.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/kgdb_stub.c 2004-01-09 21:32:27.000000000 -0800 @@ -778,7 +778,7 @@ static short *get_step_address(void) else addr = trap_registers.pc + 2; - flush_icache_range(addr, addr + 2); + kgdb_flush_icache_range(addr, addr + 2); return (short *) addr; } @@ -801,7 +801,7 @@ static void do_single_step(void) *addr = STEP_OPCODE; /* Flush and return */ - flush_icache_range((long) addr, (long) addr + 2); + kgdb_flush_icache_range((long) addr, (long) addr + 2); return; } @@ -812,7 +812,7 @@ static void undo_single_step(void) /* Use stepped_address in case we stopped elsewhere */ if (stepped_opcode != 0) { *(short*)stepped_address = stepped_opcode; - flush_icache_range(stepped_address, stepped_address + 2); + kgdb_flush_icache_range(stepped_address, stepped_address + 2); } stepped_opcode = 0; } @@ -924,7 +924,7 @@ static void write_mem_msg(int binary) ebin_to_mem(ptr, (char*)addr, length); else hex_to_mem(ptr, (char*)addr, length); - flush_icache_range(addr, addr + length); + kgdb_flush_icache_range(addr, addr + length); ptr = 0; send_ok_msg(); } diff -puN arch/sh/kernel/Makefile~sh-merge arch/sh/kernel/Makefile --- 25/arch/sh/kernel/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -17,11 +17,5 @@ obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kg obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o obj-$(CONFIG_MODULES) += module.o -ifneq ($(CONFIG_SH_DREAMCAST),y) -obj-$(CONFIG_PCI) += pci-dma.o -endif -obj-$(CONFIG_PCI) += pci.o -obj-$(CONFIG_PCI_AUTO) += pci_auto.o - USE_STANDARD_AS_RULE := true diff -puN arch/sh/kernel/module.c~sh-merge arch/sh/kernel/module.c --- 25/arch/sh/kernel/module.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/module.c 2004-01-09 21:32:27.000000000 -0800 @@ -138,3 +138,7 @@ int module_finalize(const Elf_Ehdr *hdr, { return 0; } + +void module_arch_cleanup(struct module *mod) +{ +} diff -puN -L arch/sh/kernel/pci_auto.c arch/sh/kernel/pci_auto.c~sh-merge /dev/null --- 25/arch/sh/kernel/pci_auto.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,502 +0,0 @@ -/* - * PCI autoconfiguration library - * - * Author: Matt Porter - * - * Copyright 2000, 2001 MontaVista Software Inc. - * Copyright 2001 Bradley D. LaRonde - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/* - * Modified for MIPS by Jun Sun, jsun@mvista.com - * - * . Simplify the interface between pci_auto and the rest: a single function. - * . Assign resources from low address to upper address. - * . change most int to u32. - * - * Further modified to include it as mips generic code, ppopov@mvista.com. - * - * 2001-10-26 Bradley D. LaRonde - * - Add a top_bus argument to the "early config" functions so that - * they can set a fake parent bus pointer to convince the underlying - * pci ops to use type 1 configuration for sub busses. - * - Set bridge base and limit registers correctly. - * - Align io and memory base properly before and after bridge setup. - * - Don't fall through to pci_setup_bars for bridge. - * - Reformat the debug output to look more like lspci's output. - */ - -#include -#include -#include -#include - -#define DEBUG -#ifdef DEBUG -#define DBG(x...) printk(x) -#else -#define DBG(x...) -#endif - -/* - * These functions are used early on before PCI scanning is done - * and all of the pci_dev and pci_bus structures have been created. - */ -static struct pci_dev *fake_pci_dev(struct pci_channel *hose, - int top_bus, int busnr, int devfn) -{ - static struct pci_dev dev; - static struct pci_bus bus; - - dev.bus = &bus; - dev.sysdata = hose; - dev.devfn = devfn; - bus.number = busnr; - bus.ops = hose->pci_ops; - - if(busnr != top_bus) - /* Fake a parent bus structure. */ - bus.parent = &bus; - else - bus.parent = NULL; - - return &dev; -} - -#define EARLY_PCI_OP(rw, size, type) \ -int early_##rw##_config_##size(struct pci_channel *hose, \ - int top_bus, int bus, int devfn, int offset, type value) \ -{ \ - return pci_##rw##_config_##size( \ - fake_pci_dev(hose, top_bus, bus, devfn), \ - offset, value); \ -} - -EARLY_PCI_OP(read, byte, u8 *) -EARLY_PCI_OP(read, word, u16 *) -EARLY_PCI_OP(read, dword, u32 *) -EARLY_PCI_OP(write, byte, u8) -EARLY_PCI_OP(write, word, u16) -EARLY_PCI_OP(write, dword, u32) - -static struct resource *io_resource_inuse; -static struct resource *mem_resource_inuse; - -static u32 pciauto_lower_iospc; -static u32 pciauto_upper_iospc; - -static u32 pciauto_lower_memspc; -static u32 pciauto_upper_memspc; - -static void __init -pciauto_setup_bars(struct pci_channel *hose, - int top_bus, - int current_bus, - int pci_devfn) -{ - u32 bar_response, bar_size, bar_value; - u32 bar, addr_mask, bar_nr = 0; - u32 * upper_limit; - u32 * lower_limit; - int found_mem64 = 0; - - for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar+=4) { - /* Tickle the BAR and get the response */ - early_write_config_dword(hose, top_bus, - current_bus, - pci_devfn, - bar, - 0xffffffff); - early_read_config_dword(hose, top_bus, - current_bus, - pci_devfn, - bar, - &bar_response); - - /* If BAR is not implemented go to the next BAR */ - if (!bar_response) - continue; - - /* - * Workaround for a BAR that doesn't use its upper word, - * like the ALi 1535D+ PCI DC-97 Controller Modem (M5457). - * bdl - */ - if (!(bar_response & 0xffff0000)) - bar_response |= 0xffff0000; - -retry: - /* Check the BAR type and set our address mask */ - if (bar_response & PCI_BASE_ADDRESS_SPACE) { - addr_mask = PCI_BASE_ADDRESS_IO_MASK; - upper_limit = &pciauto_upper_iospc; - lower_limit = &pciauto_lower_iospc; - DBG(" I/O"); - } else { - if ((bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == - PCI_BASE_ADDRESS_MEM_TYPE_64) - found_mem64 = 1; - - addr_mask = PCI_BASE_ADDRESS_MEM_MASK; - upper_limit = &pciauto_upper_memspc; - lower_limit = &pciauto_lower_memspc; - DBG(" Mem"); - } - - - /* Calculate requested size */ - bar_size = ~(bar_response & addr_mask) + 1; - - /* Allocate a base address */ - bar_value = ((*lower_limit - 1) & ~(bar_size - 1)) + bar_size; - - if ((bar_value + bar_size) > *upper_limit) { - if (bar_response & PCI_BASE_ADDRESS_SPACE) { - if (io_resource_inuse->child) { - io_resource_inuse = - io_resource_inuse->child; - pciauto_lower_iospc = - io_resource_inuse->start; - pciauto_upper_iospc = - io_resource_inuse->end + 1; - goto retry; - } - - } else { - if (mem_resource_inuse->child) { - mem_resource_inuse = - mem_resource_inuse->child; - pciauto_lower_memspc = - mem_resource_inuse->start; - pciauto_upper_memspc = - mem_resource_inuse->end + 1; - goto retry; - } - } - DBG(" unavailable -- skipping, value %x size %x\n", - bar_value, bar_size); - continue; - } - - /* Write it out and update our limit */ - early_write_config_dword(hose, top_bus, current_bus, pci_devfn, - bar, bar_value); - - *lower_limit = bar_value + bar_size; - - /* - * If we are a 64-bit decoder then increment to the - * upper 32 bits of the bar and force it to locate - * in the lower 4GB of memory. - */ - if (found_mem64) { - bar += 4; - early_write_config_dword(hose, top_bus, - current_bus, - pci_devfn, - bar, - 0x00000000); - } - - DBG(" at 0x%.8x [size=0x%x]\n", bar_value, bar_size); - - bar_nr++; - } - -} - -static void __init -pciauto_prescan_setup_bridge(struct pci_channel *hose, - int top_bus, - int current_bus, - int pci_devfn, - int sub_bus) -{ - /* Configure bus number registers */ - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_PRIMARY_BUS, current_bus); - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_SECONDARY_BUS, sub_bus + 1); - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_SUBORDINATE_BUS, 0xff); - - /* Align memory and I/O to 1MB and 4KB boundaries. */ - pciauto_lower_memspc = (pciauto_lower_memspc + (0x100000 - 1)) - & ~(0x100000 - 1); - pciauto_lower_iospc = (pciauto_lower_iospc + (0x1000 - 1)) - & ~(0x1000 - 1); - - /* Set base (lower limit) of address range behind bridge. */ - early_write_config_word(hose, top_bus, current_bus, pci_devfn, - PCI_MEMORY_BASE, pciauto_lower_memspc >> 16); - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_IO_BASE, (pciauto_lower_iospc & 0x0000f000) >> 8); - early_write_config_word(hose, top_bus, current_bus, pci_devfn, - PCI_IO_BASE_UPPER16, pciauto_lower_iospc >> 16); - - /* We don't support prefetchable memory for now, so disable */ - early_write_config_word(hose, top_bus, current_bus, pci_devfn, - PCI_PREF_MEMORY_BASE, 0); - early_write_config_word(hose, top_bus, current_bus, pci_devfn, - PCI_PREF_MEMORY_LIMIT, 0); -} - -static void __init -pciauto_postscan_setup_bridge(struct pci_channel *hose, - int top_bus, - int current_bus, - int pci_devfn, - int sub_bus) -{ - u32 temp; - - pciauto_lower_memspc += 1; - pciauto_lower_iospc += 1; - - /* Configure bus number registers */ - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_SUBORDINATE_BUS, sub_bus); - - /* Set upper limit of address range behind bridge. */ - early_write_config_word(hose, top_bus, current_bus, pci_devfn, - PCI_MEMORY_LIMIT, pciauto_lower_memspc >> 16); - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_IO_LIMIT, (pciauto_lower_iospc & 0x0000f000) >> 8); - early_write_config_word(hose, top_bus, current_bus, pci_devfn, - PCI_IO_LIMIT_UPPER16, pciauto_lower_iospc >> 16); - - /* Align memory and I/O to 1MB and 4KB boundaries. */ - pciauto_lower_memspc = (pciauto_lower_memspc + (0x100000 - 1)) - & ~(0x100000 - 1); - pciauto_lower_iospc = (pciauto_lower_iospc + (0x1000 - 1)) - & ~(0x1000 - 1); - - /* Enable memory and I/O accesses, enable bus master */ - early_read_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_COMMAND, &temp); - early_write_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_COMMAND, temp | PCI_COMMAND_IO | PCI_COMMAND_MEMORY - | PCI_COMMAND_MASTER); -} - -static void __init -pciauto_prescan_setup_cardbus_bridge(struct pci_channel *hose, - int top_bus, - int current_bus, - int pci_devfn, - int sub_bus) -{ - /* Configure bus number registers */ - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_PRIMARY_BUS, current_bus); - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_SECONDARY_BUS, sub_bus + 1); - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_SUBORDINATE_BUS, 0xff); - - /* Align memory and I/O to 4KB and 4 byte boundaries. */ - pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1)) - & ~(0x1000 - 1); - pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1)) - & ~(0x4 - 1); - - early_write_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_CB_MEMORY_BASE_0, pciauto_lower_memspc); - early_write_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_CB_IO_BASE_0, pciauto_lower_iospc); -} - -static void __init -pciauto_postscan_setup_cardbus_bridge(struct pci_channel *hose, - int top_bus, - int current_bus, - int pci_devfn, - int sub_bus) -{ - u32 temp; - - /* - * [jsun] we always bump up baselines a little, so that if there - * nothing behind P2P bridge, we don't wind up overlapping IO/MEM - * spaces. - */ - pciauto_lower_memspc += 1; - pciauto_lower_iospc += 1; - - /* - * Configure subordinate bus number. The PCI subsystem - * bus scan will renumber buses (reserving three additional - * for this PCI<->CardBus bridge for the case where a CardBus - * adapter contains a P2P or CB2CB bridge. - */ - - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_SUBORDINATE_BUS, sub_bus); - - /* - * Reserve an additional 4MB for mem space and 16KB for - * I/O space. This should cover any additional space - * requirement of unusual CardBus devices with - * additional bridges that can consume more address space. - * - * Although pcmcia-cs currently will reprogram bridge - * windows, the goal is to add an option to leave them - * alone and use the bridge window ranges as the regions - * that are searched for free resources upon hot-insertion - * of a device. This will allow a PCI<->CardBus bridge - * configured by this routine to happily live behind a - * P2P bridge in a system. - */ - - /* Align memory and I/O to 4KB and 4 byte boundaries. */ - pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1)) - & ~(0x1000 - 1); - pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1)) - & ~(0x4 - 1); - /* Set up memory and I/O filter limits, assume 32-bit I/O space */ - early_write_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_CB_MEMORY_LIMIT_0, pciauto_lower_memspc - 1); - early_write_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_CB_IO_LIMIT_0, pciauto_lower_iospc - 1); - - /* Enable memory and I/O accesses, enable bus master */ - early_read_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_COMMAND, &temp); - early_write_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_COMMAND, temp | PCI_COMMAND_IO | PCI_COMMAND_MEMORY - | PCI_COMMAND_MASTER); -} - -#define PCIAUTO_IDE_MODE_MASK 0x05 - -static int __init -pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus) -{ - int sub_bus; - u32 pci_devfn, pci_class, cmdstat, found_multi=0; - unsigned short vid, did; - unsigned char header_type; - int devfn_start = 0; - int devfn_stop = 0xff; - - sub_bus = current_bus; - - if (hose->first_devfn) - devfn_start = hose->first_devfn; - if (hose->last_devfn) - devfn_stop = hose->last_devfn; - - for (pci_devfn=devfn_start; pci_devfn> 16, vid, did); - if (pci_class & 0xff) - DBG(" (rev %.2x)", pci_class & 0xff); - DBG("\n"); - - if ((pci_class >> 16) == PCI_CLASS_BRIDGE_PCI) { - DBG(" Bridge: primary=%.2x, secondary=%.2x\n", - current_bus, sub_bus + 1); - pciauto_prescan_setup_bridge(hose, top_bus, current_bus, - pci_devfn, sub_bus); - DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n", - sub_bus + 1, - pciauto_lower_iospc, pciauto_lower_memspc); - sub_bus = pciauto_bus_scan(hose, top_bus, sub_bus+1); - DBG("Back to bus %.2x\n", current_bus); - pciauto_postscan_setup_bridge(hose, top_bus, current_bus, - pci_devfn, sub_bus); - continue; - } else if ((pci_class >> 16) == PCI_CLASS_BRIDGE_CARDBUS) { - DBG(" CARDBUS Bridge: primary=%.2x, secondary=%.2x\n", - current_bus, sub_bus + 1); - DBG("PCI Autoconfig: Found CardBus bridge, device %d function %d\n", PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn)); - /* Place CardBus Socket/ExCA registers */ - pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn); - - pciauto_prescan_setup_cardbus_bridge(hose, top_bus, - current_bus, pci_devfn, sub_bus); - - DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n", - sub_bus + 1, - pciauto_lower_iospc, pciauto_lower_memspc); - sub_bus = pciauto_bus_scan(hose, top_bus, sub_bus+1); - DBG("Back to bus %.2x, sub_bus is %x\n", current_bus, sub_bus); - pciauto_postscan_setup_cardbus_bridge(hose, top_bus, - current_bus, pci_devfn, sub_bus); - continue; - } else if ((pci_class >> 16) == PCI_CLASS_STORAGE_IDE) { - - unsigned char prg_iface; - - early_read_config_byte(hose, top_bus, current_bus, - pci_devfn, PCI_CLASS_PROG, &prg_iface); - if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) { - DBG("Skipping legacy mode IDE controller\n"); - continue; - } - } - - /* - * Found a peripheral, enable some standard - * settings - */ - early_read_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_COMMAND, &cmdstat); - early_write_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_COMMAND, cmdstat | PCI_COMMAND_IO | - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER); - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_LATENCY_TIMER, 0x80); - - /* Allocate PCI I/O and/or memory space */ - pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn); - } - return sub_bus; -} - -int __init -pciauto_assign_resources(int busno, struct pci_channel *hose) -{ - /* setup resource limits */ - io_resource_inuse = hose->io_resource; - mem_resource_inuse = hose->mem_resource; - - pciauto_lower_iospc = io_resource_inuse->start; - pciauto_upper_iospc = io_resource_inuse->end + 1; - pciauto_lower_memspc = mem_resource_inuse->start; - pciauto_upper_memspc = mem_resource_inuse->end + 1; - DBG("Autoconfig PCI channel 0x%p\n", hose); - DBG("Scanning bus %.2x, I/O 0x%.8x:0x%.8x, Mem 0x%.8x:0x%.8x\n", - busno, pciauto_lower_iospc, pciauto_upper_iospc, - pciauto_lower_memspc, pciauto_upper_memspc); - - return pciauto_bus_scan(hose, busno, busno); -} diff -puN -L arch/sh/kernel/pcibios.c arch/sh/kernel/pcibios.c~sh-merge /dev/null --- 25/arch/sh/kernel/pcibios.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,97 +0,0 @@ -/* - * $Id: pcibios.c,v 1.1 2001/08/24 12:38:19 dwmw2 Exp $ - * - * arch/sh/kernel/pcibios.c - * - * This is GPL'd. - * - * Provided here are generic versions of: - * pcibios_align_resource() - * pcibios_enable_device() - * pcibios_set_master() - * pcibios_update_irq() - * - * These functions are collected here to reduce duplication of common - * code amongst the many platform-specific PCI support code files. - * - * Platform-specific files are expected to provide: - * pcibios_fixup_bus() - * pcibios_init() - * pcibios_setup() - */ - -#include -#include -#include - -/* - * We need to avoid collisions with `mirrored' VGA ports - * and other strange ISA hardware, so we always want the - * addresses to be allocated in the 0x000-0x0ff region - * modulo 0x400. - */ -void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) -{ - if (res->flags & IORESOURCE_IO) { - unsigned long start = res->start; - - if (start & 0x300) { - start = (start + 0x3ff) & ~0x3ff; - res->start = start; - } - } -} - -int pcibios_enable_device(struct pci_dev *dev) -{ - u16 cmd, old_cmd; - int idx; - struct resource *r; - - pci_read_config_word(dev, PCI_COMMAND, &cmd); - old_cmd = cmd; - for(idx=0; idx<6; idx++) { - r = &dev->resource[idx]; - if (!r->start && r->end) { - printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev)); - return -EINVAL; - } - if (r->flags & IORESOURCE_IO) - cmd |= PCI_COMMAND_IO; - if (r->flags & IORESOURCE_MEM) - cmd |= PCI_COMMAND_MEMORY; - } - if (dev->resource[PCI_ROM_RESOURCE].start) - cmd |= PCI_COMMAND_MEMORY; - if (cmd != old_cmd) { - printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n", dev->name, old_cmd, cmd); - pci_write_config_word(dev, PCI_COMMAND, cmd); - } - return 0; -} - -/* - * If we set up a device for bus mastering, we need to check and set - * the latency timer as it may not be properly set. - */ -unsigned int pcibios_max_latency = 255; - -void pcibios_set_master(struct pci_dev *dev) -{ - u8 lat; - pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); - if (lat < 16) - lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency; - else if (lat > pcibios_max_latency) - lat = pcibios_max_latency; - else - return; - printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n", dev->name, lat); - pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); -} - -void __init pcibios_update_irq(struct pci_dev *dev, int irq) -{ - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); -} diff -puN -L arch/sh/kernel/pci.c arch/sh/kernel/pci.c~sh-merge /dev/null --- 25/arch/sh/kernel/pci.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,153 +0,0 @@ -/* arch/sh/kernel/pci.c - * $Id: pci.c,v 1.4 2003/05/25 01:29:24 lethal Exp $ - * - * Copyright (c) 2002 M. R. Brown - * - * - * These functions are collected here to reduce duplication of common - * code amongst the many platform-specific PCI support code files. - * - * These routines require the following board-specific routines: - * void pcibios_fixup(); - * void pcibios_fixup_irqs(); - * - * See include/asm-sh/pci.h for more information. - */ - -#include -#include -#include - -static int __init pcibios_init(void) -{ - struct pci_channel *p; - struct pci_bus *bus; - int busno; - -#ifdef CONFIG_PCI_AUTO - /* assign resources */ - busno=0; - for (p = board_pci_channels; p->pci_ops != NULL; p++) { - busno = pciauto_assign_resources(busno, p) + 1; - } -#endif - - /* scan the buses */ - busno = 0; - for (p= board_pci_channels; p->pci_ops != NULL; p++) { - bus = pci_scan_bus(busno, p->pci_ops, p); - busno = bus->subordinate+1; - } - - /* board-specific fixups */ - pcibios_fixup(); - pcibios_fixup_irqs(); - - return 0; -} - -subsys_initcall(pcibios_init); - -void -pcibios_update_resource(struct pci_dev *dev, struct resource *root, - struct resource *res, int resource) -{ - u32 new, check; - int reg; - - new = res->start | (res->flags & PCI_REGION_FLAG_MASK); - if (resource < 6) { - reg = PCI_BASE_ADDRESS_0 + 4*resource; - } else if (resource == PCI_ROM_RESOURCE) { - res->flags |= PCI_ROM_ADDRESS_ENABLE; - new |= PCI_ROM_ADDRESS_ENABLE; - reg = dev->rom_base_reg; - } else { - /* Somebody might have asked allocation of a non-standard resource */ - return; - } - - pci_write_config_dword(dev, reg, new); - pci_read_config_dword(dev, reg, &check); - if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) { - printk(KERN_ERR "PCI: Error while updating region " - "%s/%d (%08x != %08x)\n", pci_name(dev), resource, - new, check); - } -} - -void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) - __attribute__ ((weak)); - -/* - * We need to avoid collisions with `mirrored' VGA ports - * and other strange ISA hardware, so we always want the - * addresses to be allocated in the 0x000-0x0ff region - * modulo 0x400. - */ -void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) -{ - if (res->flags & IORESOURCE_IO) { - unsigned long start = res->start; - - if (start & 0x300) { - start = (start + 0x3ff) & ~0x3ff; - res->start = start; - } - } -} - -int pcibios_enable_device(struct pci_dev *dev, int mask) -{ - u16 cmd, old_cmd; - int idx; - struct resource *r; - - pci_read_config_word(dev, PCI_COMMAND, &cmd); - old_cmd = cmd; - for(idx=0; idx<6; idx++) { - r = &dev->resource[idx]; - if (!r->start && r->end) { - printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev)); - return -EINVAL; - } - if (r->flags & IORESOURCE_IO) - cmd |= PCI_COMMAND_IO; - if (r->flags & IORESOURCE_MEM) - cmd |= PCI_COMMAND_MEMORY; - } - if (dev->resource[PCI_ROM_RESOURCE].start) - cmd |= PCI_COMMAND_MEMORY; - if (cmd != old_cmd) { - printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n", dev->dev.name, old_cmd, cmd); - pci_write_config_word(dev, PCI_COMMAND, cmd); - } - return 0; -} - -/* - * If we set up a device for bus mastering, we need to check and set - * the latency timer as it may not be properly set. - */ -unsigned int pcibios_max_latency = 255; - -void pcibios_set_master(struct pci_dev *dev) -{ - u8 lat; - pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); - if (lat < 16) - lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency; - else if (lat > pcibios_max_latency) - lat = pcibios_max_latency; - else - return; - printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n", dev->dev.name, lat); - pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); -} - -void __init pcibios_update_irq(struct pci_dev *dev, int irq) -{ - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); -} diff -puN -L arch/sh/kernel/pci-dma.c arch/sh/kernel/pci-dma.c~sh-merge /dev/null --- 25/arch/sh/kernel/pci-dma.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,42 +0,0 @@ -/* - * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Dynamic DMA mapping support. - */ - -#include -#include -#include -#include -#include -#include - - -void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, - dma_addr_t * dma_handle) -{ - void *ret; - int gfp = GFP_ATOMIC; - - ret = (void *) __get_free_pages(gfp, get_order(size)); - - if (ret != NULL) { - /* Is it necessary to do the memset? */ - memset(ret, 0, size); - *dma_handle = virt_to_phys(ret); - } - /* We must flush the cache before we pass it on to the device */ - dma_cache_wback_inv(ret, size); - return P2SEGADDR(ret); -} - -void pci_free_consistent(struct pci_dev *hwdev, size_t size, - void *vaddr, dma_addr_t dma_handle) -{ - unsigned long p1addr=P1SEGADDR((unsigned long)vaddr); - - free_pages(p1addr, get_order(size)); -} diff -puN arch/sh/kernel/process.c~sh-merge arch/sh/kernel/process.c --- 25/arch/sh/kernel/process.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/process.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: process.c,v 1.17 2003/05/27 21:37:11 lethal Exp $ +/* $Id: process.c,v 1.24 2003/11/28 23:05:43 kkojima Exp $ * * linux/arch/sh/kernel/process.c * @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -27,6 +28,8 @@ static int hlt_counter=0; +int ubc_usercnt = 0; + #define HARD_IDLE_TIMEOUT (HZ / 3) void disable_hlt(void) @@ -47,19 +50,9 @@ void default_idle(void) { /* endless idle loop with no priority at all */ while (1) { - if (hlt_counter) { - while (1) - if (need_resched()) - break; - } else { - local_irq_disable(); - while (!need_resched()) { - local_irq_enable(); - asm volatile("sleep" : : : "memory"); - local_irq_disable(); - } - local_irq_enable(); - } + while (!need_resched()) + cpu_relax(); + schedule(); } } @@ -81,7 +74,7 @@ EXPORT_SYMBOL(machine_restart); void machine_halt(void) { while (1) - asm volatile("sleep" : : : "memory"); + cpu_relax(); } EXPORT_SYMBOL(machine_halt); @@ -95,8 +88,17 @@ EXPORT_SYMBOL(machine_power_off); void show_regs(struct pt_regs * regs) { printk("\n"); - printk("PC : %08lx SP : %08lx SR : %08lx TEA : %08x %s\n", - regs->pc, regs->regs[15], regs->sr, ctrl_inl(MMU_TEA), print_tainted()); + printk("Pid : %d, Comm: %20s\n", current->pid, current->comm); + print_symbol("PC is at %s\n", regs->pc); + printk("PC : %08lx SP : %08lx SR : %08lx ", + regs->pc, regs->regs[15], regs->sr); +#ifdef CONFIG_MMU + printk("TEA : %08x ", ctrl_inl(MMU_TEA)); +#else + printk(" "); +#endif + printk("%s\n", print_tainted()); + printk("R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n", regs->regs[0],regs->regs[1], regs->regs[2],regs->regs[3]); @@ -162,7 +164,10 @@ int kernel_thread(int (*fn)(void *), voi */ void exit_thread(void) { - /* Nothing to do. */ + if (current->thread.ubc_pc) { + current->thread.ubc_pc = 0; + ubc_usercnt -= 1; + } } void flush_thread(void) @@ -207,7 +212,11 @@ int dump_task_regs(struct task_struct *t struct pt_regs ptregs; ptregs = *(struct pt_regs *) - ((unsigned long)tsk->thread_info+THREAD_SIZE - sizeof(ptregs)); + ((unsigned long)tsk->thread_info+THREAD_SIZE - sizeof(ptregs) +#ifdef CONFIG_SH_DSP + - sizeof(struct pt_dspregs) +#endif + - sizeof(unsigned long)); elf_core_copy_regs(regs, &ptregs); return 1; @@ -237,7 +246,12 @@ int copy_thread(int nr, unsigned long cl { struct pt_regs *childregs; - childregs = ((struct pt_regs *)(THREAD_SIZE + (unsigned long) p->thread_info)) - 1; + childregs = ((struct pt_regs *) + (THREAD_SIZE + (unsigned long) p->thread_info) +#ifdef CONFIG_SH_DSP + - sizeof(struct pt_dspregs) +#endif + - sizeof(unsigned long)) - 1; *childregs = *regs; if (user_mode(regs)) { @@ -255,6 +269,8 @@ int copy_thread(int nr, unsigned long cl p->thread.sp = (unsigned long) childregs; p->thread.pc = (unsigned long) ret_from_fork; + p->thread.ubc_pc = 0; + #if defined(CONFIG_CPU_SH4) { struct task_struct *tsk = current; @@ -288,6 +304,27 @@ void dump_thread(struct pt_regs * regs, dump->u_fpvalid = dump_fpu(regs, &dump->fpu); } +/* Tracing by user break controller. */ +static void +ubc_set_tracing(int asid, unsigned long pc) +{ + ctrl_outl(pc, UBC_BARA); + + /* We don't have any ASID settings for the SH-2! */ + if (cpu_data->type != CPU_SH7604) + ctrl_outb(asid, UBC_BASRA); + + ctrl_outl(0, UBC_BAMRA); + + if (cpu_data->type == CPU_SH7729) { + ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA); + ctrl_outl(BRCR_PCBA | BRCR_PCTE, UBC_BRCR); + } else { + ctrl_outw(BBR_INST | BBR_READ, UBC_BBRA); + ctrl_outw(BRCR_PCBA, UBC_BRCR); + } +} + /* * switch_to(x,y) should switch tasks from x to y. * @@ -305,6 +342,19 @@ struct task_struct *__switch_to(struct t : /* no output */ : "r" (next->thread_info)); +#ifdef CONFIG_MMU + /* If no tasks are using the UBC, we're done */ + if (ubc_usercnt == 0) + /* If no tasks are using the UBC, we're done */; + else if (next->thread.ubc_pc && next->mm) { + ubc_set_tracing(next->mm->context & MMU_CONTEXT_ASID_MASK, + next->thread.ubc_pc); + } else { + ctrl_outw(0, UBC_BBRA); + ctrl_outw(0, UBC_BBRB); + } +#endif + return prev; } @@ -328,7 +378,7 @@ asmlinkage int sys_clone(unsigned long c if (!newsp) newsp = regs.regs[15]; return do_fork(clone_flags & ~CLONE_IDLETASK, newsp, ®s, 0, - (int *)parent_tidptr, (int *)child_tidptr); + (int __user *)parent_tidptr, (int __user *)child_tidptr); } /* @@ -359,12 +409,15 @@ asmlinkage int sys_execve(char *ufilenam int error; char *filename; - filename = getname(ufilename); + filename = getname((char __user *)ufilename); error = PTR_ERR(filename); if (IS_ERR(filename)) goto out; - error = do_execve(filename, uargv, uenvp, ®s); + error = do_execve(filename, + (char __user * __user *)uargv, + (char __user * __user *)uenvp, + ®s); if (error == 0) current->ptrace &= ~PT_DTRACE; putname(filename); @@ -406,6 +459,8 @@ asmlinkage void break_point_trap(unsigne /* Clear tracing. */ ctrl_outw(0, UBC_BBRA); ctrl_outw(0, UBC_BBRB); + current->thread.ubc_pc = 0; + ubc_usercnt -= 1; force_sig(SIGTRAP, current); } diff -puN arch/sh/kernel/ptrace.c~sh-merge arch/sh/kernel/ptrace.c --- 25/arch/sh/kernel/ptrace.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/ptrace.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: ptrace.c,v 1.9 2003/05/06 23:28:47 lethal Exp $ +/* $Id: ptrace.c,v 1.14 2003/11/28 23:05:43 kkojima Exp $ * * linux/arch/sh/kernel/ptrace.c * @@ -41,7 +41,12 @@ static inline int get_stack_long(struct { unsigned char *stack; - stack = (unsigned char *)task->thread_info + THREAD_SIZE - sizeof(struct pt_regs); + stack = (unsigned char *) + task->thread_info + THREAD_SIZE - sizeof(struct pt_regs) +#ifdef CONFIG_SH_DSP + - sizeof(struct pt_dspregs) +#endif + - sizeof(unsigned long); stack += offset; return (*((int *)stack)); } @@ -54,97 +59,17 @@ static inline int put_stack_long(struct { unsigned char *stack; - stack = (unsigned char *)task->thread_info + THREAD_SIZE - sizeof(struct pt_regs); + stack = (unsigned char *) + task->thread_info + THREAD_SIZE - sizeof(struct pt_regs) +#ifdef CONFIG_SH_DSP + - sizeof(struct pt_dspregs) +#endif + - sizeof(unsigned long); stack += offset; *(unsigned long *) stack = data; return 0; } -static void -compute_next_pc(struct pt_regs *regs, unsigned short inst, - unsigned long *pc1, unsigned long *pc2) -{ - int nib[4] - = { (inst >> 12) & 0xf, - (inst >> 8) & 0xf, - (inst >> 4) & 0xf, - inst & 0xf}; - - /* bra & bsr */ - if (nib[0] == 0xa || nib[0] == 0xb) { - *pc1 = regs->pc + 4 + ((short) ((inst & 0xfff) << 4) >> 3); - *pc2 = (unsigned long) -1; - return; - } - - /* bt & bf */ - if (nib[0] == 0x8 && (nib[1] == 0x9 || nib[1] == 0xb)) { - *pc1 = regs->pc + 4 + ((char) (inst & 0xff) << 1); - *pc2 = regs->pc + 2; - return; - } - - /* bt/s & bf/s */ - if (nib[0] == 0x8 && (nib[1] == 0xd || nib[1] == 0xf)) { - *pc1 = regs->pc + 4 + ((char) (inst & 0xff) << 1); - *pc2 = regs->pc + 4; - return; - } - - /* jmp & jsr */ - if (nib[0] == 0x4 && nib[3] == 0xb - && (nib[2] == 0x0 || nib[2] == 0x2)) { - *pc1 = regs->regs[nib[1]]; - *pc2 = (unsigned long) -1; - return; - } - - /* braf & bsrf */ - if (nib[0] == 0x0 && nib[3] == 0x3 - && (nib[2] == 0x0 || nib[2] == 0x2)) { - *pc1 = regs->pc + 4 + regs->regs[nib[1]]; - *pc2 = (unsigned long) -1; - return; - } - - if (inst == 0x000b) { - *pc1 = regs->pr; - *pc2 = (unsigned long) -1; - return; - } - - *pc1 = regs->pc + 2; - *pc2 = (unsigned long) -1; - return; -} - -/* Tracing by user break controller. */ -static void -ubc_set_tracing(int asid, unsigned long nextpc1, unsigned nextpc2) -{ - ctrl_outl(nextpc1, UBC_BARA); - ctrl_outb(asid, UBC_BASRA); - ctrl_outl(0, UBC_BAMRA); - if(UBC_TYPE_SH7729) - ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA); - else - ctrl_outw(BBR_INST | BBR_READ, UBC_BBRA); - - if (nextpc2 != (unsigned long) -1) { - ctrl_outl(nextpc2, UBC_BARB); - ctrl_outb(asid, UBC_BASRB); - ctrl_outl(0, UBC_BAMRB); - if(UBC_TYPE_SH7729) - ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRB); - else - ctrl_outw(BBR_INST | BBR_READ, UBC_BBRB); - } - if(UBC_TYPE_SH7729) - ctrl_outl(BRCR_PCTE, UBC_BRCR); - else - ctrl_outw(0, UBC_BRCR); -} - /* * Called by kernel/ptrace.c when detaching.. * @@ -300,11 +225,8 @@ asmlinkage int sys_ptrace(long request, } case PTRACE_SINGLESTEP: { /* set the trap flag. */ - long tmp, pc; + long pc; struct pt_regs *dummy = NULL; - struct pt_regs *regs; - unsigned long nextpc1, nextpc2; - unsigned short insn; ret = -EIO; if ((unsigned long) data > _NSIG) @@ -315,34 +237,12 @@ asmlinkage int sys_ptrace(long request, child->ptrace |= PT_DTRACE; } - /* Compute next pc. */ pc = get_stack_long(child, (long)&dummy->pc); - regs = (struct pt_regs *)(THREAD_SIZE + (unsigned long)child->thread_info) - 1; - if (access_process_vm(child, pc&~3, &tmp, sizeof(tmp), 0) != sizeof(tmp)) - break; - -#ifdef __LITTLE_ENDIAN__ - if (pc & 3) - insn = tmp >> 16; - else - insn = tmp & 0xffff; -#else - if (pc & 3) - insn = tmp & 0xffff; - else - insn = tmp >> 16; -#endif - compute_next_pc(regs, insn, &nextpc1, &nextpc2); - - if (nextpc1 & 0x80000000) - break; - if (nextpc2 != (unsigned long) -1 && (nextpc2 & 0x80000000)) - break; -#ifdef CONFIG_MMU - ubc_set_tracing(child->mm->context & MMU_CONTEXT_ASID_MASK, - nextpc1, nextpc2); -#endif + /* Next scheduling will set up UBC */ + if (child->thread.ubc_pc == 0) + ubc_usercnt += 1; + child->thread.ubc_pc = pc; child->exit_code = data; /* give it a chance to run. */ @@ -362,7 +262,36 @@ asmlinkage int sys_ptrace(long request, child->ptrace &= ~PT_TRACESYSGOOD; ret = 0; break; +#ifdef CONFIG_SH_DSP + case PTRACE_GETDSPREGS: { + unsigned long dp; + + ret = -EIO; + dp = ((unsigned long) child) + THREAD_SIZE - + sizeof(struct pt_dspregs); + if (*((int *) (dp - 4)) == SR_FD) { + copy_to_user(addr, (void *) dp, + sizeof(struct pt_dspregs)); + ret = 0; + } + break; + } + + case PTRACE_SETDSPREGS: { + unsigned long dp; + int i; + ret = -EIO; + dp = ((unsigned long) child) + THREAD_SIZE - + sizeof(struct pt_dspregs); + if (*((int *) (dp - 4)) == SR_FD) { + copy_from_user((void *) dp, addr, + sizeof(struct pt_dspregs)); + ret = 0; + } + break; + } +#endif default: ret = ptrace_request(child, request, addr, data); break; diff -puN -L arch/sh/kernel/rtc.c arch/sh/kernel/rtc.c~sh-merge /dev/null --- 25/arch/sh/kernel/rtc.c +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,124 +0,0 @@ -/* - * linux/arch/sh/kernel/rtc.c -- SH3 / SH4 on-chip RTC support - * - * Copyright (C) 2000 Philipp Rumpf - * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka - */ - -#include -#include -#include -#include -#include - -#include -#include - -void sh_rtc_gettimeofday(struct timeval *tv) -{ - unsigned int sec128, sec, min, hr, wk, day, mon, yr, yr100; - - again: - do { - ctrl_outb(0, RCR1); /* Clear CF-bit */ - sec128 = ctrl_inb(R64CNT); - sec = ctrl_inb(RSECCNT); - min = ctrl_inb(RMINCNT); - hr = ctrl_inb(RHRCNT); - wk = ctrl_inb(RWKCNT); - day = ctrl_inb(RDAYCNT); - mon = ctrl_inb(RMONCNT); -#if defined(__SH4__) - yr = ctrl_inw(RYRCNT); - yr100 = (yr >> 8); - yr &= 0xff; -#else - yr = ctrl_inb(RYRCNT); - yr100 = (yr == 0x99) ? 0x19 : 0x20; -#endif - } while ((ctrl_inb(RCR1) & RCR1_CF) != 0); - -#if RTC_BIT_INVERTED != 0 - /* Work around to avoid reading incorrect value. */ - if (sec128 == RTC_BIT_INVERTED) { - schedule_timeout(1); - goto again; - } -#endif - - BCD_TO_BIN(yr100); - BCD_TO_BIN(yr); - BCD_TO_BIN(mon); - BCD_TO_BIN(day); - BCD_TO_BIN(hr); - BCD_TO_BIN(min); - BCD_TO_BIN(sec); - - if (yr > 99 || mon < 1 || mon > 12 || day > 31 || day < 1 || - hr > 23 || min > 59 || sec > 59) { - printk(KERN_ERR - "SH RTC: invalid value, resetting to 1 Jan 2000\n"); - ctrl_outb(RCR2_RESET, RCR2); /* Reset & Stop */ - ctrl_outb(0, RSECCNT); - ctrl_outb(0, RMINCNT); - ctrl_outb(0, RHRCNT); - ctrl_outb(6, RWKCNT); - ctrl_outb(1, RDAYCNT); - ctrl_outb(1, RMONCNT); -#if defined(__SH4__) - ctrl_outw(0x2000, RYRCNT); -#else - ctrl_outb(0, RYRCNT); -#endif - ctrl_outb(RCR2_RTCEN|RCR2_START, RCR2); /* Start */ - goto again; - } - -#if RTC_BIT_INVERTED != 0 - if ((sec128 & RTC_BIT_INVERTED)) - sec--; -#endif - - tv->tv_sec = mktime(yr100 * 100 + yr, mon, day, hr, min, sec); - tv->tv_usec = (sec128 * 1000000) / 128; -} - -int sh_rtc_settimeofday(const struct timeval *tv) -{ - unsigned long nowtime = tv->tv_sec; - int retval = 0; - int real_seconds, real_minutes, cmos_minutes; - - ctrl_outb(RCR2_RESET, RCR2); /* Reset pre-scaler & stop RTC */ - - cmos_minutes = ctrl_inb(RMINCNT); - BCD_TO_BIN(cmos_minutes); - - /* - * since we're only adjusting minutes and seconds, - * don't interfere with hour overflow. This avoids - * messing with unknown time zones but requires your - * RTC not to be off by more than 15 minutes - */ - real_seconds = nowtime % 60; - real_minutes = nowtime / 60; - if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) - real_minutes += 30; /* correct for half hour time zone */ - real_minutes %= 60; - - if (abs(real_minutes - cmos_minutes) < 30) { - BIN_TO_BCD(real_seconds); - BIN_TO_BCD(real_minutes); - ctrl_outb(real_seconds, RSECCNT); - ctrl_outb(real_minutes, RMINCNT); - } else { - printk(KERN_WARNING - "set_rtc_time: can't update from %d to %d\n", - cmos_minutes, real_minutes); - retval = -1; - } - - ctrl_outb(RCR2_RTCEN|RCR2_START, RCR2); /* Start RTC */ - - return retval; -} diff -puN arch/sh/kernel/setup.c~sh-merge arch/sh/kernel/setup.c --- 25/arch/sh/kernel/setup.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/setup.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: setup.c,v 1.17 2003/05/20 01:51:37 lethal Exp $ +/* $Id: setup.c,v 1.30 2003/10/13 07:21:19 lethal Exp $ * * linux/arch/sh/kernel/setup.c * @@ -10,38 +10,21 @@ * This file handles the architecture-dependent parts of initialization */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include #include #include -#include -#include #include #include #include #include -#include #include -#include #include #include #include -#include -#include -#include #include -#include #include #include -#include +#include +#include #ifdef CONFIG_SH_EARLY_PRINTK #include #endif @@ -63,7 +46,6 @@ static int kgdb_parse_options(char *opti struct sh_cpuinfo boot_cpu_data = { CPU_SH_NONE, 0, 10000000, }; struct screen_info screen_info; unsigned char aux_device_present = 0xaa; -static int fpu_disabled __initdata = 0; #if defined(CONFIG_SH_UNKNOWN) struct sh_machine_vector sh_mv; @@ -82,11 +64,9 @@ struct screen_info screen_info = { 16 /* orig-video-points */ }; -extern void fpu_init(void); extern void platform_setup(void); extern char *get_system_type(void); extern int root_mountflags; -extern int _text, _etext, _edata, _end; #define MV_NAME_SIZE 32 @@ -174,7 +154,7 @@ static void scif_sercon_write(struct con static int __init scif_sercon_setup(struct console *con, char *options) { - con->cflag = CREAD | HUPCL | CLOCAL | B115200 | CS8; + con->cflag = CREAD | HUPCL | CLOCAL | B57600 | CS8; return 0; } @@ -333,7 +313,7 @@ static inline void parse_cmdline (char * *cmdline_p = command_line; } -void __init setup_arch(char **cmdline_p) +static int __init sh_mv_setup(char **cmdline_p) { #if defined(CONFIG_SH_UNKNOWN) extern struct sh_machine_vector mv_unknown; @@ -342,41 +322,11 @@ void __init setup_arch(char **cmdline_p) char mv_name[MV_NAME_SIZE] = ""; unsigned long mv_io_base = 0; int mv_mmio_enable = 0; - unsigned long bootmap_size; - unsigned long start_pfn, max_pfn, max_low_pfn; - -/* XXX: MRB-remove */ -#if 0 - scif_sercon_init(115200); -#endif -#ifdef CONFIG_SH_EARLY_PRINTK - sh_console_init(); -#endif - - ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); - -#ifdef CONFIG_BLK_DEV_RAM - rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK; - rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0); - rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0); -#endif - - if (!MOUNT_ROOT_RDONLY) - root_mountflags &= ~MS_RDONLY; - init_mm.start_code = (unsigned long)&_text; - init_mm.end_code = (unsigned long) &_etext; - init_mm.end_data = (unsigned long) &_edata; - init_mm.brk = (unsigned long) &_end; - - code_resource.start = virt_to_bus(&_text); - code_resource.end = virt_to_bus(&_etext)-1; - data_resource.start = virt_to_bus(&_etext); - data_resource.end = virt_to_bus(&_edata)-1; parse_cmdline(cmdline_p, mv_name, &mv, &mv_io_base, &mv_mmio_enable); #ifdef CONFIG_CMDLINE_BOOL - sprintf(*cmdline_p, CONFIG_CMDLINE); + sprintf(*cmdline_p, CONFIG_CMDLINE); #endif #ifdef CONFIG_SH_GENERIC @@ -393,42 +343,75 @@ void __init setup_arch(char **cmdline_p) sh_mv = mv_unknown; #endif -#if defined(CONFIG_SH_UNKNOWN) - if (mv_io_base != 0) { - sh_mv.mv_inb = generic_inb; - sh_mv.mv_inw = generic_inw; - sh_mv.mv_inl = generic_inl; - sh_mv.mv_outb = generic_outb; - sh_mv.mv_outw = generic_outw; - sh_mv.mv_outl = generic_outl; - - sh_mv.mv_inb_p = generic_inb_p; - sh_mv.mv_inw_p = generic_inw_p; - sh_mv.mv_inl_p = generic_inl_p; - sh_mv.mv_outb_p = generic_outb_p; - sh_mv.mv_outw_p = generic_outw_p; - sh_mv.mv_outl_p = generic_outl_p; - - sh_mv.mv_insb = generic_insb; - sh_mv.mv_insw = generic_insw; - sh_mv.mv_insl = generic_insl; - sh_mv.mv_outsb = generic_outsb; - sh_mv.mv_outsw = generic_outsw; - sh_mv.mv_outsl = generic_outsl; - - sh_mv.mv_isa_port2addr = generic_isa_port2addr; - generic_io_base = mv_io_base; - } - if (mv_mmio_enable != 0) { - sh_mv.mv_readb = generic_readb; - sh_mv.mv_readw = generic_readw; - sh_mv.mv_readl = generic_readl; - sh_mv.mv_writeb = generic_writeb; - sh_mv.mv_writew = generic_writew; - sh_mv.mv_writel = generic_writel; - } + /* + * Manually walk the vec, fill in anything that the board hasn't yet + * by hand, wrapping to the generic implementation. + */ +#define mv_set(elem) do { \ + if (!sh_mv.mv_##elem) \ + sh_mv.mv_##elem = generic_##elem; \ +} while (0) + + mv_set(inb); mv_set(inw); mv_set(inl); + mv_set(outb); mv_set(outw); mv_set(outl); + + mv_set(inb_p); mv_set(inw_p); mv_set(inl_p); + mv_set(outb_p); mv_set(outw_p); mv_set(outl_p); + + mv_set(insb); mv_set(insw); mv_set(insl); + mv_set(outsb); mv_set(outsw); mv_set(outsl); + + mv_set(readb); mv_set(readw); mv_set(readl); + mv_set(writeb); mv_set(writew); mv_set(writel); + + mv_set(ioremap); + mv_set(iounmap); + + mv_set(isa_port2addr); + mv_set(irq_demux); + +#ifdef CONFIG_SH_UNKNOWN + __set_io_port_base(mv_io_base); #endif + return 0; +} + +void __init setup_arch(char **cmdline_p) +{ + unsigned long bootmap_size; + unsigned long start_pfn, max_pfn, max_low_pfn; + +/* XXX: MRB-remove */ +#if 0 + scif_sercon_init(57600); +#endif +#ifdef CONFIG_SH_EARLY_PRINTK + sh_console_init(); +#endif + + ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); + +#ifdef CONFIG_BLK_DEV_RAM + rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK; + rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0); + rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0); +#endif + + if (!MOUNT_ROOT_RDONLY) + root_mountflags &= ~MS_RDONLY; + init_mm.start_code = (unsigned long) _text; + init_mm.end_code = (unsigned long) _etext; + init_mm.end_data = (unsigned long) _edata; + init_mm.brk = (unsigned long) _end; + + code_resource.start = virt_to_bus(_text); + code_resource.end = virt_to_bus(_etext)-1; + data_resource.start = virt_to_bus(_etext); + data_resource.end = virt_to_bus(_edata)-1; + + sh_mv_setup(cmdline_p); + #define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT) #define PFN_DOWN(x) ((x) >> PAGE_SHIFT) #define PFN_PHYS(x) ((x) << PAGE_SHIFT) @@ -459,7 +442,8 @@ void __init setup_arch(char **cmdline_p) * Partially used pages are not usable - thus * we are rounding upwards: */ - start_pfn = PFN_UP(__pa(&_end)); + start_pfn = PFN_UP(__pa(_end)); + /* * Find a proper area for the bootmem bitmap. After this * bootstrap step all allocations (until the page allocator @@ -524,40 +508,13 @@ void __init setup_arch(char **cmdline_p) } #endif -#ifdef CONFIG_VT -#if defined(CONFIG_VGA_CONSOLE) - conswitchp = &vga_con; -#elif defined(CONFIG_DUMMY_CONSOLE) +#ifdef CONFIG_DUMMY_CONSOLE conswitchp = &dummy_con; #endif -#endif /* Perform the machine specific initialisation */ platform_setup(); -#if defined(CONFIG_CPU_SH4) - /* FPU initialization */ - clear_thread_flag(TIF_USEDFPU); - current->used_math = 0; -#endif - - /* Disable the FPU */ - if (fpu_disabled) { - printk("FPU Disabled\n"); - cpu_data->flags &= ~CPU_HAS_FPU; - release_fpu(); - } - -#ifdef CONFIG_UBC_WAKEUP - /* - * Some brain-damaged loaders decided it would be a good idea to put - * the UBC to sleep. This causes some issues when it comes to things - * like PTRACE_SINGLESTEP or doing hardware watchpoints in GDB. So .. - * we wake it up and hope that all is well. - */ - ubc_wakeup(); -#endif - paging_init(); } @@ -599,17 +556,20 @@ static int __init topology_init(void) subsys_initcall(topology_init); static const char *cpu_name[] = { - [CPU_SH7604] "SH7604", - [CPU_SH7708] "SH7708", - [CPU_SH7729] "SH7729", - [CPU_SH7750] "SH7750", - [CPU_SH7750S] "SH7750S", - [CPU_SH7750R] "SH7750R", - [CPU_SH7751] "SH7751", - [CPU_SH7751R] "SH7751R", - [CPU_ST40RA] "ST40RA", - [CPU_ST40GX1] "ST40GX1", - [CPU_SH_NONE] "Unknown" + [CPU_SH7604] = "SH7604", + [CPU_SH7708] = "SH7708", + [CPU_SH7729] = "SH7729", + [CPU_SH7750] = "SH7750", + [CPU_SH7750S] = "SH7750S", + [CPU_SH7750R] = "SH7750R", + [CPU_SH7751] = "SH7751", + [CPU_SH7751R] = "SH7751R", + [CPU_SH7760] = "SH7760", + [CPU_ST40RA] = "ST40RA", + [CPU_ST40GX1] = "ST40GX1", + [CPU_SH4_202] = "SH4-202", + [CPU_SH4_501] = "SH4-501", + [CPU_SH_NONE] = "Unknown" }; const char *get_cpu_subtype(void) @@ -617,44 +577,73 @@ const char *get_cpu_subtype(void) return cpu_name[boot_cpu_data.type]; } +#ifdef CONFIG_PROC_FS +static const char *cpu_flags[] = { + "none", "fpu", "p2flush", "mmuassoc", "dsp", +}; + +static void show_cpuflags(struct seq_file *m) +{ + unsigned long i; + + seq_printf(m, "cpu flags\t:"); + + if (!cpu_data->flags) { + seq_printf(m, " %s\n", cpu_flags[0]); + return; + } + + for (i = 0; i < cpu_data->flags; i++) + if ((cpu_data->flags & (1 << i))) + seq_printf(m, " %s", cpu_flags[i]); + + seq_printf(m, "\n"); +} + +static void show_cacheinfo(struct seq_file *m, const char *type, struct cache_info info) +{ + unsigned int cache_size; + + cache_size = info.ways * info.sets * info.linesz; + + seq_printf(m, "%s size\t: %dKiB\n", type, cache_size >> 10); +} + /* * Get CPU information for use by the procfs. */ -#ifdef CONFIG_PROC_FS static int show_cpuinfo(struct seq_file *m, void *v) { - unsigned int dcachesz, icachesz; unsigned int cpu = smp_processor_id(); - icachesz = boot_cpu_data.icache.ways * - boot_cpu_data.icache.sets * - boot_cpu_data.icache.linesz; - if (!cpu && cpu_online(cpu)) seq_printf(m, "machine\t\t: %s\n", get_system_type()); seq_printf(m, "processor\t: %d\n", cpu); seq_printf(m, "cpu family\t: %s\n", system_utsname.machine); seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype()); - seq_printf(m, "cache size\t: %dK-bytes", icachesz >> 10); + + show_cpuflags(m); + + seq_printf(m, "cache type\t: "); /* - * SH-2 and SH-3 have a combined cache, thus there's no real - * I/D distinction .. so don't inadvertently double - * up the output. + * Check for what type of cache we have, we support both the + * unified cache on the SH-2 and SH-3, as well as the harvard + * style cache on the SH-4. */ - if (strcmp(system_utsname.machine, "sh2") || - strcmp(system_utsname.machine, "sh3")) { - dcachesz = boot_cpu_data.dcache.ways * - boot_cpu_data.dcache.sets * - boot_cpu_data.dcache.linesz; - - seq_printf(m, "/%dK-bytes", dcachesz >> 10); + if (test_bit(SH_CACHE_COMBINED, &(boot_cpu_data.icache.flags))) { + seq_printf(m, "unified\n"); + show_cacheinfo(m, "cache", boot_cpu_data.icache); + } else { + seq_printf(m, "split (harvard)\n"); + show_cacheinfo(m, "icache", boot_cpu_data.icache); + show_cacheinfo(m, "dcache", boot_cpu_data.dcache); } - seq_printf(m, "\nbogomips\t: %lu.%02lu\n", - loops_per_jiffy/(500000/HZ), - (loops_per_jiffy/(5000/HZ)) % 100); + seq_printf(m, "bogomips\t: %lu.%02lu\n", + boot_cpu_data.loops_per_jiffy/(500000/HZ), + (boot_cpu_data.loops_per_jiffy/(5000/HZ)) % 100); #define PRINT_CLOCK(name, value) \ seq_printf(m, name " clock\t: %d.%02dMHz\n", \ @@ -780,10 +769,3 @@ static int __init kgdb_parse_options(cha __setup("kgdb=", kgdb_parse_options); #endif /* CONFIG_SH_KGDB */ -static int __init fpu_setup(char *opts) -{ - fpu_disabled = 1; - return 0; -} -__setup("nofpu", fpu_setup); - diff -puN arch/sh/kernel/sh_bios.c~sh-merge arch/sh/kernel/sh_bios.c --- 25/arch/sh/kernel/sh_bios.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/sh_bios.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: sh_bios.c,v 1.5 2001/01/08 08:42:32 gniibe Exp $ +/* $Id: sh_bios.c,v 1.2 2003/05/04 19:29:53 lethal Exp $ * * linux/arch/sh/kernel/sh_bios.c * C interface for trapping into the standard LinuxSH BIOS. diff -puN arch/sh/kernel/sh_ksyms.c~sh-merge arch/sh/kernel/sh_ksyms.c --- 25/arch/sh/kernel/sh_ksyms.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/sh_ksyms.c 2004-01-09 21:32:27.000000000 -0800 @@ -25,6 +25,8 @@ extern void dump_thread(struct pt_regs * extern int dump_fpu(struct pt_regs *, elf_fpregset_t *); extern struct hw_interrupt_type no_irq_type; +EXPORT_SYMBOL(sh_mv); + /* platform dependent support */ EXPORT_SYMBOL(dump_thread); EXPORT_SYMBOL(dump_fpu); @@ -71,7 +73,9 @@ EXPORT_SYMBOL(screen_info); EXPORT_SYMBOL(boot_cpu_data); +#ifdef CONFIG_MMU EXPORT_SYMBOL(get_vm_area); +#endif /* semaphore exports */ EXPORT_SYMBOL(__up); diff -puN arch/sh/kernel/signal.c~sh-merge arch/sh/kernel/signal.c --- 25/arch/sh/kernel/signal.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/signal.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: signal.c,v 1.15 2003/05/06 23:28:47 lethal Exp $ +/* $Id: signal.c,v 1.19 2003/10/13 07:21:19 lethal Exp $ * * linux/arch/sh/kernel/signal.c * @@ -93,8 +93,8 @@ sys_rt_sigsuspend(sigset_t *unewset, siz } asmlinkage int -sys_sigaction(int sig, const struct old_sigaction *act, - struct old_sigaction *oact) +sys_sigaction(int sig, const struct old_sigaction __user *act, + struct old_sigaction __user *oact) { struct k_sigaction new_ka, old_ka; int ret; @@ -125,7 +125,7 @@ sys_sigaction(int sig, const struct old_ } asmlinkage int -sys_sigaltstack(const stack_t *uss, stack_t *uoss, +sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, unsigned long r6, unsigned long r7, struct pt_regs regs) { @@ -137,24 +137,26 @@ sys_sigaltstack(const stack_t *uss, stac * Do a signal return; undo the signal stack. */ +#define MOVW(n) (0x9300|((n)-2)) /* Move mem word at PC+n to R3 */ +#define TRAP16 0xc310 /* Syscall w/no args (NR in R3) */ +#define OR_R0_R0 0x200b /* or r0,r0 (insert to avoid hardware bug) */ + struct sigframe { struct sigcontext sc; unsigned long extramask[_NSIG_WORDS-1]; - char retcode[4]; + u16 retcode[8]; }; struct rt_sigframe { - struct siginfo *pinfo; - void *puc; struct siginfo info; struct ucontext uc; - char retcode[4]; + u16 retcode[8]; }; #ifdef CONFIG_CPU_SH4 -static inline int restore_sigcontext_fpu(struct sigcontext *sc) +static inline int restore_sigcontext_fpu(struct sigcontext __user *sc) { struct task_struct *tsk = current; @@ -166,7 +168,7 @@ static inline int restore_sigcontext_fpu sizeof(long)*(16*2+2)); } -static inline int save_sigcontext_fpu(struct sigcontext *sc) +static inline int save_sigcontext_fpu(struct sigcontext __user *sc) { struct task_struct *tsk = current; @@ -192,7 +194,7 @@ static inline int save_sigcontext_fpu(st #endif /* CONFIG_CPU_SH4 */ static int -restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc, int *r0_p) +restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, int *r0_p) { unsigned int err = 0; @@ -233,7 +235,7 @@ asmlinkage int sys_sigreturn(unsigned lo unsigned long r6, unsigned long r7, struct pt_regs regs) { - struct sigframe *frame = (struct sigframe *)regs.regs[15]; + struct sigframe __user *frame = (struct sigframe __user *)regs.regs[15]; sigset_t set; int r0; @@ -266,7 +268,7 @@ asmlinkage int sys_rt_sigreturn(unsigned unsigned long r6, unsigned long r7, struct pt_regs regs) { - struct rt_sigframe *frame = (struct rt_sigframe *)regs.regs[15]; + struct rt_sigframe __user *frame = (struct rt_sigframe __user *)regs.regs[15]; sigset_t set; stack_t st; int r0; @@ -304,7 +306,7 @@ badframe: */ static int -setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs, +setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, unsigned long mask) { int err = 0; @@ -336,19 +338,19 @@ setup_sigcontext(struct sigcontext *sc, /* * Determine which stack to use.. */ -static inline void * +static inline void __user * get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size) { if ((ka->sa.sa_flags & SA_ONSTACK) != 0 && ! on_sig_stack(sp)) sp = current->sas_ss_sp + current->sas_ss_size; - return (void *)((sp - frame_size) & -8ul); + return (void __user *)((sp - frame_size) & -8ul); } static void setup_frame(int sig, struct k_sigaction *ka, sigset_t *set, struct pt_regs *regs) { - struct sigframe *frame; + struct sigframe __user *frame; int err = 0; int signal; @@ -375,15 +377,16 @@ static void setup_frame(int sig, struct if (ka->sa.sa_flags & SA_RESTORER) { regs->pr = (unsigned long) ka->sa.sa_restorer; } else { - /* This is : mov #__NR_sigreturn,r3 ; trapa #0x10 */ -#ifdef __LITTLE_ENDIAN__ - unsigned long code = 0xc310e300 | (__NR_sigreturn); -#else - unsigned long code = 0xe300c310 | (__NR_sigreturn << 16); -#endif - + /* Generate return code (system call to sigreturn) */ + err |= __put_user(MOVW(7), &frame->retcode[0]); + err |= __put_user(TRAP16, &frame->retcode[1]); + err |= __put_user(OR_R0_R0, &frame->retcode[2]); + err |= __put_user(OR_R0_R0, &frame->retcode[3]); + err |= __put_user(OR_R0_R0, &frame->retcode[4]); + err |= __put_user(OR_R0_R0, &frame->retcode[5]); + err |= __put_user(OR_R0_R0, &frame->retcode[6]); + err |= __put_user((__NR_sigreturn), &frame->retcode[7]); regs->pr = (unsigned long) frame->retcode; - err |= __put_user(code, (long *)(frame->retcode+0)); } if (err) @@ -392,6 +395,8 @@ static void setup_frame(int sig, struct /* Set up registers for signal handler */ regs->regs[15] = (unsigned long) frame; regs->regs[4] = signal; /* Arg for signal handler */ + regs->regs[5] = 0; + regs->regs[6] = (unsigned long) &frame->sc; regs->pc = (unsigned long) ka->sa.sa_handler; set_fs(USER_DS); @@ -402,6 +407,8 @@ static void setup_frame(int sig, struct #endif flush_cache_sigtramp(regs->pr); + if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode)) + flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES); return; give_sigsegv: @@ -413,7 +420,7 @@ give_sigsegv: static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *set, struct pt_regs *regs) { - struct rt_sigframe *frame; + struct rt_sigframe __user *frame; int err = 0; int signal; @@ -428,8 +435,6 @@ static void setup_rt_frame(int sig, stru ? current_thread_info()->exec_domain->signal_invmap[sig] : sig; - err |= __put_user(&frame->info, &frame->pinfo); - err |= __put_user(&frame->uc, &frame->puc); err |= copy_siginfo_to_user(&frame->info, info); /* Create the ucontext. */ @@ -449,15 +454,16 @@ static void setup_rt_frame(int sig, stru if (ka->sa.sa_flags & SA_RESTORER) { regs->pr = (unsigned long) ka->sa.sa_restorer; } else { - /* This is : mov #__NR_rt_sigreturn,r3 ; trapa #0x10 */ -#ifdef __LITTLE_ENDIAN__ - unsigned long code = 0xc310e300 | (__NR_rt_sigreturn); -#else - unsigned long code = 0xe300c310 | (__NR_rt_sigreturn << 16); -#endif - + /* Generate return code (system call to rt_sigreturn) */ + err |= __put_user(MOVW(7), &frame->retcode[0]); + err |= __put_user(TRAP16, &frame->retcode[1]); + err |= __put_user(OR_R0_R0, &frame->retcode[2]); + err |= __put_user(OR_R0_R0, &frame->retcode[3]); + err |= __put_user(OR_R0_R0, &frame->retcode[4]); + err |= __put_user(OR_R0_R0, &frame->retcode[5]); + err |= __put_user(OR_R0_R0, &frame->retcode[6]); + err |= __put_user((__NR_rt_sigreturn), &frame->retcode[7]); regs->pr = (unsigned long) frame->retcode; - err |= __put_user(code, (long *)(frame->retcode+0)); } if (err) @@ -466,6 +472,8 @@ static void setup_rt_frame(int sig, stru /* Set up registers for signal handler */ regs->regs[15] = (unsigned long) frame; regs->regs[4] = signal; /* Arg for signal handler */ + regs->regs[5] = (unsigned long) &frame->info; + regs->regs[6] = (unsigned long) &frame->uc; regs->pc = (unsigned long) ka->sa.sa_handler; set_fs(USER_DS); @@ -476,6 +484,8 @@ static void setup_rt_frame(int sig, stru #endif flush_cache_sigtramp(regs->pr); + if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode)) + flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES); return; give_sigsegv: diff -puN /dev/null arch/sh/kernel/smp.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/kernel/smp.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,207 @@ +/* + * arch/sh/kernel/smp.c + * + * SMP support for the SuperH processors. + * + * Copyright (C) 2002, 2003 Paul Mundt + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +/* + * This was written with the Sega Saturn (SMP SH-2 7604) in mind, + * but is designed to be usable regardless if there's an MMU + * present or not. + */ +int smp_threads_ready = 0; +struct sh_cpuinfo cpu_data[NR_CPUS]; + +extern int cpu_idle(void *unused); +extern void per_cpu_trap_init(void); + +cpumask_t cpu_possible_map; +cpumask_t cpu_online_map; +unsigned long cache_decay_ticks = HZ / 100; +static atomic_t cpus_booted = ATOMIC_INIT(0); + +/* These are defined by the board-specific code. */ + +/* + * Cause the function described by call_data to be executed on the passed + * cpu. When the function has finished, increment the finished field of + * call_data. + */ +void __smp_send_ipi(unsigned int cpu, unsigned int action); + +/* + * Find the number of available processors + */ +unsigned int __smp_probe_cpus(void); + +/* + * Start a particular processor + */ +void __smp_slave_init(unsigned int cpu); + +/* + * Run specified function on a particular processor. + */ +void __smp_call_function(unsigned int cpu); + +static inline void __init smp_store_cpu_info(unsigned int cpu) +{ + cpu_data[cpu].loops_per_jiffy = loops_per_jiffy; +} + +void __init smp_prepare_cpus(unsigned int max_cpus) +{ + unsigned int cpu = smp_processor_id(); + int i; + + atomic_set(&cpus_booted, 1); + smp_store_cpu_info(cpu); + + for (i = 0; i < __smp_probe_cpus(); i++) + cpu_set(i, cpu_possible_map); +} + +void __devinit smp_prepare_boot_cpu(void) +{ + unsigned int cpu = smp_processor_id(); + + cpu_set(cpu, cpu_online_map); + cpu_set(cpu, cpu_possible_map); +} + +int __cpu_up(unsigned int cpu) +{ + struct task_struct *tsk; + struct pt_regs regs; + + memset(®s, 0, sizeof(struct pt_regs)); + tsk = copy_process(CLONE_VM | CLONE_IDLETASK, 0, ®s, 0, 0, 0); + + if (IS_ERR(tsk)) + panic("Failed forking idle task for cpu %d\n", cpu); + + wake_up_forked_process(tsk); + + init_idle(tsk, cpu); + unhash_process(tsk); + + tsk->thread_info->cpu = cpu; + + cpu_set(cpu, cpu_online_map); + + return 0; +} + +int start_secondary(void *unused) +{ + unsigned int cpu = smp_processor_id(); + + atomic_inc(&init_mm.mm_count); + current->active_mm = &init_mm; + + smp_store_cpu_info(cpu); + + __smp_slave_init(cpu); + per_cpu_trap_init(); + + atomic_inc(&cpus_booted); + + return cpu_idle(0); +} + +void __init smp_cpus_done(unsigned int max_cpus) +{ + smp_threads_ready = 1; + smp_mb(); +} + +void smp_send_reschedule(int cpu) +{ + __smp_send_ipi(cpu, SMP_MSG_RESCHEDULE); +} + +static void stop_this_cpu(void *unused) +{ + cpu_clear(smp_processor_id(), cpu_online_map); + local_irq_disable(); + + for (;;) + cpu_relax(); +} + +void smp_send_stop(void) +{ + smp_call_function(stop_this_cpu, 0, 1, 0); +} + + +struct smp_fn_call_struct smp_fn_call = { + .lock = SPIN_LOCK_UNLOCKED, + .finished = ATOMIC_INIT(0), +}; + +/* + * The caller of this wants the passed function to run on every cpu. If wait + * is set, wait until all cpus have finished the function before returning. + * The lock is here to protect the call structure. + * You must not call this function with disabled interrupts or from a + * hardware interrupt handler or from a bottom half handler. + */ +int smp_call_function(void (*func)(void *info), void *info, int retry, int wait) +{ + unsigned int nr_cpus = atomic_read(&cpus_booted); + int i; + + if (nr_cpus < 2) + return 0; + + spin_lock(&smp_fn_call.lock); + + atomic_set(&smp_fn_call.finished, 0); + smp_fn_call.fn = func; + smp_fn_call.data = info; + + for (i = 0; i < nr_cpus; i++) + if (i != smp_processor_id()) + __smp_call_function(i); + + if (wait) + while (atomic_read(&smp_fn_call.finished) != (nr_cpus - 1)); + + spin_unlock(&smp_fn_call.lock); + + return 0; +} + +/* Not really SMP stuff ... */ +int setup_profiling_timer(unsigned int multiplier) +{ + return 0; +} + diff -puN arch/sh/kernel/sys_sh.c~sh-merge arch/sh/kernel/sys_sh.c --- 25/arch/sh/kernel/sys_sh.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/sys_sh.c 2004-01-09 21:32:27.000000000 -0800 @@ -132,7 +132,7 @@ asmlinkage long sys_mmap2(unsigned long * This is really horribly ugly. */ asmlinkage int sys_ipc(uint call, int first, int second, - int third, void *ptr, long fifth) + int third, void __user *ptr, long fifth) { int version, ret; @@ -142,19 +142,19 @@ asmlinkage int sys_ipc(uint call, int fi if (call <= SEMCTL) switch (call) { case SEMOP: - return sys_semtimedop(first, (struct sembuf *)ptr, + return sys_semtimedop(first, (struct sembuf __user *)ptr, second, NULL); case SEMTIMEDOP: - return sys_semtimedop(first, (struct sembuf *)ptr, + return sys_semtimedop(first, (struct sembuf __user *)ptr, second, - (const struct timespec *)fifth); + (const struct timespec __user *)fifth); case SEMGET: return sys_semget (first, second, third); case SEMCTL: { union semun fourth; if (!ptr) return -EINVAL; - if (get_user(fourth.__pad, (void **) ptr)) + if (get_user(fourth.__pad, (void * __user *) ptr)) return -EFAULT; return sys_semctl (first, second, third, fourth); } @@ -165,7 +165,7 @@ asmlinkage int sys_ipc(uint call, int fi if (call <= MSGCTL) switch (call) { case MSGSND: - return sys_msgsnd (first, (struct msgbuf *) ptr, + return sys_msgsnd (first, (struct msgbuf __user *) ptr, second, third); case MSGRCV: switch (version) { @@ -175,7 +175,7 @@ asmlinkage int sys_ipc(uint call, int fi return -EINVAL; if (copy_from_user(&tmp, - (struct ipc_kludge *) ptr, + (struct ipc_kludge __user *) ptr, sizeof (tmp))) return -EFAULT; return sys_msgrcv (first, tmp.msgp, second, @@ -183,14 +183,14 @@ asmlinkage int sys_ipc(uint call, int fi } default: return sys_msgrcv (first, - (struct msgbuf *) ptr, + (struct msgbuf __user *) ptr, second, fifth, third); } case MSGGET: return sys_msgget ((key_t) first, second); case MSGCTL: return sys_msgctl (first, second, - (struct msqid_ds *) ptr); + (struct msqid_ds __user *) ptr); default: return -EINVAL; } @@ -200,25 +200,25 @@ asmlinkage int sys_ipc(uint call, int fi switch (version) { default: { ulong raddr; - ret = sys_shmat (first, (char *) ptr, + ret = sys_shmat (first, (char __user *) ptr, second, &raddr); if (ret) return ret; - return put_user (raddr, (ulong *) third); + return put_user (raddr, (ulong __user *) third); } case 1: /* iBCS2 emulator entry point */ if (!segment_eq(get_fs(), get_ds())) return -EINVAL; - return sys_shmat (first, (char *) ptr, + return sys_shmat (first, (char __user *) ptr, second, (ulong *) third); } case SHMDT: - return sys_shmdt ((char *)ptr); + return sys_shmdt ((char __user *)ptr); case SHMGET: return sys_shmget (first, second, third); case SHMCTL: return sys_shmctl (first, second, - (struct shmid_ds *) ptr); + (struct shmid_ds __user *) ptr); default: return -EINVAL; } @@ -252,3 +252,15 @@ asmlinkage ssize_t sys_pwrite_wrapper(un size_t count, loff_t pos); return sys_pwrite64(fd, buf, count, pos); } + +asmlinkage int sys_fadvise64_64_wrapper(int fd, u32 offset0, u32 offset1, + u32 len0, u32 len1, int advice) +{ +#ifdef __LITTLE_ENDIAN__ + return sys_fadvise64_64(fd, (u64)offset1 << 32 | offset0, + (u64)len1 << 32 | len0, advice); +#else + return sys_fadvise64_64(fd, (u64)offset0 << 32 | offset1, + (u64)len0 << 32 | len1, advice); +#endif +} diff -puN arch/sh/kernel/time.c~sh-merge arch/sh/kernel/time.c --- 25/arch/sh/kernel/time.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/time.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: time.c,v 1.12 2003/06/28 15:35:28 lethal Exp $ +/* $Id: time.c,v 1.18 2003/10/09 16:28:14 lethal Exp $ * * linux/arch/sh/kernel/time.c * @@ -68,7 +68,7 @@ #endif /* CONFIG_CPU_SH3 or CONFIG_CPU_SH4 */ extern unsigned long wall_jiffies; -#define TICK_SIZE (TICK_NSEC / 1000) +#define TICK_SIZE (tick_nsec / 1000) spinlock_t tmu0_lock = SPIN_LOCK_UNLOCKED; u64 jiffies_64 = INITIAL_JIFFIES; @@ -101,6 +101,14 @@ static int pfc_values[] = { 0, 0, 1, 2 #error "Unknown ifc/bfc/pfc/stc values for this processor" #endif +/* + * Scheduler clock - returns current time in nanosec units. + */ +unsigned long long sched_clock(void) +{ + return (unsigned long long)jiffies * (1000000000 / HZ); +} + static unsigned long do_gettimeoffset(void) { int count; @@ -198,7 +206,7 @@ int do_settimeofday(struct timespec *tv) * made, and then undo it! */ nsec -= 1000 * (do_gettimeoffset() + - (jiffies - wall_jiffies) * (1000000 / HZ)); + (jiffies - wall_jiffies) * (1000000 / HZ)); wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec); wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec); @@ -230,7 +238,8 @@ extern char _stext; static inline void sh_do_profile(unsigned long pc) { - if (!prof_buffer) + /* Don't profile cpu_idle.. */ + if (!prof_buffer || !current->pid) return; if (pc >= 0xa0000000UL && pc < 0xc0000000UL) @@ -365,6 +374,19 @@ static unsigned int __init get_timer_fre void (*board_time_init)(void) = 0; void (*board_timer_setup)(struct irqaction *irq) = 0; +static unsigned int sh_pclk_freq __initdata = CONFIG_SH_PCLK_FREQ; + +static int __init sh_pclk_setup(char *str) +{ + unsigned int freq; + + if (get_option(&str, &freq)) + sh_pclk_freq = freq; + + return 1; +} +__setup("sh_pclk=", sh_pclk_setup); + static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL}; void get_current_frequency_divisors(unsigned int *ifc, unsigned int *bfc, unsigned int *pfc) @@ -407,23 +429,46 @@ _FREQ_TABLE(pfc); void __init time_init(void) { - unsigned int timer_freq; + unsigned int timer_freq = 0; unsigned int ifc, pfc, bfc; unsigned long interval; if (board_time_init) board_time_init(); - /* - * XXX: Hmm... when cpu/ is proposed, this looks like a good spot for - * it, but we need a rtc to get the timer_freq so board_time_init() - * must always come before a CPU time_(rtc?)_init(). - */ get_current_frequency_divisors(&ifc, &bfc, &pfc); - timer_freq = get_timer_frequency(); + /* + * If we don't have an RTC (such as with the SH7300), don't attempt to + * probe the timer frequency. Rely on an either hardcoded peripheral + * clock value, or on the sh_pclk command line option. + */ + current_cpu_data.module_clock = sh_pclk_freq; - current_cpu_data.module_clock = timer_freq * 4; + /* XXX: Switch this over to a more generic test. */ + if (current_cpu_data.type != CPU_SH7300) { + unsigned int freq; + + /* + * If we've specified a peripheral clock frequency, and we have + * an RTC, compare it against the autodetected value. Complain + * if there's a mismatch. + * + * Note: We should allow for some high and low watermarks for + * the frequency here (compensating for potential drift), as + * otherwise we'll likely end up triggering this essentially + * on every boot. + */ + timer_freq = get_timer_frequency(); + freq = timer_freq * 4; + + if (sh_pclk_freq && sh_pclk_freq != freq) { + printk(KERN_NOTICE "Calculated peripheral clock value " + "%d differs from sh_pclk value %d, fixing..\n", + freq, sh_pclk_freq); + current_cpu_data.module_clock = freq; + } + } rtc_get_time(&xtime); diff -puN arch/sh/kernel/traps.c~sh-merge arch/sh/kernel/traps.c --- 25/arch/sh/kernel/traps.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/kernel/traps.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: traps.c,v 1.7 2003/05/04 19:29:53 lethal Exp $ +/* $Id: traps.c,v 1.14 2003/11/14 18:40:10 lethal Exp $ * * linux/arch/sh/traps.c * @@ -26,12 +26,14 @@ #include #include #include +#include #include #include #include #include #include +#include #ifdef CONFIG_SH_KGDB #include @@ -46,21 +48,36 @@ #define CHK_REMOTE_DEBUG(regs) #endif -#define DO_ERROR(trapnr, signr, str, name, tsk) \ -asmlinkage void do_##name(unsigned long r4, unsigned long r5, \ - unsigned long r6, unsigned long r7, \ - struct pt_regs regs) \ -{ \ - unsigned long error_code; \ - \ - asm volatile("stc r2_bank, %0": "=r" (error_code)); \ - local_irq_enable(); \ - tsk->thread.error_code = error_code; \ - tsk->thread.trap_no = trapnr; \ - CHK_REMOTE_DEBUG(®s); \ - force_sig(signr, tsk); \ - die_if_no_fixup(str,®s,error_code); \ -} +#define DO_ERROR(trapnr, signr, str, name, tsk) \ +asmlinkage void do_##name(unsigned long r4, unsigned long r5, \ + unsigned long r6, unsigned long r7, \ + struct pt_regs regs) \ +{ \ + unsigned long error_code; \ + \ + /* Check if it's a DSP instruction */ \ + if (is_dsp_inst(®s)) { \ + /* Enable DSP mode, and restart instruction. */ \ + regs.sr |= SR_DSP; \ + return; \ + } \ + \ + asm volatile("stc r2_bank, %0": "=r" (error_code)); \ + local_irq_enable(); \ + tsk->thread.error_code = error_code; \ + tsk->thread.trap_no = trapnr; \ + CHK_REMOTE_DEBUG(®s); \ + force_sig(signr, tsk); \ + die_if_no_fixup(str,®s,error_code); \ +} + +#ifdef CONFIG_CPU_SH2 +#define TRAP_RESERVED_INST 4 +#define TRAP_ILLEGAL_SLOT_INST 6 +#else +#define TRAP_RESERVED_INST 12 +#define TRAP_ILLEGAL_SLOT_INST 13 +#endif /* * These constants are for searching for possible module text @@ -530,8 +547,37 @@ asmlinkage void do_address_error(struct } } -DO_ERROR(12, SIGILL, "reserved instruction", reserved_inst, current) -DO_ERROR(13, SIGILL, "illegal slot instruction", illegal_slot_inst, current) +#ifdef CONFIG_SH_DSP +/* + * SH-DSP support gerg@snapgear.com. + */ +int is_dsp_inst(struct pt_regs *regs) +{ + unsigned short inst; + + /* + * Safe guard if DSP mode is already enabled or we're lacking + * the DSP altogether. + */ + if (!test_bit(CPU_HAS_DSP, &(cpu_data->flags)) || (regs->sr & SR_DSP)) + return 0; + + get_user(inst, ((unsigned short *) regs->pc)); + + inst &= 0xf000; + + /* Check for any type of DSP or support instruction */ + if ((inst == 0xf000) || (inst == 0x4000)) + return 1; + + return 0; +} +#else +#define is_dsp_inst(regs) (0) +#endif /* CONFIG_SH_DSP */ + +DO_ERROR(TRAP_RESERVED_INST, SIGILL, "reserved instruction", reserved_inst, current) +DO_ERROR(TRAP_ILLEGAL_SLOT_INST, SIGILL, "illegal slot instruction", illegal_slot_inst, current) asmlinkage void do_exception_error(unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7, @@ -547,18 +593,18 @@ void *gdb_vbr_vector; static inline void __init gdb_vbr_init(void) { - /* + register unsigned long vbr; + + /* * Read the old value of the VBR register to initialise * the vector through which debug and BIOS traps are * delegated by the Linux trap handler. */ - { - register unsigned long vbr; - asm volatile("stc vbr, %0" : "=r" (vbr)); - gdb_vbr_vector = (void *)(vbr + 0x100); - printk("Setting GDB trap vector to 0x%08lx\n", - (unsigned long)gdb_vbr_vector); - } + asm volatile("stc vbr, %0" : "=r" (vbr)); + + gdb_vbr_vector = (void *)(vbr + 0x100); + printk("Setting GDB trap vector to 0x%08lx\n", + (unsigned long)gdb_vbr_vector); } #endif @@ -582,11 +628,24 @@ void __init per_cpu_trap_init(void) void __init trap_init(void) { - extern void *exception_handling_table[14]; - - exception_handling_table[12] = (void *)do_reserved_inst; - exception_handling_table[13] = (void *)do_illegal_slot_inst; + extern void *exception_handling_table[]; + exception_handling_table[TRAP_RESERVED_INST] + = (void *)do_reserved_inst; + exception_handling_table[TRAP_ILLEGAL_SLOT_INST] + = (void *)do_illegal_slot_inst; + +#ifdef CONFIG_CPU_SH4 + if (!test_bit(CPU_HAS_FPU, &(cpu_data->flags))) { + /* For SH-4 lacking an FPU, treat floating point instructions + as reserved. */ + /* entry 64 corresponds to EXPEVT=0x800 */ + exception_handling_table[64] = (void *)do_reserved_inst; + exception_handling_table[65] = (void *)do_illegal_slot_inst; + } +#endif + + /* Setup VBR for boot cpu */ per_cpu_trap_init(); } @@ -595,7 +654,6 @@ void show_stack(struct task_struct *tsk, unsigned long *stack, addr; unsigned long module_start = VMALLOC_START; unsigned long module_end = VMALLOC_END; - extern long _text, _etext; int i = 1; if (!sp) { @@ -612,19 +670,25 @@ void show_stack(struct task_struct *tsk, stack = sp; printk("\nCall trace: "); +#ifdef CONFIG_KALLSYMS + printk("\n"); +#endif - while (((long)stack & (THREAD_SIZE - 1))) { + while (!kstack_end(stack)) { addr = *stack++; - if (((addr >= (unsigned long)&_text) && - (addr <= (unsigned long)&_etext)) || + if (((addr >= (unsigned long)_text) && + (addr <= (unsigned long)_etext)) || ((addr >= module_start) && (addr <= module_end))) { /* * For 80-columns display, 6 entry is maximum. * NOTE: '[<8c00abcd>] ' consumes 13 columns . */ +#ifndef CONFIG_KALLSYMS if (i && ((i % 6) == 0)) printk("\n "); +#endif printk("[<%08lx>] ", addr); + print_symbol("%s\n", addr); i++; } } diff -puN /dev/null arch/sh/lib/div64-generic.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/lib/div64-generic.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,19 @@ +/* + * Generic __div64_32 wrapper for __xdiv64_32. + */ + +#include + +extern u64 __xdiv64_32(u64 n, u32 d); + +u64 __div64_32(u64 *xp, u32 y) +{ + u64 rem; + u64 q = __xdiv64_32(*xp, y); + + rem = *xp - q * y; + *xp = q; + + return rem; +} + diff -puN arch/sh/lib/div64.S~sh-merge arch/sh/lib/div64.S --- 25/arch/sh/lib/div64.S~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/lib/div64.S 2004-01-09 21:32:27.000000000 -0800 @@ -1,11 +1,11 @@ /* - * unsigned long long __div64_32(unsigned long long n, unsigned long d); + * unsigned long long __xdiv64_32(unsigned long long n, unsigned long d); */ #include .text -ENTRY(__div64_32) +ENTRY(__xdiv64_32) #ifdef __LITTLE_ENDIAN__ mov r4, r0 mov r5, r1 diff -puN arch/sh/lib/Makefile~sh-merge arch/sh/lib/Makefile --- 25/arch/sh/lib/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/lib/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -3,4 +3,5 @@ # lib-y = delay.o memcpy.o memset.o memmove.o memchr.o \ - checksum.o strcasecmp.o strlen.o div64.o udivdi3.o + checksum.o strcasecmp.o strlen.o div64.o udivdi3.o \ + div64-generic.o diff -puN arch/sh/lib/udivdi3.c~sh-merge arch/sh/lib/udivdi3.c --- 25/arch/sh/lib/udivdi3.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/lib/udivdi3.c 2004-01-09 21:32:27.000000000 -0800 @@ -4,13 +4,13 @@ #include -extern u64 __div64_32(u64 n, u32 d); +extern u64 __xdiv64_32(u64 n, u32 d); extern void panic(const char * fmt, ...); u64 __udivdi3(u64 n, u64 d) { if (d & ~0xffffffff) panic("Need true 64-bit/64-bit division"); - return __div64_32(n, (u32)d); + return __xdiv64_32(n, (u32)d); } diff -puN arch/sh/Makefile~sh-merge arch/sh/Makefile --- 25/arch/sh/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -# $Id: Makefile,v 1.17 2003/05/20 03:12:54 lethal Exp $ +# $Id: Makefile,v 1.32 2003/10/26 23:33:49 lethal Exp $ # # This file is subject to the terms and conditions of the GNU General Public # License. See the file "COPYING" in the main directory of this archive @@ -25,20 +25,20 @@ ifndef include_config -include .config endif -cpu-y := -mb -cpu-$(CONFIG_CPU_LITTLE_ENDIAN) := -ml +cflags-y := -mb +cflags-$(CONFIG_CPU_LITTLE_ENDIAN) := -ml -cpu-$(CONFIG_CPU_SH2) += -m2 -cpu-$(CONFIG_CPU_SH3) += -m3 -cpu-$(CONFIG_CPU_SH4) += -m4 -mno-implicit-fp - -ifdef CONFIG_SH_KGDB -CFLAGS :=$(CFLAGS:-fomit-frame-pointer=) -g -AFLAGS += -g -ifdef CONFIG_KGDB_MORE -CFLAGS += $(shell echo $(CONFIG_KGDB_OPTIONS) | sed -e 's/"//g') -endif -endif +cflags-$(CONFIG_CPU_SH2) += -m2 +cflags-$(CONFIG_CPU_SH3) += -m3 +cflags-$(CONFIG_CPU_SH4) += -m4 \ + $(call check_gcc,-mno-implicit-fp,-m4-nofpu) + +cflags-$(CONFIG_SH_DSP) += -Wa,-dsp +cflags-$(CONFIG_SH_KGDB) += -g +cflags-$(CONFIG_EMBEDDED) += -Os + +cflags-$(CONFIG_MORE_COMPILE_OPTIONS) += \ + $(shell echo $(CONFIG_COMPILE_OPTIONS) | sed -e 's/"//g') OBJCOPYFLAGS := -O binary -R .note -R .comment -R .stab -R .stabstr -S @@ -49,13 +49,15 @@ OBJCOPYFLAGS := -O binary -R .note -R .c LDFLAGS_vmlinux += -e _stext ifdef CONFIG_CPU_LITTLE_ENDIAN -LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64' -EL +LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64' +LDFLAGS += -EL else -LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64+4' -EB +LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64+4' +LDFLAGS += -EB endif -CFLAGS += -pipe $(cpu-y) -AFLAGS += $(cpu-y) +CFLAGS += -pipe $(cflags-y) +AFLAGS += $(cflags-y) head-y := arch/sh/kernel/head.o arch/sh/kernel/init_task.o @@ -66,6 +68,7 @@ core-y += arch/sh/kernel/ arch/sh/mm/ # Boards machdir-$(CONFIG_SH_SOLUTION_ENGINE) := se/770x machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se/7751 +machdir-$(CONFIG_SH_7751_SYSTEMH) := systemh machdir-$(CONFIG_SH_STB1_HARP) := harp machdir-$(CONFIG_SH_STB1_OVERDRIVE) := overdrive machdir-$(CONFIG_SH_HP620) := hp6xx/hp620 @@ -81,6 +84,7 @@ machdir-$(CONFIG_SH_BIGSUR) := bigsur machdir-$(CONFIG_SH_SH2000) := sh2000 machdir-$(CONFIG_SH_ADX) := adx machdir-$(CONFIG_SH_MPC1211) := mpc1211 +machdir-$(CONFIG_SH_SECUREEDGE5410) := snapgear machdir-$(CONFIG_SH_UNKNOWN) := unknown incdir-y := $(machdir-y) @@ -99,7 +103,10 @@ cpuincdir-$(CONFIG_CPU_SH2) := cpu-sh2 cpuincdir-$(CONFIG_CPU_SH3) := cpu-sh3 cpuincdir-$(CONFIG_CPU_SH4) := cpu-sh4 -libs-y += arch/sh/lib/ $(LIBGCC) +libs-y := arch/sh/lib/ $(libs-y) $(LIBGCC) + +drivers-y += arch/sh/drivers/ +drivers-$(CONFIG_OPROFILE) += arch/sh/oprofile/ boot := arch/sh/boot @@ -110,18 +117,36 @@ prepare: target_links .PHONY: target_links FORCE target_links: @echo ' Making asm-sh/cpu -> asm-sh/$(cpuincdir-y) link' + @rm -f include/asm-sh/cpu @ln -sf $(cpuincdir-y) include/asm-sh/cpu @echo ' Making asm-sh/mach -> asm-sh/$(incdir-y) link' + @rm -f include/asm-sh/mach @ln -sf $(incdir-y) include/asm-sh/mach $(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h -BOOTIMAGE=arch/sh/boot/zImage zImage: vmlinux - $(Q)$(MAKE) $(build)=$(boot) $(BOOTIMAGE) + $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ compressed: zImage archclean: $(Q)$(MAKE) $(clean)=$(boot) + +defconfig-%: + @echo ' Copying arch/sh/configs/$@ -> .config' + @if [ -e .config ]; then mv -f .config .config.old; fi + @cp -f arch/sh/configs/$@ .config + @chmod 644 .config + +define archhelp + @echo ' zImage - Compressed kernel image (arch/sh/boot/zImage)' + for board in arch/sh/configs/*; \ + do \ + echo -n ' ' $$board | sed -e 's|arch/sh/configs/||g' ; \ + echo -n ' - Build for ' ; \ + echo -e $$board | sed -e 's|.*-||g'; \ + done +endef + diff -puN arch/sh/mm/cache-sh3.c~sh-merge arch/sh/mm/cache-sh3.c --- 25/arch/sh/mm/cache-sh3.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/mm/cache-sh3.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: cache-sh3.c,v 1.5 2003/05/06 23:28:48 lethal Exp $ +/* $Id: cache-sh3.c,v 1.7 2003/08/28 16:16:09 lethal Exp $ * * linux/arch/sh/mm/cache-sh3.c * @@ -70,6 +70,8 @@ detect_cpu_and_cache_system(void) cpu_data->dcache.entry_mask = 0x7f0; cpu_data->dcache.sets = 128; cpu_data->type = CPU_SH7708; + + set_bit(CPU_HAS_MMU_PAGE_ASSOC, &(cpu_data->flags)); } else { /* 7709A or 7729 */ cpu_data->dcache.way_shift = 12; cpu_data->dcache.entry_mask = 0xff0; @@ -77,9 +79,9 @@ detect_cpu_and_cache_system(void) cpu_data->type = CPU_SH7729; } - /* + /* * SH-3 doesn't have separate caches - */ + */ cpu_data->dcache.flags |= SH_CACHE_COMBINED; cpu_data->icache = cpu_data->dcache; diff -puN arch/sh/mm/cache-sh4.c~sh-merge arch/sh/mm/cache-sh4.c --- 25/arch/sh/mm/cache-sh4.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/mm/cache-sh4.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: cache-sh4.c,v 1.20 2003/05/10 03:22:05 sugioka Exp $ +/* $Id: cache-sh4.c,v 1.24 2003/10/12 19:40:12 lethal Exp $ * * linux/arch/sh/mm/cache-sh4.c * @@ -26,10 +26,7 @@ extern void __flush_cache_4096_all(unsig static void __flush_cache_4096_all_ex(unsigned long start); extern void __flush_dcache_all(void); static void __flush_dcache_all_ex(void); -/* - * FIXME: Add ST40STB1 probe support (and clean up the manual overdrive stuff) - * seems to rely on some quirky PVR shifting .. stuart? ++paulm - */ + int __init detect_cpu_and_cache_system(void) { unsigned long pvr, prr, ccr; @@ -37,9 +34,9 @@ int __init detect_cpu_and_cache_system(v pvr = (ctrl_inl(CCN_PVR) >> 8) & 0xffff; prr = (ctrl_inl(CCN_PRR) >> 4) & 0xff; - /* + /* * Setup some sane SH-4 defaults for the icache - */ + */ cpu_data->icache.way_shift = 13; cpu_data->icache.entry_shift = 5; cpu_data->icache.entry_mask = 0x1fe0; @@ -64,9 +61,17 @@ int __init detect_cpu_and_cache_system(v switch (pvr) { case 0x205: cpu_data->type = CPU_SH7750; + set_bit(CPU_HAS_P2_FLUSH_BUG, &(cpu_data->flags)); break; case 0x206: cpu_data->type = CPU_SH7750S; + + /* + * FIXME: This is needed for 7750, but do we need it for the + * 7750S and 7750R too? For now, assume we do.. -- PFM + */ + set_bit(CPU_HAS_P2_FLUSH_BUG, &(cpu_data->flags)); + break; case 0x1100: cpu_data->type = CPU_SH7751; @@ -77,28 +82,46 @@ int __init detect_cpu_and_cache_system(v case 0x8100: cpu_data->type = CPU_ST40GX1; break; - case 0x500: - if (prr == 0x10) - cpu_data->type = CPU_SH7750R; - else - cpu_data->type = CPU_SH7751R; + case 0x700: + /* XXX: Add proper CVR probing */ + cpu_data->type = CPU_SH4_501; + break; + case 0x600: + cpu_data->type = CPU_SH4_202; + /* fall */ + case 0x500 ... 0x501: + switch (prr) { + case 0x10: cpu_data->type = CPU_SH7750R; break; + case 0x11: cpu_data->type = CPU_SH7751R; break; + case 0x50: cpu_data->type = CPU_SH7760; break; + } + + if (cpu_data->type == CPU_SH7750R) + set_bit(CPU_HAS_P2_FLUSH_BUG, &(cpu_data->flags)); + jump_to_P2(); ccr = ctrl_inl(CCR); - back_to_P1(); - if(ccr & CCR_CACHE_EMODE) { - cpu_data->icache.ways = 2; - cpu_data->dcache.ways = 2; + + /* Force EMODE */ + if (!(ccr & CCR_CACHE_EMODE)) { + ccr |= CCR_CACHE_EMODE; + ctrl_outl(ccr, CCR); } + + back_to_P1(); + + cpu_data->icache.ways = 2; + cpu_data->dcache.ways = 2; + break; default: cpu_data->type = CPU_SH_NONE; break; } - /* - * For now, all SH-4's have an FPU .. - */ - cpu_data->flags |= CPU_HAS_FPU; + /* No FPU on the SH4-500 series.. */ + if (cpu_data->type != CPU_SH4_501) + set_bit(CPU_HAS_FPU, &(cpu_data->flags)); return 0; } @@ -257,20 +280,16 @@ static inline void flush_cache_4096(unsi unsigned long flags; extern void __flush_cache_4096(unsigned long addr, unsigned long phys, unsigned long exec_offset); - /* + /* * SH7751, SH7751R, and ST40 have no restriction to handle cache. - * (While SH7750 must do that at P2 area.) - */ - if ((cpu_data->type == CPU_SH7751 || - cpu_data->type == CPU_SH7751R || - cpu_data->type == CPU_ST40RA || - cpu_data->type == CPU_ST40GX1) && - (start >= CACHE_OC_ADDRESS_ARRAY)) { - __flush_cache_4096(start | SH_CACHE_ASSOC, phys | 0x80000000, 0); - } else { + * (While SH7750 must do that at P2 area.) + */ + if (test_bit(CPU_HAS_P2_FLUSH_BUG, &(cpu_data->flags))) { local_irq_save(flags); __flush_cache_4096(start | SH_CACHE_ASSOC, phys | 0x80000000, 0x20000000); local_irq_restore(flags); + } else if (start >= CACHE_OC_ADDRESS_ARRAY) { + __flush_cache_4096(start | SH_CACHE_ASSOC, phys | 0x80000000, 0); } } diff -puN arch/sh/mm/clear_page.S~sh-merge arch/sh/mm/clear_page.S --- 25/arch/sh/mm/clear_page.S~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/mm/clear_page.S 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: clear_page.S,v 1.12 2003/05/10 03:22:05 sugioka Exp $ +/* $Id: clear_page.S,v 1.13 2003/08/25 17:03:10 lethal Exp $ * * __clear_user_page, __clear_user, clear_page implementation of SuperH * @@ -10,10 +10,10 @@ #include /* - * clear_page + * clear_page_slow * @to: P1 address * - * void clear_page(void *to) + * void clear_page_slow(void *to) */ /* @@ -21,7 +21,7 @@ * r4 --- to * r5 --- to + 4096 */ -ENTRY(clear_page) +ENTRY(clear_page_slow) mov r4,r5 mov.w .Llimit,r0 add r0,r5 diff -puN -L arch/sh/mm/__clear_user_page-sh4.S arch/sh/mm/__clear_user_page-sh4.S~sh-merge /dev/null --- 25/arch/sh/mm/__clear_user_page-sh4.S +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,49 +0,0 @@ -/* $Id$ - * - * __clear_user_page implementation of SuperH - * - * Copyright (C) 2001 Niibe Yutaka & Kaz Kojima - * - */ - -/* - * __clear_user_page - * @to: P1 address (with same color) - * @orig_to: P1 address - * - * void __clear_user_page(void *to, void *orig_to) - */ - -/* - * r0 --- scratch - * r4 --- to - * r5 --- orig_to - * r6 --- to + 4096 - */ -#include -ENTRY(__clear_user_page) - mov r4,r6 - mov.w .L4096,r0 - add r0,r6 - mov #0,r0 - ! -1: ocbi @r5 - add #32,r5 - movca.l r0,@r4 - mov r4,r1 - add #32,r4 - mov.l r0,@-r4 - mov.l r0,@-r4 - mov.l r0,@-r4 - mov.l r0,@-r4 - mov.l r0,@-r4 - mov.l r0,@-r4 - mov.l r0,@-r4 - add #28,r4 - cmp/eq r6,r4 - bf/s 1b - ocbwb @r1 - ! - rts - nop -.L4096: .word 4096 diff -puN arch/sh/mm/copy_page.S~sh-merge arch/sh/mm/copy_page.S --- 25/arch/sh/mm/copy_page.S~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/mm/copy_page.S 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: copy_page.S,v 1.7 2003/05/04 19:29:54 lethal Exp $ +/* $Id: copy_page.S,v 1.8 2003/08/25 17:03:10 lethal Exp $ * * copy_page, __copy_user_page, __copy_user implementation of SuperH * @@ -9,11 +9,11 @@ #include /* - * copy_page + * copy_page_slow * @to: P1 address * @from: P1 address * - * void copy_page(void *to, void *from) + * void copy_page_slow(void *to, void *from) */ /* @@ -23,7 +23,7 @@ * r10 --- to * r11 --- from */ -ENTRY(copy_page) +ENTRY(copy_page_slow) mov.l r8,@-r15 mov.l r10,@-r15 mov.l r11,@-r15 diff -puN -L arch/sh/mm/__copy_user_page-sh4.S arch/sh/mm/__copy_user_page-sh4.S~sh-merge /dev/null --- 25/arch/sh/mm/__copy_user_page-sh4.S +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,69 +0,0 @@ -/* $Id: __copy_user_page-sh4.S,v 1.1 2001/07/23 09:02:17 gniibe Exp $ - * - * __copy_user_page implementation of SuperH - * - * Copyright (C) 2001 Niibe Yutaka & Kaz Kojima - * - */ - -/* - * __copy_user_page - * @to: P1 address (with same color) - * @from: P1 address - * @orig_to: P1 address - * - * void __copy_user_page(void *to, void *from, void *orig_to) - */ - -/* - * r0, r1, r2, r3, r4, r5, r6, r7 --- scratch - * r8 --- from + 4096 - * r9 --- orig_to - * r10 --- to - * r11 --- from - */ -#include -ENTRY(__copy_user_page) - mov.l r8,@-r15 - mov.l r9,@-r15 - mov.l r10,@-r15 - mov.l r11,@-r15 - mov r4,r10 - mov r5,r11 - mov r6,r9 - mov r5,r8 - mov.w .L4096,r0 - add r0,r8 - ! -1: ocbi @r9 - add #32,r9 - mov.l @r11+,r0 - mov.l @r11+,r1 - mov.l @r11+,r2 - mov.l @r11+,r3 - mov.l @r11+,r4 - mov.l @r11+,r5 - mov.l @r11+,r6 - mov.l @r11+,r7 - movca.l r0,@r10 - mov r10,r0 - add #32,r10 - mov.l r7,@-r10 - mov.l r6,@-r10 - mov.l r5,@-r10 - mov.l r4,@-r10 - mov.l r3,@-r10 - mov.l r2,@-r10 - mov.l r1,@-r10 - ocbwb @r0 - cmp/eq r11,r8 - bf/s 1b - add #28,r10 - ! - mov.l @r15+,r11 - mov.l @r15+,r10 - mov.l @r15+,r9 - mov.l @r15+,r8 - rts - nop -.L4096: .word 4096 diff -puN arch/sh/mm/fault.c~sh-merge arch/sh/mm/fault.c --- 25/arch/sh/mm/fault.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/mm/fault.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,7 +1,8 @@ -/* $Id: fault.c,v 1.10 2003/05/04 19:29:54 lethal Exp $ +/* $Id: fault.c,v 1.13 2003/08/11 11:44:50 lethal Exp $ * * linux/arch/sh/mm/fault.c * Copyright (C) 1999 Niibe Yutaka + * Copyright (C) 2003 Paul Mundt * * Based on linux/arch/i386/mm/fault.c: * Copyright (C) 1995 Linus Torvalds @@ -28,10 +29,7 @@ #include #include #include - -#if defined(CONFIG_SH_KGDB) #include -#endif extern void die(const char *,struct pt_regs *,long); @@ -47,11 +45,10 @@ asmlinkage void do_page_fault(struct pt_ struct mm_struct *mm; struct vm_area_struct * vma; unsigned long page; - const struct exception_table_entry *fixup; -#if defined(CONFIG_SH_KGDB) +#ifdef CONFIG_SH_KGDB if (kgdb_nofault && kgdb_bus_err_hook) - kgdb_bus_err_hook(); + kgdb_bus_err_hook(); #endif tsk = current; @@ -61,7 +58,7 @@ asmlinkage void do_page_fault(struct pt_ * If we're in an interrupt or have no user * context, we must not take the fault.. */ - if (in_interrupt() || !mm) + if (in_atomic() || !mm) goto no_context; down_read(&mm->mmap_sem); @@ -95,16 +92,18 @@ good_area: */ survive: switch (handle_mm_fault(mm, vma, address, writeaccess)) { - case 1: - tsk->min_flt++; - break; - case 2: - tsk->maj_flt++; - break; - case 0: - goto do_sigbus; - default: - goto out_of_memory; + case VM_FAULT_MINOR: + tsk->min_flt++; + break; + case VM_FAULT_MAJOR: + tsk->maj_flt++; + break; + case VM_FAULT_SIGBUS: + goto do_sigbus; + case VM_FAULT_OOM: + goto out_of_memory; + default: + BUG(); } up_read(&mm->mmap_sem); @@ -126,11 +125,8 @@ bad_area: no_context: /* Are we prepared to handle this kernel fault? */ - fixup = search_exception_tables(regs->pc); - if (fixup) { - regs->pc = fixup->fixup; + if (fixup_exception(regs)) return; - } /* * Oops. The kernel tried to access some bad page. We'll have to @@ -198,16 +194,22 @@ do_sigbus: asmlinkage int __do_page_fault(struct pt_regs *regs, unsigned long writeaccess, unsigned long address) { + unsigned long addrmax = P4SEG; pgd_t *dir; pmd_t *pmd; pte_t *pte; pte_t entry; -#if defined(CONFIG_SH_KGDB) +#ifdef CONFIG_SH_KGDB if (kgdb_nofault && kgdb_bus_err_hook) - kgdb_bus_err_hook(); + kgdb_bus_err_hook(); +#endif + +#ifdef CONFIG_SH_STORE_QUEUES + addrmax = P4SEG_STORE_QUE + 0x04000000; #endif - if (address >= P3SEG && address < P4SEG) + + if (address >= P3SEG && address < addrmax) dir = pgd_offset_k(address); else if (address >= TASK_SIZE) return 1; @@ -233,15 +235,19 @@ asmlinkage int __do_page_fault(struct pt if (writeaccess) entry = pte_mkdirty(entry); entry = pte_mkyoung(entry); -#if defined(CONFIG_CPU_SH4) + +#ifdef CONFIG_CPU_SH4 /* * ITLB is not affected by "ldtlb" instruction. * So, we need to flush the entry by ourselves. */ + __flush_tlb_page(get_asid(), address&PAGE_MASK); #endif + set_pte(pte, entry); update_mmu_cache(NULL, address, entry); + return 0; } diff -puN arch/sh/mm/init.c~sh-merge arch/sh/mm/init.c --- 25/arch/sh/mm/init.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/mm/init.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: init.c,v 1.11 2003/05/27 16:21:23 lethal Exp $ +/* $Id: init.c,v 1.18 2003/10/31 09:26:59 kkojima Exp $ * * linux/arch/sh/mm/init.c * @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -55,6 +56,9 @@ pg_data_t discontig_page_data[MAX_NUMNOD bootmem_data_t discontig_node_bdata[MAX_NUMNODES]; #endif +void (*copy_page)(void *from, void *to); +void (*clear_page)(void *to); + void show_mem(void) { int i, total = 0, reserved = 0; @@ -112,13 +116,13 @@ void __init paging_init(void) { unsigned long max_dma, low, start_pfn; pgd_t *pg_dir; - int i; + int i; - /* We don't need kernel mapping as hardware support that. */ - pg_dir = swapper_pg_dir; + /* We don't need kernel mapping as hardware support that. */ + pg_dir = swapper_pg_dir; for (i = 0; i < PTRS_PER_PGD; i++) - pgd_val(pg_dir[i]) = 0; + pgd_val(pg_dir[i]) = 0; /* Turn on the MMU */ enable_mmu(); @@ -130,11 +134,13 @@ void __init paging_init(void) if (low < max_dma) { zones_size[ZONE_DMA] = low - start_pfn; + zones_size[ZONE_NORMAL] = 0; } else { zones_size[ZONE_DMA] = max_dma - start_pfn; zones_size[ZONE_NORMAL] = low - max_dma; } } + #elif defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4) /* * If we don't have CONFIG_MMU set and the processor in question @@ -149,17 +155,17 @@ void __init paging_init(void) disable_mmu(); #endif - free_area_init_node(0, NODE_DATA(0), 0, zones_size, __MEMORY_START >> PAGE_SHIFT, 0); + free_area_init_node(0, NODE_DATA(0), 0, zones_size, __MEMORY_START >> PAGE_SHIFT, 0); /* XXX: MRB-remove - this doesn't seem sane, should this be done somewhere else ?*/ - mem_map = NODE_DATA(0)->node_mem_map; + mem_map = NODE_DATA(0)->node_mem_map; #ifdef CONFIG_DISCONTIGMEM /* * And for discontig, do some more fixups on the zone sizes.. */ - zones_size[ZONE_DMA] = __MEMORY_SIZE_2ND >> PAGE_SHIFT; - zones_size[ZONE_NORMAL] = 0; - free_area_init_node(1, NODE_DATA(1), 0, zones_size, __MEMORY_START_2ND >> PAGE_SHIFT, 0); + zones_size[ZONE_DMA] = __MEMORY_SIZE_2ND >> PAGE_SHIFT; + zones_size[ZONE_NORMAL] = 0; + free_area_init_node(1, NODE_DATA(1), 0, zones_size, __MEMORY_START_2ND >> PAGE_SHIFT, 0); #endif } @@ -183,6 +189,13 @@ void __init mem_init(void) memset(empty_zero_page, 0, PAGE_SIZE); __flush_wback_region(empty_zero_page, PAGE_SIZE); + /* + * Setup wrappers for copy/clear_page(), these will get overridden + * later in the boot process if a better method is available. + */ + copy_page = copy_page_slow; + clear_page = clear_page_slow; + /* this will put all low memory onto the freelists */ totalram_pages += free_all_bootmem_node(NODE_DATA(0)); #ifdef CONFIG_DISCONTIGMEM @@ -195,6 +208,7 @@ void __init mem_init(void) */ if (PageReserved(mem_map+tmp)) reservedpages++; + codesize = (unsigned long) &_etext - (unsigned long) &_text; datasize = (unsigned long) &_edata - (unsigned long) &_etext; initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin; @@ -238,75 +252,3 @@ void free_initrd_mem(unsigned long start } #endif -/* - * Generic first-level cache init - */ -void __init sh_cache_init(void) -{ - extern int detect_cpu_and_cache_system(void); - unsigned long ccr, flags = 0; - - detect_cpu_and_cache_system(); - - if (cpu_data->type == CPU_SH_NONE) - panic("Unknown CPU"); - - jump_to_P2(); - ccr = ctrl_inl(CCR); - - /* - * If the cache is already enabled .. flush it. - */ - if (ccr & CCR_CACHE_ENABLE) { - unsigned long entries, i, j; - - entries = cpu_data->dcache.sets; - - /* - * If the OC is already in RAM mode, we only have - * half of the entries to flush.. - */ - if (ccr & CCR_CACHE_ORA) - entries >>= 1; - - for (i = 0; i < entries; i++) { - for (j = 0; j < cpu_data->dcache.ways; j++) { - unsigned long data, addr; - - addr = CACHE_OC_ADDRESS_ARRAY | - (j << cpu_data->dcache.way_shift) | - (i << cpu_data->dcache.entry_shift); - - data = ctrl_inl(addr); - - if ((data & (SH_CACHE_UPDATED | SH_CACHE_VALID)) - == (SH_CACHE_UPDATED | SH_CACHE_VALID)) - ctrl_outl(data & ~SH_CACHE_UPDATED, addr); - } - } - } - - /* - * Default CCR values .. enable the caches - * and flush them immediately.. - */ - flags |= CCR_CACHE_ENABLE | CCR_CACHE_INVALIDATE | (ccr & CCR_CACHE_EMODE); - -#ifdef CONFIG_SH_WRITETHROUGH - /* Turn on Write-through caching */ - flags |= CCR_CACHE_WT; -#else - /* .. or default to Write-back */ - flags |= CCR_CACHE_CB; -#endif - -#ifdef CONFIG_SH_OCRAM - /* Turn on OCRAM -- halve the OC */ - flags |= CCR_CACHE_ORA; - cpu_data->dcache.sets >>= 1; -#endif - - ctrl_outl(flags, CCR); - back_to_P1(); -} - diff -puN arch/sh/mm/ioremap.c~sh-merge arch/sh/mm/ioremap.c --- 25/arch/sh/mm/ioremap.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/mm/ioremap.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: ioremap.c,v 1.6 2003/05/04 19:29:55 lethal Exp $ +/* $Id: ioremap.c,v 1.8 2003/10/09 15:25:42 lethal Exp $ * * arch/sh/mm/ioremap.c * @@ -140,7 +140,7 @@ void * p3_ioremap(unsigned long phys_add */ offset = phys_addr & ~PAGE_MASK; phys_addr &= PAGE_MASK; - size = PAGE_ALIGN(last_addr) - phys_addr; + size = PAGE_ALIGN(last_addr+1) - phys_addr; /* * Ok, go for it.. @@ -148,9 +148,10 @@ void * p3_ioremap(unsigned long phys_add area = get_vm_area(size, VM_IOREMAP); if (!area) return NULL; + area->phys_addr = phys_addr; addr = area->addr; if (remap_area_pages((unsigned long) addr, phys_addr, size, flags)) { - vfree(addr); + vunmap(addr); return NULL; } return (void *) (offset + (char *)addr); diff -puN arch/sh/mm/Makefile~sh-merge arch/sh/mm/Makefile --- 25/arch/sh/mm/Makefile~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/mm/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -2,14 +2,16 @@ # Makefile for the Linux SuperH-specific parts of the memory manager. # -obj-y := init.o extable.o clear_page.o copy_page.o +obj-y := init.o extable.o obj-$(CONFIG_CPU_SH2) += cache-sh2.o -obj-$(CONFIG_CPU_SH3) += cache-sh3.o +obj-$(CONFIG_CPU_SH3) += cache-sh3.o obj-$(CONFIG_CPU_SH4) += cache-sh4.o pg-sh4.o -mmu-y := fault-nommu.o tlb-nommu.o -mmu-$(CONFIG_MMU) := fault.o +obj-$(CONFIG_DMA_PAGE_OPS) += pg-dma.o + +mmu-y := fault-nommu.o tlb-nommu.o pg-nommu.o +mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o obj-y += $(mmu-y) diff -puN /dev/null arch/sh/mm/pg-dma.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/mm/pg-dma.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,97 @@ +/* + * arch/sh/mm/pg-dma.c + * + * Fast clear_page()/copy_page() implementation using the SH DMAC + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Channel to use for page ops, must be dual-address mode capable. */ +static int dma_channel = 3; + +static void copy_page_dma(void *to, void *from) +{ + /* + * This doesn't seem to get triggered until further along in the + * boot process, at which point the DMAC is already initialized. + * Fix this in the same fashion as clear_page_dma() in the event + * that this crashes due to the DMAC not being initialized. + */ + + flush_icache_range((unsigned long)from, PAGE_SIZE); + dma_write_page(dma_channel, (unsigned long)from, (unsigned long)to); + dma_wait_for_completion(dma_channel); +} + +static void clear_page_dma(void *to) +{ + extern unsigned long empty_zero_page[1024]; + + /* + * We get invoked quite early on, if the DMAC hasn't been initialized + * yet, fall back on the slow manual implementation. + */ + if (dma_info[dma_channel].chan != dma_channel) { + clear_page_slow(to); + return; + } + + dma_write_page(dma_channel, (unsigned long)empty_zero_page, + (unsigned long)to); + + /* + * FIXME: Something is a bit racy here, if we poll the counter right + * away, we seem to lock. flushing the page from the dcache doesn't + * seem to make a difference one way or the other, though either a full + * icache or dcache flush does. + * + * The location of this is important as well, and must happen prior to + * the completion loop but after the transfer was initiated. + * + * Oddly enough, this doesn't appear to be an issue for copy_page().. + */ + flush_icache_range((unsigned long)to, PAGE_SIZE); + + dma_wait_for_completion(dma_channel); +} + +static int __init pg_dma_init(void) +{ + int ret; + + ret = request_dma(dma_channel, "page ops"); + if (ret != 0) + return ret; + + copy_page = copy_page_dma; + clear_page = clear_page_dma; + + return ret; +} + +static void __exit pg_dma_exit(void) +{ + free_dma(dma_channel); +} + +module_init(pg_dma_init); +module_exit(pg_dma_exit); + +MODULE_AUTHOR("Paul Mundt "); +MODULE_DESCRIPTION("Optimized page copy/clear routines using a dual-address mode capable DMAC channel"); +MODULE_LICENSE("GPL"); + diff -puN /dev/null arch/sh/mm/pg-nommu.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/mm/pg-nommu.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,36 @@ +/* + * arch/sh/mm/pg-nommu.c + * + * clear_page()/copy_page() implementation for MMUless SH. + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +static void copy_page_nommu(void *to, void *from) +{ + memcpy(to, from, PAGE_SIZE); +} + +static void clear_page_nommu(void *to) +{ + memset(to, 0, PAGE_SIZE); +} + +static int __init pg_nommu_init(void) +{ + copy_page = copy_page_nommu; + clear_page = clear_page_nommu; + + return 0; +} + +subsys_initcall(pg_nommu_init); + diff -puN arch/sh/mm/tlb-sh3.c~sh-merge arch/sh/mm/tlb-sh3.c --- 25/arch/sh/mm/tlb-sh3.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/mm/tlb-sh3.c 2004-01-09 21:32:27.000000000 -0800 @@ -61,6 +61,7 @@ void update_mmu_cache(struct vm_area_str void __flush_tlb_page(unsigned long asid, unsigned long page) { unsigned long addr, data; + int i, ways = MMU_NTLB_WAYS; /* * NOTE: PTEH.ASID should be set to this MM @@ -68,8 +69,15 @@ void __flush_tlb_page(unsigned long asid * * It would be simple if we didn't need to set PTEH.ASID... */ - addr = MMU_TLB_ADDRESS_ARRAY |(page & 0x1F000)| MMU_PAGE_ASSOC_BIT; + addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000); data = (page & 0xfffe0000) | asid; /* VALID bit is off */ - ctrl_outl(data, addr); + + if (test_bit(CPU_HAS_MMU_PAGE_ASSOC, &(cpu_data->flags))) { + addr |= MMU_PAGE_ASSOC_BIT; + ways = 1; /* we already know the way .. */ + } + + for (i = 0; i < ways; i++) + ctrl_outl(data, addr + (i << 8)); } diff -puN /dev/null arch/sh/oprofile/Kconfig --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/oprofile/Kconfig 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,23 @@ + +menu "Profiling support" + depends on EXPERIMENTAL + +config PROFILING + bool "Profiling support (EXPERIMENTAL)" + help + Say Y here to enable the extended profiling support mechanisms used + by profilers such as OProfile. + + +config OPROFILE + tristate "OProfile system profiling (EXPERIMENTAL)" + depends on PROFILING + help + OProfile is a profiling system capable of profiling the + whole system, include the kernel, kernel modules, libraries, + and applications. + + If unsure, say N. + +endmenu + diff -puN /dev/null arch/sh/oprofile/Makefile --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/oprofile/Makefile 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,13 @@ +obj-$(CONFIG_OPROFILE) += oprofile.o + +DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \ + oprof.o cpu_buffer.o buffer_sync.o \ + event_buffer.o oprofile_files.o \ + oprofilefs.o oprofile_stats.o \ + timer_int.o ) + +profdrvr-y := op_model_null.o +profdrvr-$(CONFIG_SH_DREAMCAST) := op_model_dreamcast.o + +oprofile-y := $(DRIVER_OBJS) $(profdrvr-y) + diff -puN /dev/null arch/sh/oprofile/op_model_null.c --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/arch/sh/oprofile/op_model_null.c 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,23 @@ +/* + * arch/sh/oprofile/op_model_null.c + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +int __init oprofile_arch_init(struct oprofile_operations **ops) +{ + return -ENODEV; +} + +void oprofile_arch_exit(void) +{ +} + diff -puN arch/sh/tools/mach-types~sh-merge arch/sh/tools/mach-types --- 25/arch/sh/tools/mach-types~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/arch/sh/tools/mach-types 2004-01-09 21:32:27.000000000 -0800 @@ -7,6 +7,7 @@ # SE SH_SOLUTION_ENGINE 7751SE SH_7751_SOLUTION_ENGINE +7751SYSTEMH SH_7751_SYSTEMH HP600 SH_HP600 HP620 SH_HP620 HP680 SH_HP680 @@ -19,4 +20,5 @@ DREAMCAST SH_DREAMCAST BIGSUR SH_BIGSUR ADX SH_ADX MPC1211 SH_MPC1211 +SNAPGEAR SH_SECUREEDGE5410 diff -puN /dev/null Documentation/sh/kgdb.txt --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/Documentation/sh/kgdb.txt 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,179 @@ + +This file describes the configuration and behavior of KGDB for the SH +kernel. Based on a description from Henry Bell , it +has been modified to account for quirks in the current implementation. + +Version +======= + +This version of KGDB was written for 2.4.xx kernels for the SH architecture. +Further documentation is available from the linux-sh project website. + + +Debugging Setup: Host +====================== + +The two machines will be connected together via a serial line - this +should be a null modem cable i.e. with a twist. + +On your DEVELOPMENT machine, go to your kernel source directory and +build the kernel, enabling KGDB support in the "kernel hacking" section. +This includes the KGDB code, and also makes the kernel be compiled with +the "-g" option set -- necessary for debugging. + +To install this new kernel, use the following installation procedure. + +Decide on which tty port you want the machines to communicate, then +cable them up back-to-back using the null modem. On the DEVELOPMENT +machine, you may wish to create an initialization file called .gdbinit +(in the kernel source directory or in your home directory) to execute +commonly-used commands at startup. + +A minimal .gdbinit might look like this: + + file vmlinux + set remotebaud 115200 + target remote /dev/ttyS0 + +Change the "target" definition so that it specifies the tty port that +you intend to use. Change the "remotebaud" definition to match the +data rate that you are going to use for the com line (115200 is the +default). + +Debugging Setup: Target +======================== + +By default, the KGDB stub will communicate with the host GDB using +ttySC1 at 115200 baud, 8 databits, no parity; these defaults can be +changed in the kernel configuration. As the kernel starts up, KGDB will +initialize so that breakpoints, kernel segfaults, and so forth will +generally enter the debugger. + +This behavior can be modified by including the "kgdb" option in the +kernel command line; this option has the general form: + + kgdb=, + +The indicates the port to use, and can optionally specify +baud, parity and databits -- e.g. "ttySC0,9600N8" or "ttySC1,19200". + +The can be "halt" or "disabled". The "halt" action enters the +debugger via a breakpoint as soon as kgdb is initialized; the "disabled" +action causes kgdb to ignore kernel segfaults and such until explicitly +entered by a breakpoint in the code or by external action (sysrq or NMI). + +(Both and can appear alone, w/o the separating comma.) + +For example, if you wish to debug early in kernel startup code, you +might specify the halt option: + + kgdb=halt + +Boot the TARGET machinem, which will appear to hang. + +On your DEVELOPMENT machine, cd to the source directory and run the gdb +program. (This is likely to be a cross GDB which runs on your host but +is built for an SH target.) If everything is working correctly you +should see gdb print out a few lines indicating that a breakpoint has +been taken. It will actually show a line of code in the target kernel +inside the gdbstub activation code. + +NOTE: BE SURE TO TERMINATE OR SUSPEND any other host application which +may be using the same serial port (for example, a terminal emulator you +have been using to connect to the target boot code.) Otherwise, data +from the target may not all get to GDB! + +You can now use whatever gdb commands you like to set breakpoints. +Enter "continue" to start your target machine executing again. At this +point the target system will run at full speed until it encounters +your breakpoint or gets a segment violation in the kernel, or whatever. + +Serial Ports: KGDB, Console +============================ + +This version of KGDB may not gracefully handle conflict with other +drivers in the kernel using the same port. If KGDB is configured on the +same port (and with the same parameters) as the kernel console, or if +CONFIG_SH_KGDB_CONSOLE is configured, things should be fine (though in +some cases console messages may appear twice through GDB). But if the +KGDB port is not the kernel console and used by another serial driver +which assumes different serial parameters (e.g. baud rate) KGDB may not +recover. + +Also, when KGDB is entered via sysrq-g (requires CONFIG_KGDB_SYSRQ) and +the kgdb port uses the same port as the console, detaching GDB will not +restore the console to working order without the port being re-opened. + +Another serious consequence of this is that GDB currently CANNOT break +into KGDB externally (e.g. via ^C or ); unless a breakpoint or +error is encountered, the only way to enter KGDB after the initial halt +(see above) is via NMI (CONFIG_KGDB_NMI) or sysrq-g (CONFIG_KGDB_SYSRQ). + +Code is included for the basic Hitachi Solution Engine boards to allow +the use of ttyS0 for KGDB if desired; this is less robust, but may be +useful in some cases. (This cannot be selected using the config file, +but only through the kernel command line, e.g. "kgdb=ttyS0", though the +configured defaults for baud rate etc. still apply if not overridden.) + +If gdbstub Does Not Work +======================== + +If it doesn't work, you will have to troubleshoot it. Do the easy +things first like double checking your cabling and data rates. You +might try some non-kernel based programs to see if the back-to-back +connection works properly. Just something simple like cat /etc/hosts +/dev/ttyS0 on one machine and cat /dev/ttyS0 on the other will tell you +if you can send data from one machine to the other. There is no point +in tearing out your hair in the kernel if the line doesn't work. + +If you need to debug the GDB/KGDB communication itself, the gdb commands +"set debug remote 1" and "set debug serial 1" may be useful, but be +warned: they produce a lot of output. + +Threads +======= + +Each process in a target machine is seen as a gdb thread. gdb thread related +commands (info threads, thread n) can be used. CONFIG_KGDB_THREAD must +be defined for this to work. + +In this version, kgdb reports PID_MAX (32768) as the process ID for the +idle process (pid 0), since GDB does not accept 0 as an ID. + +Detaching (exiting KGDB) +========================= + +There are two ways to resume full-speed target execution: "continue" and +"detach". With "continue", GDB inserts any specified breakpoints in the +target code and resumes execution; the target is still in "gdb mode". +If a breakpoint or other debug event (e.g. NMI) happens, the target +halts and communicates with GDB again, which is waiting for it. + +With "detach", GDB does *not* insert any breakpoints; target execution +is resumed and GDB stops communicating (does not wait for the target). +In this case, the target is no longer in "gdb mode" -- for example, +console messages no longer get sent separately to the KGDB port, or +encapsulated for GDB. If a debug event (e.g. NMI) occurs, the target +will re-enter "gdb mode" and will display this fact on the console; you +must give a new "target remote" command to gdb. + +NOTE: TO AVOID LOSSING CONSOLE MESSAGES IN CASE THE KERNEL CONSOLE AND +KGDB USING THE SAME PORT, THE TARGET WAITS FOR ANY INPUT CHARACTER ON +THE KGDB PORT AFTER A DETACH COMMAND. For example, after the detach you +could start a terminal emulator on the same host port and enter a ; +however, this program must then be terminated or suspended in order to +use GBD again if KGDB is re-entered. + + +Acknowledgements +================ + +This code was mostly generated by Henry Bell ; +largely from KGDB by Amit S. Kale - extracts from +code by Glenn Engel, Jim Kingdon, David Grothe , Tigran +Aivazian , William Gatliff , Ben +Lee, Steve Chamberlain and Benoit Miller are also +included. + +Jeremy Siegel + diff -puN Documentation/sh/new-machine.txt~sh-merge Documentation/sh/new-machine.txt --- 25/Documentation/sh/new-machine.txt~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/Documentation/sh/new-machine.txt 2004-01-09 21:32:27.000000000 -0800 @@ -1,6 +1,162 @@ -The multiple machine support relies on redirecting all functions which will -need to be machine specific through a table of function pointers, the -machvec. These functions fall into a number of categories: + + Adding a new board to LinuxSH + ================================ + + Paul Mundt + +This document attempts to outline what steps are necessary to add support +for new boards to the LinuxSH port under the new 2.5 and 2.6 kernels. This +also attempts to outline some of the noticeable changes between the 2.4 +and the 2.5/2.6 SH backend. + +1. New Directory Structure +========================== + +The first thing to note is the new directory structure. Under 2.4, most +of the board-specific code (with the exception of stboards) ended up +in arch/sh/kernel/ directly, with board-specific headers ending up in +include/asm-sh/. For the new kernel, things are broken out by board type, +companion chip type, and CPU type. Looking at a tree view of this directory +heirarchy looks like the following: + +Board-specific code: + +. +|-- arch +| `-- sh +| `-- boards +| |-- adx +| | `-- board-specific files +| |-- bigsur +| | `-- board-specific files +| | +| ... more boards here ... +| +`-- include + `-- asm-sh + |-- adx + | `-- board-specific headers + |-- bigsur + | `-- board-specific headers + | + .. more boards here ... + +It should also be noted that each board is required to have some certain +headers. At the time of this writing, io.h is the only thing that needs +to be provided for each board, and can generally just reference generic +functions (with the exception of isa_port2addr). + +Next, for companion chips: +. +`-- arch + `-- sh + `-- cchips + `-- hd6446x + |-- hd64461 + | `-- cchip-specific files + `-- hd64465 + `-- cchip-specific files + +... and so on. Headers for the companion chips are treated the same way as +board-specific headers. Thus, include/asm-sh/hd64461 is home to all of the +hd64461-specific headers. + +Finally, CPU family support is also abstracted: +. +|-- arch +| `-- sh +| |-- kernel +| | `-- cpu +| | |-- sh2 +| | | `-- SH-2 generic files +| | |-- sh3 +| | | `-- SH-3 generic files +| | `-- sh4 +| | `-- SH-4 generic files +| `-- mm +| `-- This is also broken out per CPU family, so each family can +| have their own set of cache/tlb functions. +| +`-- include + `-- asm-sh + |-- cpu-sh2 + | `-- SH-2 specific headers + |-- cpu-sh3 + | `-- SH-3 specific headers + `-- cpu-sh4 + `-- SH-4 specific headers + +It should be noted that CPU subtypes are _not_ abstracted. Thus, these still +need to be dealt with by the CPU family specific code. + +2. Adding a New Board +===================== + +The first thing to determine is whether the board you are adding will be +isolated, or whether it will be part of a family of boards that can mostly +share the same board-specific code with minor differences. + +In the first case, this is just a matter of making a directory for your +board in arch/sh/boards/ and adding rules to hook your board in with the +build system (more on this in the next section). However, for board families +it makes more sense to have a common top-level arch/sh/boards/ directory +and then populate that with sub-directories for each member of the family. +Both the Solution Engine and the hp6xx boards are an example of this. + +After you have setup your new arch/sh/boards/ directory, remember that you +also must add a directory in include/asm-sh for headers localized to this +board. In order to interoperate seamlessly with the build system, it's best +to have this directory the same as the arch/sh/boards/ directory name, +though if your board is again part of a family, the build system has ways +of dealing with this, and you can feel free to name the directory after +the family member itself. + +There are a few things that each board is required to have, both in the +arch/sh/boards and the include/asm-sh/ heirarchy. In order to better +explain this, we use some examples for adding an imaginary board. For +setup code, we're required at the very least to provide definitions for +get_system_type() and platform_setup(). For our imaginary board, this +might look something like: + +/* + * arch/sh/boards/vapor/setup.c - Setup code for imaginary board + */ +#include + +const char *get_system_type(void) +{ + return "FooTech Vaporboard"; +} + +int __init platform_setup(void) +{ + /* + * If our hardware actually existed, we would do real + * setup here. Though it's also sane to leave this empty + * if there's no real init work that has to be done for + * this board. + */ + + /* + * Presume all FooTech boards have the same broken timer, + * and also presume that we've defined foo_timer_init to + * do something useful. + */ + board_time_init = foo_timer_init; + + /* Start-up imaginary PCI ... */ + + /* And whatever else ... */ + + return 0; +} + +Our new imaginary board will also have to tie into the machvec in order for it +to be of any use. Currently the machvec is slowly on its way out, but is still +required for the time being. As such, let us take a look at what needs to be +done for the machvec assignment. + +machvec functions fall into a number of categories: - I/O functions to IO memory (inb etc) and PCI/main memory (readb etc). - I/O remapping functions (ioremap etc) @@ -27,16 +183,16 @@ There are three ways in which IO can be can be read from/written to directly. Thus adding a new machine involves the following steps (I will assume I am -adding a machine called fred): +adding a machine called vapor): - - add a new file include/asm-sh/io_fred.h which contains prototypes for + - add a new file include/asm-sh/vapor/io.h which contains prototypes for any machine specific IO functions prefixed with the machine name, for - example fred_inb. These will be needed when filling out the machine + example vapor_inb. These will be needed when filling out the machine vector. In addition, a section is required which defines what to do when building a machine specific version. For example: #ifdef __WANT_IO_DEF - #define inb fred_inb + #define inb vapor_inb ... #endif @@ -47,18 +203,18 @@ adding a machine called fred): functions will still be needed, so that a module built for a generic setup can be loaded. - - add a new file arch/sh/kernel/mach_fred.c. This contains the definition + - add a new file arch/sh/boards/vapor/mach.c. This contains the definition of the machine vector. When building the machine specific version, this will be the real machine vector (via an alias), while in the generic version is used to initialise the machine vector, and then freed, by making it initdata. This should be defined as: - struct sh_machine_vector mv_fred __initmv = { - mv_name: "Fred" + struct sh_machine_vector mv_vapor __initmv = { + .mv_name = "vapor", } - ALIAS_MV(se) + ALIAS_MV(vapor) - - finally add a file arch/sh/kernel/io_fred.c, which contains + - finally add a file arch/sh/boards/vapor/io.c, which contains definitions of the machine specific io functions. A note about initialisation functions. Three initialisation functions are @@ -75,3 +231,82 @@ they are targeting is present, however t so a flag can be added to the machine vector which will be set on those machines which have the hardware in question, reducing the probe to a single conditional. + +3. Hooking into the Build System +================================ + +Now that we have the corresponding directories setup, and all of the +board-specific code is in place, it's time to look at how to get the +whole mess to fit into the build system. + +Large portions of the build system are now entirely dynamic, and merely +require the proper entry here and there in order to get things done. + +The first thing to do is to add an entry to arch/sh/Kconfig, under the +"System type" menu: + +config SH_VAPOR + bool "Vapor" + help + select Vapor if configuring for a FooTech Vaporboard. + +next, this has to be added into arch/sh/Makefile. All boards require a +machdir-y entry in order to be built. This entry needs to be the name of +the board directory as it appears in arch/sh/boards, even if it is in a +sub-directory (in which case, all parent directories below arch/sh/boards/ +need to be listed). For our new board, this entry can look like: + +machdir-$(CONFIG_SH_VAPOR) += vapor + +provided that we've placed everything in the arch/sh/boards/vapor/ directory. + +Next, the build system assumes that your include/asm-sh directory will also +be named the same. If this is not the case (as is the case with multiple +boards belonging to a common family), then the directory name needs to be +implicitly appended to incdir-y. The existing code manages this for the +Solution Engine and hp6xx boards, so see these for an example. + +Once that is taken care of, it's time to add an entry for the mach type. +This is done by adding an entry to the end of the arch/sh/tools/mach-types +list. The method for doing this is self explanatory, and so we won't waste +space restating it here. After this is done, you will be able to use +implicit checks for your board if you need this somewhere throughout the +common code, such as: + + /* Make sure we're on the FooTech Vaporboard */ + if (!mach_is_vapor()) + return -ENODEV; + +also note that the mach_is_boardname() check will be implicitly forced to +lowercase, regardless of the fact that the mach-types entries are all +uppercase. You can read the script if you really care, but it's pretty ugly, +so you probably don't want to do that. + +Now all that's left to do is providing a defconfig for your new board. This +way, other people who end up with this board can simply use this config +for reference instead of trying to guess what settings are supposed to be +used on it. + +Also, as soon as you have copied over a sample .config for your new board +(assume arch/sh/configs/defconfig-vapor), you can also use this directly as a +build target, and it will be implicitly listed as such in the help text. + +Looking at the 'make help' output, you should now see something like: + +Architecture specific targets (sh): + zImage - Compressed kernel image (arch/sh/boot/zImage) + defconfig-adx - Build for adx + defconfig-cqreek - Build for cqreek + defconfig-dreamcast - Build for dreamcast +... + defconfig-vapor - Build for vapor + +which then allows you to do: + +$ make ARCH=sh CROSS_COMPILE=sh4-linux- defconfig-vapor vmlinux + +which will in turn copy the defconfig for this board, run it through +oldconfig (prompting you for any new options since the time of creation), +and start you on your way to having a functional kernel for your new +board. + diff -puN drivers/char/hp600_keyb.c~sh-merge drivers/char/hp600_keyb.c --- 25/drivers/char/hp600_keyb.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/drivers/char/hp600_keyb.c 2004-01-09 21:32:27.000000000 -0800 @@ -9,6 +9,7 @@ #include #include #include +#include #include #include diff -puN drivers/char/keyboard.c~sh-merge drivers/char/keyboard.c --- 25/drivers/char/keyboard.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/drivers/char/keyboard.c 2004-01-09 21:32:27.000000000 -0800 @@ -933,7 +933,7 @@ void kbd_refresh_leds(struct input_handl tasklet_enable(&keyboard_tasklet); } -#if defined(CONFIG_X86) || defined(CONFIG_IA64) || defined(CONFIG_ALPHA) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_SPARC32) || defined(CONFIG_SPARC64) || defined(CONFIG_PARISC) +#if defined(CONFIG_X86) || defined(CONFIG_IA64) || defined(CONFIG_ALPHA) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_SPARC32) || defined(CONFIG_SPARC64) || defined(CONFIG_PARISC) || defined(CONFIG_SH_MPC1211) static unsigned short x86_keycodes[256] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, diff -puN drivers/char/sh-sci.c~sh-merge drivers/char/sh-sci.c --- 25/drivers/char/sh-sci.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/drivers/char/sh-sci.c 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: sh-sci.c,v 1.40 2000/04/15 06:57:29 gniibe Exp $ +/* $Id: sh-sci.c,v 1.15 2003/10/13 07:21:19 lethal Exp $ * * linux/drivers/char/sh-sci.c * @@ -6,6 +6,7 @@ * Copyright (C) 1999, 2000 Niibe Yutaka * Copyright (C) 2000 Sugioka Toshinobu * Modified to support multiple serial ports. Stuart Menefy (May 2000). + * Modified to support SH7760 SCIF. Paul Mundt (Oct 2003). * * TTY code is based on sx.c (Specialix SX driver) by: * @@ -32,9 +33,13 @@ #include #include #include -#ifdef CONFIG_SERIAL_CONSOLE +#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_SH_KGDB_CONSOLE) #include #endif +#ifdef CONFIG_CPU_FREQ +#include +#include +#endif #include #include @@ -50,17 +55,37 @@ #include "sh-sci.h" +#ifdef CONFIG_SH_KGDB +#include + +int kgdb_sci_setup(void); +static int kgdb_get_char(struct sci_port *port); +static void kgdb_put_char(struct sci_port *port, char c); +static void kgdb_handle_error(struct sci_port *port); +static struct sci_port *kgdb_sci_port; + +#ifdef CONFIG_SH_KGDB_CONSOLE +static struct console kgdbcons; +void __init kgdb_console_init(void); +#endif /* CONFIG_SH_KGDB_CONSOLE */ + +#endif /* CONFIG_SH_KGDB */ + #ifdef CONFIG_SERIAL_CONSOLE static struct console sercons; static struct sci_port* sercons_port=0; static int sercons_baud; -#endif +#ifdef CONFIG_MAGIC_SYSRQ +#include +static int break_pressed; +#endif /* CONFIG_MAGIC_SYSRQ */ +#endif /* CONFIG_SERIAL_CONSOLE */ /* Function prototypes */ static void sci_init_pins_sci(struct sci_port* port, unsigned int cflag); #ifndef SCI_ONLY static void sci_init_pins_scif(struct sci_port* port, unsigned int cflag); -#if defined(__sh3__) +#if defined(CONFIG_CPU_SH3) static void sci_init_pins_irda(struct sci_port* port, unsigned int cflag); #endif #endif @@ -71,6 +96,8 @@ static void sci_enable_rx_interrupts(voi static int sci_get_CD(void *ptr); static void sci_shutdown_port(void *ptr); static int sci_set_real_termios(void *ptr); +static void sci_hungup(void *ptr); +static void sci_close(void *ptr); static int sci_chars_in_buffer(void *ptr); static int sci_request_irq(struct sci_port *port); static void sci_free_irq(struct sci_port *port); @@ -94,7 +121,7 @@ static void put_char(struct sci_port *po unsigned long flags; unsigned short status; - save_and_cli(flags); + local_irq_save(flags); do status = sci_in(port, SCxSR); @@ -104,11 +131,11 @@ static void put_char(struct sci_port *po sci_in(port, SCxSR); /* Dummy read */ sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); - restore_flags(flags); + local_irq_restore(flags); } #endif -#ifdef CONFIG_SH_STANDARD_BIOS +#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB) static void handle_error(struct sci_port *port) { /* Clear error flags */ @@ -121,7 +148,7 @@ static int get_char(struct sci_port *por unsigned short status; int c; - save_and_cli(flags); + local_irq_save(flags); do { status = sci_in(port, SCxSR); if (status & SCxSR_ERRORS(port)) { @@ -132,7 +159,7 @@ static int get_char(struct sci_port *por c = sci_in(port, SCxRDR); sci_in(port, SCxSR); /* Dummy read */ sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); - restore_flags(flags); + local_irq_restore(flags); return c; } @@ -150,7 +177,7 @@ static __inline__ char lowhex(int x) return hexchars[x & 0xf]; } -#endif +#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */ /* * Send the packet in buffer. The host gets one chance to read it. @@ -162,13 +189,22 @@ static void put_string(struct sci_port * { int i; const unsigned char *p = buffer; -#ifdef CONFIG_SH_STANDARD_BIOS + +#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB) int checksum; + int usegdb=0; +#ifdef CONFIG_SH_STANDARD_BIOS /* This call only does a trap the first time it is * called, and so is safe to do here unconditionally */ - if (sh_bios_in_gdb_mode()) { + usegdb |= sh_bios_in_gdb_mode(); +#endif +#ifdef CONFIG_SH_KGDB + usegdb |= (kgdb_in_gdb_mode && (port == kgdb_sci_port)); +#endif + + if (usegdb) { /* $#. */ do { unsigned char c; @@ -191,15 +227,101 @@ static void put_string(struct sci_port * put_char(port, lowhex(checksum)); } while (get_char(port) != '+'); } else -#endif +#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */ for (i=0; igs.tty)) - clear_bit(TTY_HW_COOK_IN, &port->gs.tty->flags); - else - set_bit(TTY_HW_COOK_IN, &port->gs.tty->flags); - -/* Tell line discipline whether we will do output cooking. - * If OPOST is set and no other output flags are set then we can do output - * processing. Even if only *one* other flag in the O_OTHER group is set - * we do cooking in software. - */ - if (O_OPOST(port->gs.tty) && !O_OTHER(port->gs.tty)) - set_bit(TTY_HW_COOK_OUT, &port->gs.tty->flags); - else - clear_bit(TTY_HW_COOK_OUT, &port->gs.tty->flags); - return 0; } @@ -437,7 +545,7 @@ static void sci_transmit_chars(struct sc status = sci_in(port, SCxSR); if (!(status & SCxSR_TDxE(port))) { - save_and_cli(flags); + local_irq_save(flags); ctrl = sci_in(port, SCSCR); if (port->gs.xmit_cnt == 0) { ctrl &= ~SCI_CTRL_FLAGS_TIE; @@ -445,7 +553,7 @@ static void sci_transmit_chars(struct sc } else ctrl |= SCI_CTRL_FLAGS_TIE; sci_out(port, SCSCR, ctrl); - restore_flags(flags); + local_irq_restore(flags); return; } @@ -459,7 +567,7 @@ static void sci_transmit_chars(struct sc if (count > txroom) count = txroom; - /* Don't copy pas the end of the source buffer */ + /* Don't copy past the end of the source buffer */ if (count > SERIAL_XMIT_SIZE - port->gs.xmit_tail) count = SERIAL_XMIT_SIZE - port->gs.xmit_tail; @@ -486,7 +594,7 @@ static void sci_transmit_chars(struct sc if (port->gs.xmit_cnt <= port->gs.wakeup_chars) sci_sched_event(port, SCI_EVENT_WRITE_WAKEUP); - save_and_cli(flags); + local_irq_save(flags); ctrl = sci_in(port, SCSCR); if (port->gs.xmit_cnt == 0) { ctrl &= ~SCI_CTRL_FLAGS_TIE; @@ -499,10 +607,14 @@ static void sci_transmit_chars(struct sc ctrl |= SCI_CTRL_FLAGS_TIE; } sci_out(port, SCSCR, ctrl); - restore_flags(flags); + local_irq_restore(flags); } -static inline void sci_receive_chars(struct sci_port *port) +/* On SH3, SCIF may read end-of-break as a space->mark char */ +#define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); }) + +static inline void sci_receive_chars(struct sci_port *port, + struct pt_regs *regs) { int i, count; struct tty_struct *tty; @@ -525,7 +637,7 @@ static inline void sci_receive_chars(str if (tty->flip.count + count > TTY_FLIPBUF_SIZE) count = TTY_FLIPBUF_SIZE - tty->flip.count; - /* If for one reason or another, we can't copy more data, we're done! */ + /* If for any reason we can't copy more data, we're done! */ if (count == 0) break; @@ -534,8 +646,42 @@ static inline void sci_receive_chars(str tty->flip.flag_buf_ptr[0] = TTY_NORMAL; } else { for (i=0; iflip.char_buf_ptr[i] = sci_in(port, SCxRDR); + char c = sci_in(port, SCxRDR); status = sci_in(port, SCxSR); +#if defined(__SH3__) + /* Skip "chars" during break */ + if (port->break_flag) { + if ((c == 0) && + (status & SCxSR_FER(port))) { + count--; i--; + continue; + } + /* Nonzero => end-of-break */ + dprintk("scif: debounce<%02x>\n", c); + port->break_flag = 0; + if (STEPFN(c)) { + count--; i--; + continue; + } + } +#endif /* __SH3__ */ +#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) + if (break_pressed && (port == sercons_port)) { + if (c != 0 && + time_before(jiffies, + break_pressed + HZ*5)) { + handle_sysrq(c, regs, NULL); + break_pressed = 0; + count--; i--; + continue; + } else if (c != 0) { + break_pressed = 0; + } + } +#endif /* CONFIG_SERIAL_CONSOLE && CONFIG_MAGIC_SYSRQ */ + + /* Store data and status */ + tty->flip.char_buf_ptr[i] = c; if (status&SCxSR_FER(port)) { tty->flip.flag_buf_ptr[i] = TTY_FRAME; dprintk("sci: frame error\n"); @@ -563,6 +709,10 @@ static inline void sci_receive_chars(str if (copied) /* Tell the rest of the system the news. New characters! */ tty_flip_buffer_push(tty); + else { + sci_in(port, SCxSR); /* dummy read */ + sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); + } } static inline int sci_handle_errors(struct sci_port *port) @@ -615,13 +765,32 @@ static inline int sci_handle_breaks(stru struct tty_struct *tty = port->gs.tty; if (status&SCxSR_BRK(port) && tty->flip.countbreak_flag) + goto break_continue; + port->break_flag = 1; +#endif +#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) + if (port == sercons_port) { + if (break_pressed == 0) { + break_pressed = jiffies; + dprintk("sci: implied sysrq\n"); + goto break_continue; + } + /* Double break implies a real break */ + break_pressed = 0; + } +#endif /* Notify of BREAK */ copied++; *tty->flip.flag_buf_ptr++ = TTY_BREAK; dprintk("sci: BREAK detected\n"); } + break_continue: -#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_ST40STB1) +#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_ST40STB1) || \ + defined(CONFIG_CPU_SUBTYPE_SH7760) /* XXX: Handle SCIF overrun error */ if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) { sci_out(port, SCLSR, 0); @@ -641,19 +810,22 @@ static inline int sci_handle_breaks(stru return copied; } -static void sci_rx_interrupt(int irq, void *ptr, struct pt_regs *regs) +static irqreturn_t sci_rx_interrupt(int irq, void *ptr, struct pt_regs *regs) { struct sci_port *port = ptr; if (port->gs.flags & GS_ACTIVE) if (!(port->gs.flags & SCI_RX_THROTTLE)) { - sci_receive_chars(port); - return; + sci_receive_chars(port, regs); + return IRQ_HANDLED; + } sci_disable_rx_interrupts(port); + + return IRQ_HANDLED; } -static void sci_tx_interrupt(int irq, void *ptr, struct pt_regs *regs) +static irqreturn_t sci_tx_interrupt(int irq, void *ptr, struct pt_regs *regs) { struct sci_port *port = ptr; @@ -662,9 +834,11 @@ static void sci_tx_interrupt(int irq, vo else { sci_disable_tx_interrupts(port); } + + return IRQ_HANDLED; } -static void sci_er_interrupt(int irq, void *ptr, struct pt_regs *regs) +static irqreturn_t sci_er_interrupt(int irq, void *ptr, struct pt_regs *regs) { struct sci_port *port = ptr; @@ -683,15 +857,19 @@ static void sci_er_interrupt(int irq, vo /* Kick the transmission */ sci_tx_interrupt(irq, ptr, regs); + + return IRQ_HANDLED; } -static void sci_br_interrupt(int irq, void *ptr, struct pt_regs *regs) +static irqreturn_t sci_br_interrupt(int irq, void *ptr, struct pt_regs *regs) { struct sci_port *port = ptr; /* Handle BREAKs */ sci_handle_breaks(port); sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port)); + + return IRQ_HANDLED; } static void do_softint(void *private_) @@ -723,11 +901,11 @@ static void sci_disable_tx_interrupts(vo unsigned short ctrl; /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ - save_and_cli(flags); + local_irq_save(flags); ctrl = sci_in(port, SCSCR); ctrl &= ~SCI_CTRL_FLAGS_TIE; sci_out(port, SCSCR, ctrl); - restore_flags(flags); + local_irq_restore(flags); } static void sci_enable_tx_interrupts(void *ptr) @@ -746,11 +924,11 @@ static void sci_disable_rx_interrupts(vo unsigned short ctrl; /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */ - save_and_cli(flags); + local_irq_save(flags); ctrl = sci_in(port, SCSCR); ctrl &= ~SCI_CTRL_FLAGS_RIE; sci_out(port, SCSCR, ctrl); - restore_flags(flags); + local_irq_restore(flags); } static void sci_enable_rx_interrupts(void * ptr) @@ -760,11 +938,11 @@ static void sci_enable_rx_interrupts(voi unsigned short ctrl; /* Set RIE (Receive Interrupt Enable) bit in SCSCR */ - save_and_cli(flags); + local_irq_save(flags); ctrl = sci_in(port, SCSCR); ctrl |= SCI_CTRL_FLAGS_RIE; sci_out(port, SCSCR, ctrl); - restore_flags(flags); + local_irq_restore(flags); } static int sci_get_CD(void * ptr) @@ -848,6 +1026,15 @@ static int sci_open(struct tty_struct * } #endif +#ifdef CONFIG_SH_KGDB_CONSOLE + if (kgdbcons.cflag && kgdbcons.index == line) { + tty->termios->c_cflag = kgdbcons.cflag; + port->gs.baud = kgdb_baud; + sercons.cflag = 0; + sci_set_real_termios(port); + } +#endif + sci_enable_rx_interrupts(port); return 0; @@ -859,6 +1046,16 @@ failed_1: return retval; } +static void sci_hungup(void *ptr) +{ + return; +} + +static void sci_close(void *ptr) +{ + return; +} + static int sci_ioctl(struct tty_struct * tty, struct file * filp, unsigned int cmd, unsigned long arg) { @@ -870,41 +1067,41 @@ static int sci_ioctl(struct tty_struct * switch (cmd) { case TIOCGSOFTCAR: rc = put_user(((tty->termios->c_cflag & CLOCAL) ? 1 : 0), - (unsigned int *) arg); + (unsigned int __user *) arg); break; case TIOCSSOFTCAR: - if ((rc = get_user(ival, (unsigned int *) arg)) == 0) + if ((rc = get_user(ival, (unsigned int __user *) arg)) == 0) tty->termios->c_cflag = (tty->termios->c_cflag & ~CLOCAL) | (ival ? CLOCAL : 0); break; case TIOCGSERIAL: - if ((rc = verify_area(VERIFY_WRITE, (void *) arg, + if ((rc = verify_area(VERIFY_WRITE, (void __user *) arg, sizeof(struct serial_struct))) == 0) rc = gs_getserial(&port->gs, (struct serial_struct *) arg); break; case TIOCSSERIAL: - if ((rc = verify_area(VERIFY_READ, (void *) arg, + if ((rc = verify_area(VERIFY_READ, (void __user *) arg, sizeof(struct serial_struct))) == 0) rc = gs_setserial(&port->gs, (struct serial_struct *) arg); break; case TIOCMGET: ival = sci_getsignals(port); - rc = put_user(ival, (unsigned int *) arg); + rc = put_user(ival, (unsigned int __user *) arg); break; case TIOCMBIS: - if ((rc = get_user(ival, (unsigned int *) arg)) == 0) + if ((rc = get_user(ival, (unsigned int __user *) arg)) == 0) sci_setsignals(port, ((ival & TIOCM_DTR) ? 1 : -1), ((ival & TIOCM_RTS) ? 1 : -1)); break; case TIOCMBIC: - if ((rc = get_user(ival, (unsigned int *) arg)) == 0) + if ((rc = get_user(ival, (unsigned int __user *) arg)) == 0) sci_setsignals(port, ((ival & TIOCM_DTR) ? 0 : -1), ((ival & TIOCM_RTS) ? 0 : -1)); break; case TIOCMSET: - if ((rc = get_user(ival, (unsigned int *)arg)) == 0) + if ((rc = get_user(ival, (unsigned int __user *)arg)) == 0) sci_setsignals(port, ((ival & TIOCM_DTR) ? 1 : 0), ((ival & TIOCM_RTS) ? 1 : 0)); break; @@ -937,6 +1134,7 @@ static void sci_unthrottle(struct tty_st * was throttled */ port->gs.flags &= ~SCI_RX_THROTTLE; + sci_enable_rx_interrupts(port); return; } @@ -972,6 +1170,36 @@ static int sci_read_proc(char *page, cha } #endif +#ifdef CONFIG_CPU_FREQ +/* + * Here we define a transistion notifier so that we can update all of our + * ports' baud rate when the peripheral clock changes. + */ + +static int sci_notifier(struct notifier_block *self, unsigned long phase, void *p) +{ + struct cpufreq_freqs *freqs = p; + int i; + + if (phase == CPUFREQ_POSTCHANGE) { + for (i = 0; i < SCI_NPORTS; i++) { + /* + * This will force a baud rate change in hardware. + */ + if (sci_ports[i].gs.tty != NULL) { + sci_set_baud(&sci_ports[i], sci_ports[i].gs.baud); + } + } + printk("%s: got a postchange notification for cpu %d (old %d, new %d)\n", + __FUNCTION__, freqs->cpu, freqs->old, freqs->new); + } + + return NOTIFY_OK; +} + +static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 }; +#endif /* CONFIG_CPU_FREQ */ + static struct tty_operations sci_ops = { .open = sci_open, .close = gs_close, @@ -1040,13 +1268,21 @@ static int sci_init_drivers(void) port->icount.overrun = port->icount.brk = 0; } +#ifdef CONFIG_CPU_FREQ + /* Setup transition notifier */ + if (cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER) < 0) { + printk(KERN_ERR "sci: Unable to register CPU frequency notifier\n"); + return 1; + } + printk("sci: CPU frequency notifier registered\n"); +#endif return 0; } static int sci_request_irq(struct sci_port *port) { int i; - void (*handlers[4])(int irq, void *ptr, struct pt_regs *regs) = { + irqreturn_t (*handlers[4])(int irq, void *p, struct pt_regs *regs) = { sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt, sci_br_interrupt, }; @@ -1233,3 +1469,110 @@ static int __init sci_console_init(void) console_initcall(sci_console_init); #endif /* CONFIG_SERIAL_CONSOLE */ + + +#ifdef CONFIG_SH_KGDB + +/* Initialise the KGDB serial port */ +int kgdb_sci_setup(void) +{ + int cflag = CREAD | HUPCL | CLOCAL; + + if ((kgdb_portnum < 0) || (kgdb_portnum >= SCI_NPORTS)) + return -1; + + kgdb_sci_port = &sci_ports[kgdb_portnum]; + + switch (kgdb_baud) { + case 115200: + cflag |= B115200; + break; + case 57600: + cflag |= B57600; + break; + case 38400: + cflag |= B38400; + break; + case 19200: + cflag |= B19200; + break; + case 9600: + default: + cflag |= B9600; + kgdb_baud = 9600; + break; + } + + switch (kgdb_bits) { + case '7': + cflag |= CS7; + break; + default: + case '8': + cflag |= CS8; + break; + } + + switch (kgdb_parity) { + case 'O': + cflag |= PARODD; + break; + case 'E': + cflag |= PARENB; + break; + } + + kgdb_cflag = cflag; + sci_set_termios_cflag(kgdb_sci_port, kgdb_cflag, kgdb_baud); + + /* Set up the interrupt for BREAK from GDB */ + /* Commented out for now since it may not be possible yet... + request_irq(kgdb_sci_port->irqs[0], kgdb_break_interrupt, + SA_INTERRUPT, "sci", kgdb_sci_port); + sci_enable_rx_interrupts(kgdb_sci_port); + */ + + /* Setup complete: initialize function pointers */ + kgdb_getchar = kgdb_sci_getchar; + kgdb_putchar = kgdb_sci_putchar; + + return 0; +} + +#ifdef CONFIG_SH_KGDB_CONSOLE + +/* Create a console device */ +static kdev_t kgdb_console_device(struct console *c) +{ + return MKDEV(SCI_MAJOR, SCI_MINOR_START + c->index); +} + +/* Set up the KGDB console */ +static int __init kgdb_console_setup(struct console *co, char *options) +{ + /* NB we ignore 'options' because we've already done the setup */ + co->cflag = kgdb_cflag; + + return 0; +} + +/* Register the KGDB console so we get messages (d'oh!) */ +void __init kgdb_console_init(void) +{ + register_console(&kgdbcons); +} + +/* The console structure for KGDB */ +static struct console kgdbcons = { + name:"ttySC", + write:kgdb_console_write, + device:kgdb_console_device, + wait_key:serial_console_wait_key, + setup:kgdb_console_setup, + flags:CON_PRINTBUFFER | CON_ENABLED, + index:-1, +}; + +#endif /* CONFIG_SH_KGDB_CONSOLE */ + +#endif /* CONFIG_SH_KGDB */ diff -puN drivers/char/sh-sci.h~sh-merge drivers/char/sh-sci.h --- 25/drivers/char/sh-sci.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/drivers/char/sh-sci.h 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: sh-sci.h,v 1.8 2000/03/08 15:19:39 gniibe Exp $ +/* $Id: sh-sci.h,v 1.6 2003/10/13 01:11:11 lethal Exp $ * * linux/drivers/char/sh-sci.h * @@ -6,6 +6,7 @@ * Copyright (C) 1999, 2000 Niibe Yutaka * Copyright (C) 2000 Greg Banks * Modified to support multiple serial ports. Stuart Menefy (May 2000). + * Modified to support SH7760 SCIF. Paul Mundt (Oct 2003). * */ #include @@ -26,6 +27,9 @@ #define SH3_IRDA_IRQS { 52, 53, 55, 54 } #define SH4_SCIF_IRQS { 40, 41, 43, 42 } #define STB1_SCIF1_IRQS {23, 24, 26, 25 } +#define SH7760_SCIF0_IRQS { 52, 53, 55, 54 } +#define SH7760_SCIF1_IRQS { 72, 73, 75, 74 } +#define SH7760_SCIF2_IRQS { 76, 77, 79, 78 } #if defined(CONFIG_CPU_SUBTYPE_SH7708) # define SCI_NPORTS 1 @@ -59,6 +63,19 @@ 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ : \ 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ ) # define SCI_AND_SCIF +#elif defined(CONFIG_CPU_SUBTYPE_SH7760) +# define SCI_NPORTS 3 +# define SCI_INIT { \ + { {}, PORT_SCIF, 0xfe600000, SH7760_SCIF0_IRQS, sci_init_pins_scif }, \ + { {}, PORT_SCIF, 0xfe610000, SH7760_SCIF1_IRQS, sci_init_pins_scif }, \ + { {}, PORT_SCIF, 0xfe620000, SH7760_SCIF2_IRQS, sci_init_pins_scif } \ +} +# define SCSPTR0 0xfe600024 /* 16 bit SCIF */ +# define SCSPTR1 0xfe610024 /* 16 bit SCIF */ +# define SCSPTR2 0xfe620024 /* 16 bit SCIF */ +# define SCIF_ORDER 0x0001 /* overrun error bit */ +# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ +# define SCIF_ONLY #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) # define SCI_NPORTS 2 # define SCI_INIT { \ @@ -161,29 +178,6 @@ /* Generic serial flags */ #define SCI_RX_THROTTLE 0x0000001 -/* generic serial tty */ -#define O_OTHER(tty) \ - ((O_OLCUC(tty)) ||\ - (O_ONLCR(tty)) ||\ - (O_OCRNL(tty)) ||\ - (O_ONOCR(tty)) ||\ - (O_ONLRET(tty)) ||\ - (O_OFILL(tty)) ||\ - (O_OFDEL(tty)) ||\ - (O_NLDLY(tty)) ||\ - (O_CRDLY(tty)) ||\ - (O_TABDLY(tty)) ||\ - (O_BSDLY(tty)) ||\ - (O_VTDLY(tty)) ||\ - (O_FFDLY(tty))) - -#define I_OTHER(tty) \ - ((I_INLCR(tty)) ||\ - (I_IGNCR(tty)) ||\ - (I_ICRNL(tty)) ||\ - (I_IUCLC(tty)) ||\ - (L_ISIG(tty))) - #define SCI_MAGIC 0xbabeface /* @@ -202,6 +196,7 @@ struct sci_port { struct async_icount icount; struct work_struct tqueue; unsigned long event; + int break_flag; }; #define SCI_IN(size, offset) \ @@ -247,7 +242,7 @@ struct sci_port { SCI_OUT(scif_size, scif_offset, value); \ } -#ifdef __sh3__ +#ifdef CONFIG_CPU_SH3 #define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \ sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \ CPU_SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh3_scif_offset, sh3_scif_size) @@ -307,6 +302,16 @@ static inline int sci_rxd_in(struct sci_ #endif return 1; } +#elif defined(CONFIG_CPU_SUBTYPE_SH7760) +static inline int sci_rxd_in(struct sci_port *port) +{ + if (port->base == 0xfe600000) + return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->base == 0xfe610000) + return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->base == 0xfe620000) + return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ +} #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) static inline int sci_rxd_in(struct sci_port *port) { @@ -360,4 +365,5 @@ static inline int sci_rxd_in(struct sci_ #define BPS_38400 SCBRR_VALUE(38400) #define BPS_57600 SCBRR_VALUE(57600) #define BPS_115200 SCBRR_VALUE(115200) +#define BPS_230400 SCBRR_VALUE(230400) diff -puN drivers/ide/Kconfig~sh-merge drivers/ide/Kconfig --- 25/drivers/ide/Kconfig~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/drivers/ide/Kconfig 2004-01-09 21:32:27.000000000 -0800 @@ -97,7 +97,7 @@ comment "Please see Documentation/ide.tx config BLK_DEV_HD_IDE bool "Use old disk-only driver on primary interface" - depends on X86 && X86_PC9800!=y + depends on ((X86 && X86_PC9800!=y) || SH_MPC1211) ---help--- There are two drivers for MFM/RLL/IDE disks. Most people use just the new enhanced driver by itself. This option however installs the diff -puN drivers/net/stnic.c~sh-merge drivers/net/stnic.c --- 25/drivers/net/stnic.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/drivers/net/stnic.c 2004-01-09 21:32:27.000000000 -0800 @@ -306,12 +306,12 @@ stnic_init (struct net_device *dev) } /* Hardware interrupt handler. */ -extern void ei_interrupt (int irq, void *dev_id, struct pt_regs *regs); +irqreturn_t ei_interrupt (int irq, void *dev_id, struct pt_regs *regs); -void +irqreturn_t do_stnic_intr (int irq, void *dev_id, struct pt_regs *regs) { - ei_interrupt (0, stnic_dev, regs); + return ei_interrupt (0, stnic_dev, regs); } module_init(stnic_probe); diff -puN drivers/pci/pci.ids~sh-merge drivers/pci/pci.ids --- 25/drivers/pci/pci.ids~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/drivers/pci/pci.ids 2004-01-09 21:32:27.000000000 -0800 @@ -3539,6 +3539,7 @@ 11aa Actel 11ab Galileo Technology Ltd. 0146 GT-64010/64010A System Controller + 4146 GT-64111 System Controller 4320 Gigabit Ethernet Adapter 11ab 9521 Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter 4611 GT-64115 System Controller @@ -3725,6 +3726,7 @@ 11d9 TEC Corporation 11da Novell 11db Sega Enterprises Ltd + 1234 Broadband Adapter 11dc Questra Corporation 11dd Crosfield Electronics Limited 11de Zoran Corporation diff -puN drivers/video/Kconfig~sh-merge drivers/video/Kconfig --- 25/drivers/video/Kconfig~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/drivers/video/Kconfig 2004-01-09 21:32:27.000000000 -0800 @@ -406,14 +406,6 @@ config FB_PVR2 (). Please see the file . -config FB_PVR2_DEBUG - bool "Debug pvr2fb" - depends on FB_PVR2=y - help - Say Y here if you wish for the pvr2fb driver to print out debugging - messages. Most people will want to say N here. If unsure, you will - also want to say N. - config FB_E1355 bool "Epson 1355 framebuffer support" depends on FB && SUPERH diff -puN drivers/video/pvr2fb.c~sh-merge drivers/video/pvr2fb.c --- 25/drivers/video/pvr2fb.c~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/drivers/video/pvr2fb.c 2004-01-09 21:32:27.000000000 -0800 @@ -4,7 +4,7 @@ * Dreamcast. * * Copyright (c) 2001 M. R. Brown - * Copyright (c) 2001, 2002, 2003 Paul Mundt + * Copyright (c) 2001, 2002, 2003, 2004 Paul Mundt * * This file is part of the LinuxDC project (linuxdc.sourceforge.net). * @@ -46,6 +46,8 @@ * the benefit of being fully researched, so some modes may be broken. */ +#undef DEBUG + #include #include #include @@ -58,26 +60,30 @@ #include #include #include +#include #ifdef CONFIG_SH_DREAMCAST -#include #include -#include +#include #endif -#ifdef CONFIG_MTRR -#include +#ifdef CONFIG_SH_DMA +#include +#include +#include #endif -#ifdef CONFIG_FB_PVR2_DEBUG -# define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) -#else -# define DPRINTK(fmt, args...) +#ifdef CONFIG_SH_STORE_QUEUES +#include +#include #endif -/* 2D video registers */ -#define DISP_BASE 0xa05f8000 +#ifndef PCI_DEVICE_ID_NEC_NEON250 +# define PCI_DEVICE_ID_NEC_NEON250 0x0067 +#endif +/* 2D video registers */ +#define DISP_BASE par->mmio_base #define DISP_BRDRCOLR (DISP_BASE + 0x40) #define DISP_DIWMODE (DISP_BASE + 0x44) #define DISP_DIWADDRL (DISP_BASE + 0x50) @@ -101,11 +107,16 @@ #define NTSC_HTOTAL 857 #define NTSC_VTOTAL 262 +/* Supported cable types */ enum { CT_VGA, CT_NONE, CT_RGB, CT_COMPOSITE }; +/* Supported video output types */ enum { VO_PAL, VO_NTSC, VO_VGA }; -struct pvr2_params { u_short val; char *name; }; +/* Supported palette types */ +enum { PAL_ARGB1555, PAL_RGB565, PAL_ARGB4444, PAL_ARGB8888 }; + +struct pvr2_params { unsigned int val; char *name; }; static struct pvr2_params cables[] __initdata = { { CT_VGA, "VGA" }, { CT_RGB, "RGB" }, { CT_COMPOSITE, "COMPOSITE" }, }; @@ -119,23 +130,24 @@ static struct pvr2_params outputs[] __in */ static struct pvr2fb_par { - u_short hsync_total; /* Clocks/line */ - u_short vsync_total; /* Lines/field */ - u_short borderstart_h; - u_short borderstop_h; - u_short borderstart_v; - u_short borderstop_v; - u_short diwstart_h; /* Horizontal offset of the display field */ - u_short diwstart_v; /* Vertical offset of the display field, for + unsigned int hsync_total; /* Clocks/line */ + unsigned int vsync_total; /* Lines/field */ + unsigned int borderstart_h; + unsigned int borderstop_h; + unsigned int borderstart_v; + unsigned int borderstop_v; + unsigned int diwstart_h; /* Horizontal offset of the display field */ + unsigned int diwstart_v; /* Vertical offset of the display field, for interlaced modes, this is the long field */ - u_long disp_start; /* Address of image within VRAM */ - u_char is_interlaced; /* Is the display interlaced? */ - u_char is_doublescan; /* Are scanlines output twice? (doublescan) */ - u_char is_lowres; /* Is horizontal pixel-doubling enabled? */ + unsigned long disp_start; /* Address of image within VRAM */ + unsigned char is_interlaced; /* Is the display interlaced? */ + unsigned char is_doublescan; /* Are scanlines output twice? (doublescan) */ + unsigned char is_lowres; /* Is horizontal pixel-doubling enabled? */ + + unsigned long mmio_base; /* MMIO base */ } *currentpar; static struct fb_info *fb_info; -static int pvr2fb_inverse = 0; static struct fb_fix_screeninfo pvr2_fix __initdata = { .id = "NEC PowerVR2", @@ -161,10 +173,8 @@ static struct fb_var_screeninfo pvr2_var .vmode = FB_VMODE_NONINTERLACED, }; -#define VIDEOMEMSIZE (8*1024*1024) -static u_long videomemory = 0xa5000000, videomemorysize = VIDEOMEMSIZE; -static int cable_type = -1; -static int video_output = -1; +static int cable_type = CT_VGA; +static int video_output = VO_VGA; static int nopan = 0; static int nowrap = 1; @@ -172,20 +182,29 @@ static int nowrap = 1; /* * We do all updating, blanking, etc. during the vertical retrace period */ -static u_short do_vmode_full = 0; /* Change the video mode */ -static u_short do_vmode_pan = 0; /* Update the video mode */ +static unsigned int do_vmode_full = 0; /* Change the video mode */ +static unsigned int do_vmode_pan = 0; /* Update the video mode */ static short do_blank = 0; /* (Un)Blank the screen */ -static u_short is_blanked = 0; /* Is the screen blanked? */ +static unsigned int is_blanked = 0; /* Is the screen blanked? */ + +#ifdef CONFIG_SH_STORE_QUEUES +static struct sq_mapping *pvr2fb_map; +#endif + +#ifdef CONFIG_SH_DMA +static unsigned int shdma = PVR2_CASCADE_CHAN; +static unsigned int pvr2dma = ONCHIP_NR_DMA_CHANNELS; +#endif /* Interface used by the world */ int pvr2fb_setup(char*); -static int pvr2fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info); +static int pvr2fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green, unsigned int blue, + unsigned int transp, struct fb_info *info); static int pvr2fb_blank(int blank, struct fb_info *info); -static u_long get_line_length(int xres_virtual, int bpp); +static unsigned long get_line_length(int xres_virtual, int bpp); static void set_color_bitfields(struct fb_var_screeninfo *var); static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info); static int pvr2fb_set_par(struct fb_info *info); @@ -196,6 +215,8 @@ static irqreturn_t pvr2fb_interrupt(int static int pvr2_init_cable(void); static int pvr2_get_param(const struct pvr2_params *p, const char *s, int val, int size); +static ssize_t pvr2fb_write(struct file *file, const char *buf, + size_t count, loff_t *ppos); static struct fb_ops pvr2fb_ops = { .owner = THIS_MODULE, @@ -203,6 +224,9 @@ static struct fb_ops pvr2fb_ops = { .fb_blank = pvr2fb_blank, .fb_check_var = pvr2fb_check_var, .fb_set_par = pvr2fb_set_par, +#ifdef CONFIG_SH_DMA + .fb_write = pvr2fb_write, +#endif .fb_fillrect = cfb_fillrect, .fb_copyarea = cfb_copyarea, .fb_imageblit = cfb_imageblit, @@ -241,21 +265,36 @@ static struct fb_videomode pvr2_modedb[] static int defmode = DEFMODE_NTSC; static char *mode_option __initdata = NULL; +static inline void pvr2fb_set_pal_type(unsigned int type) +{ + struct pvr2fb_par *par = (struct pvr2fb_par *)fb_info->par; + + fb_writel(type, par->mmio_base + 0x108); +} + +static inline void pvr2fb_set_pal_entry(struct pvr2fb_par *par, + unsigned int regno, + unsigned int val) +{ + fb_writel(val, par->mmio_base + 0x1000 + (4 * regno)); +} + static int pvr2fb_blank(int blank, struct fb_info *info) { do_blank = blank ? blank : -1; return 0; } -static inline u_long get_line_length(int xres_virtual, int bpp) +static inline unsigned long get_line_length(int xres_virtual, int bpp) { - return (u_long)((((xres_virtual*bpp)+31)&~31) >> 3); + return (unsigned long)((((xres_virtual*bpp)+31)&~31) >> 3); } static void set_color_bitfields(struct fb_var_screeninfo *var) { switch (var->bits_per_pixel) { case 16: /* RGB 565 */ + pvr2fb_set_pal_type(PAL_RGB565); var->red.offset = 11; var->red.length = 5; var->green.offset = 5; var->green.length = 6; var->blue.offset = 0; var->blue.length = 5; @@ -268,6 +307,7 @@ static void set_color_bitfields(struct f var->transp.offset = 0; var->transp.length = 0; break; case 32: /* ARGB 8888 */ + pvr2fb_set_pal_type(PAL_ARGB8888); var->red.offset = 16; var->red.length = 8; var->green.offset = 8; var->green.length = 8; var->blue.offset = 0; var->blue.length = 8; @@ -276,31 +316,42 @@ static void set_color_bitfields(struct f } } -static int pvr2fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info) +static int pvr2fb_setcolreg(unsigned int regno, unsigned int red, + unsigned int green, unsigned int blue, + unsigned int transp, struct fb_info *info) { - if (regno > 255) + struct pvr2fb_par *par = (struct pvr2fb_par *)info->par; + unsigned int tmp; + + if (regno > info->cmap.len) return 1; - if (regno < 16) { - switch (info->var.bits_per_pixel) { - case 16: /* RGB 565 */ - ((u16*)(info->pseudo_palette))[regno] = (red & 0xf800) | - ((green & 0xfc00) >> 5) | - ((blue & 0xf800) >> 11); - break; - case 24: /* RGB 888 */ - red >>= 8; green >>= 8; blue >>= 8; - ((u32*)(info->pseudo_palette))[regno] = (red << 16) | (green << 8) | blue; - break; - case 32: /* ARGB 8888 */ - red >>= 8; green >>= 8; blue >>= 8; - ((u32*)(info->pseudo_palette))[regno] = (transp << 24) |(red << 16) | (green << 8) | blue; - break; - default: - DPRINTK("Invalid bit depth %d?!?\n", info->var.bits_per_pixel); - return 1; - } + /* + * We only support the hardware palette for 16 and 32bpp. It's also + * expected that the palette format has been set by the time we get + * here, so we don't waste time setting it again. + */ + switch (info->var.bits_per_pixel) { + case 16: /* RGB 565 */ + tmp = (red & 0xf800) | + ((green & 0xfc00) >> 5) | + ((blue & 0xf800) >> 11); + + pvr2fb_set_pal_entry(par, regno, tmp); + break; + case 24: /* RGB 888 */ + red >>= 8; green >>= 8; blue >>= 8; + ((u32*)(info->pseudo_palette))[regno] = (red << 16) | (green << 8) | blue; + break; + case 32: /* ARGB 8888 */ + red >>= 8; green >>= 8; blue >>= 8; + tmp = (transp << 24) | (red << 16) | (green << 8) | blue; + + pvr2fb_set_pal_entry(par, regno, tmp); + break; + default: + pr_debug("Invalid bit depth %d?!?\n", info->var.bits_per_pixel); + return 1; } return 0; @@ -310,8 +361,8 @@ static int pvr2fb_set_par(struct fb_info { struct pvr2fb_par *par = (struct pvr2fb_par *)info->par; struct fb_var_screeninfo *var = &info->var; - u_long line_length; - u_short vtotal; + unsigned long line_length; + unsigned int vtotal; /* * XXX: It's possible that a user could use a VGA box, change the cable @@ -378,18 +429,18 @@ static int pvr2fb_set_par(struct fb_info par->is_lowres = 1; line_length = get_line_length(var->xres_virtual, var->bits_per_pixel); - par->disp_start = videomemory + (line_length * var->yoffset) * line_length; + par->disp_start = info->fix.smem_start + (line_length * var->yoffset) * line_length; info->fix.line_length = line_length; return 0; } static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) { - u_short vtotal, hsync_total; - u_long line_length; + unsigned int vtotal, hsync_total; + unsigned long line_length; if (var->pixclock != TV_CLK || var->pixclock != VGA_CLK) { - DPRINTK("Invalid pixclock value %d\n", var->pixclock); + pr_debug("Invalid pixclock value %d\n", var->pixclock); return -EINVAL; } @@ -447,21 +498,22 @@ static int pvr2fb_check_var(struct fb_va /* PAL video output */ /* XXX: Should be using a range here ... ? */ if (hsync_total != PAL_HTOTAL) { - DPRINTK("invalid hsync total for PAL\n"); + pr_debug("invalid hsync total for PAL\n"); return -EINVAL; } } else { /* NTSC video output */ if (hsync_total != NTSC_HTOTAL) { - DPRINTK("invalid hsync total for NTSC\n"); + pr_debug("invalid hsync total for NTSC\n"); return -EINVAL; } } } /* Check memory sizes */ line_length = get_line_length(var->xres_virtual, var->bits_per_pixel); - if (line_length * var->yres_virtual > videomemorysize) + if (line_length * var->yres_virtual > info->fix.smem_len) return -ENOMEM; + return 0; } @@ -471,8 +523,8 @@ static void pvr2_update_display(struct f struct fb_var_screeninfo *var = &info->var; /* Update the start address of the display image */ - ctrl_outl(par->disp_start, DISP_DIWADDRL); - ctrl_outl(par->disp_start + + fb_writel(par->disp_start, DISP_DIWADDRL); + fb_writel(par->disp_start + get_line_length(var->xoffset+var->xres, var->bits_per_pixel), DISP_DIWADDRS); } @@ -487,11 +539,11 @@ static void pvr2_init_display(struct fb_ { struct pvr2fb_par *par = (struct pvr2fb_par *) info->par; struct fb_var_screeninfo *var = &info->var; - u_short diw_height, diw_width, diw_modulo = 1; - u_short bytesperpixel = var->bits_per_pixel >> 3; + unsigned int diw_height, diw_width, diw_modulo = 1; + unsigned int bytesperpixel = var->bits_per_pixel >> 3; /* hsync and vsync totals */ - ctrl_outl((par->vsync_total << 16) | par->hsync_total, DISP_SYNCSIZE); + fb_writel((par->vsync_total << 16) | par->hsync_total, DISP_SYNCSIZE); /* column height, modulo, row width */ /* since we're "panning" within vram, we need to offset things based @@ -500,37 +552,37 @@ static void pvr2_init_display(struct fb_ diw_modulo += info->fix.line_length / 4; diw_height = (par->is_interlaced ? var->yres / 2 : var->yres); diw_width = get_line_length(var->xres, var->bits_per_pixel) / 4; - ctrl_outl((diw_modulo << 20) | (--diw_height << 10) | --diw_width, + fb_writel((diw_modulo << 20) | (--diw_height << 10) | --diw_width, DISP_DIWSIZE); /* display address, long and short fields */ - ctrl_outl(par->disp_start, DISP_DIWADDRL); - ctrl_outl(par->disp_start + + fb_writel(par->disp_start, DISP_DIWADDRL); + fb_writel(par->disp_start + get_line_length(var->xoffset+var->xres, var->bits_per_pixel), DISP_DIWADDRS); /* border horizontal, border vertical, border color */ - ctrl_outl((par->borderstart_h << 16) | par->borderstop_h, DISP_BRDRHORZ); - ctrl_outl((par->borderstart_v << 16) | par->borderstop_v, DISP_BRDRVERT); - ctrl_outl(0, DISP_BRDRCOLR); + fb_writel((par->borderstart_h << 16) | par->borderstop_h, DISP_BRDRHORZ); + fb_writel((par->borderstart_v << 16) | par->borderstop_v, DISP_BRDRVERT); + fb_writel(0, DISP_BRDRCOLR); /* display window start position */ - ctrl_outl(par->diwstart_h, DISP_DIWHSTRT); - ctrl_outl((par->diwstart_v << 16) | par->diwstart_v, DISP_DIWVSTRT); + fb_writel(par->diwstart_h, DISP_DIWHSTRT); + fb_writel((par->diwstart_v << 16) | par->diwstart_v, DISP_DIWVSTRT); /* misc. settings */ - ctrl_outl((0x16 << 16) | par->is_lowres, DISP_DIWCONF); + fb_writel((0x16 << 16) | par->is_lowres, DISP_DIWCONF); /* clock doubler (for VGA), scan doubler, display enable */ - ctrl_outl(((video_output == VO_VGA) << 23) | + fb_writel(((video_output == VO_VGA) << 23) | (par->is_doublescan << 1) | 1, DISP_DIWMODE); /* bits per pixel */ - ctrl_outl(ctrl_inl(DISP_DIWMODE) | (--bytesperpixel << 2), DISP_DIWMODE); + fb_writel(fb_readl(DISP_DIWMODE) | (--bytesperpixel << 2), DISP_DIWMODE); /* video enable, color sync, interlace, * hsync and vsync polarity (currently unused) */ - ctrl_outl(0x100 | ((par->is_interlaced /*|4*/) << 4), DISP_SYNCCONF); + fb_writel(0x100 | ((par->is_interlaced /*|4*/) << 4), DISP_SYNCCONF); } /* Simulate blanking by making the border cover the entire screen */ @@ -539,13 +591,14 @@ static void pvr2_init_display(struct fb_ static void pvr2_do_blank(void) { - u_long diwconf; + struct pvr2fb_par *par = currentpar; + unsigned long diwconf; - diwconf = ctrl_inl(DISP_DIWCONF); + diwconf = fb_readl(DISP_DIWCONF); if (do_blank > 0) - ctrl_outl(diwconf | BLANK_BIT, DISP_DIWCONF); + fb_writel(diwconf | BLANK_BIT, DISP_DIWCONF); else - ctrl_outl(diwconf & ~BLANK_BIT, DISP_DIWCONF); + fb_writel(diwconf & ~BLANK_BIT, DISP_DIWCONF); is_blanked = do_blank > 0 ? do_blank : 0; } @@ -581,76 +634,132 @@ static irqreturn_t pvr2fb_interrupt(int static int pvr2_init_cable(void) { if (cable_type < 0) { - ctrl_outl((ctrl_inl(PCTRA) & 0xfff0ffff) | 0x000a0000, + fb_writel((fb_readl(PCTRA) & 0xfff0ffff) | 0x000a0000, PCTRA); - cable_type = (ctrl_inw(PDTRA) >> 8) & 3; + cable_type = (fb_readw(PDTRA) >> 8) & 3; } /* Now select the output format (either composite or other) */ /* XXX: Save the previous val first, as this reg is also AICA related */ if (cable_type == CT_COMPOSITE) - ctrl_outl(3 << 8, VOUTC); + fb_writel(3 << 8, VOUTC); else - ctrl_outl(0, VOUTC); + fb_writel(0, VOUTC); return cable_type; } -int __init pvr2fb_init(void) +#ifdef CONFIG_SH_DMA +static ssize_t pvr2fb_write(struct file *file, const char *buf, + size_t count, loff_t *ppos) { - u_long modememused; - int err = -EINVAL; + unsigned long dst, start, end, len; + unsigned int nr_pages; + struct page **pages; + int ret, i; - if (!mach_is_dreamcast()) - return -ENXIO; + nr_pages = (count + PAGE_SIZE - 1) >> PAGE_SHIFT; - fb_info = kmalloc(sizeof(struct fb_info) + sizeof(struct pvr2fb_par) + - sizeof(u32) * 16, GFP_KERNEL); - - if (!fb_info) { - printk(KERN_ERR "Failed to allocate memory for fb_info\n"); + pages = kmalloc(nr_pages * sizeof(struct page *), GFP_KERNEL); + if (!pages) return -ENOMEM; + + down_read(¤t->mm->mmap_sem); + ret = get_user_pages(current, current->mm, (unsigned long)buf, + nr_pages, WRITE, 0, pages, NULL); + up_read(¤t->mm->mmap_sem); + + if (ret < nr_pages) { + nr_pages = ret; + ret = -EINVAL; + goto out_unmap; } - memset(fb_info, 0, sizeof(fb_info) + sizeof(struct pvr2fb_par) + sizeof(u32) * 16); + dma_configure_channel(shdma, 0x12c1); + + dst = (unsigned long)fb_info->screen_base + *ppos; + start = (unsigned long)page_address(pages[0]); + end = (unsigned long)page_address(pages[nr_pages]); + len = nr_pages << PAGE_SHIFT; + + /* Half-assed contig check */ + if (start + len == end) { + /* As we do this in one shot, it's either all or nothing.. */ + if ((*ppos + len) > fb_info->fix.smem_len) { + ret = -ENOSPC; + goto out_unmap; + } - currentpar = (struct pvr2fb_par *)(fb_info + 1); + dma_write(shdma, start, 0, len); + dma_write(pvr2dma, 0, dst, len); + dma_wait_for_completion(pvr2dma); - /* Make a guess at the monitor based on the attached cable */ - if (pvr2_init_cable() == CT_VGA) { - fb_info->monspecs.hfmin = 30000; - fb_info->monspecs.hfmax = 70000; - fb_info->monspecs.vfmin = 60; - fb_info->monspecs.vfmax = 60; - } else { - /* Not VGA, using a TV (taken from acornfb) */ - fb_info->monspecs.hfmin = 15469; - fb_info->monspecs.hfmax = 15781; - fb_info->monspecs.vfmin = 49; - fb_info->monspecs.vfmax = 51; + goto out; } - /* - * XXX: This needs to pull default video output via BIOS or other means - */ - if (video_output < 0) { - if (cable_type == CT_VGA) { - video_output = VO_VGA; - } else { - video_output = VO_NTSC; + /* Not contiguous, writeout per-page instead.. */ + for (i = 0; i < nr_pages; i++, dst += PAGE_SIZE) { + if ((*ppos + (i << PAGE_SHIFT)) > fb_info->fix.smem_len) { + ret = -ENOSPC; + goto out_unmap; } + + dma_write_page(shdma, (unsigned long)page_address(pages[i]), 0); + dma_write_page(pvr2dma, 0, dst); + dma_wait_for_completion(pvr2dma); } - - pvr2_fix.smem_start = videomemory; - pvr2_fix.smem_len = videomemorysize; + +out: + *ppos += count; + ret = count; + +out_unmap: + for (i = 0; i < nr_pages; i++) + page_cache_release(pages[i]); + + kfree(pages); + + return ret; +} +#endif /* CONFIG_SH_DMA */ + +/** + * pvr2fb_common_init + * + * Common init code for the PVR2 chips. + * + * This mostly takes care of the common aspects of the fb setup and + * registration. It's expected that the board-specific init code has + * already setup pvr2_fix with something meaningful at this point. + * + * Device info reporting is also done here, as well as picking a sane + * default from the modedb. For board-specific modelines, simply define + * a per-board modedb. + * + * Also worth noting is that the cable and video output types are likely + * always going to be VGA for the PCI-based PVR2 boards, but we leave this + * in for flexibility anyways. Who knows, maybe someone has tv-out on a + * PCI-based version of these things ;-) + */ +static int __init pvr2fb_common_init(void) +{ + struct pvr2fb_par *par = currentpar; + unsigned long modememused, rev; + int size; fb_info->screen_base = ioremap_nocache(pvr2_fix.smem_start, pvr2_fix.smem_len); if (!fb_info->screen_base) { - printk("Failed to remap MMIO space\n"); - err = -ENXIO; + printk(KERN_ERR "pvr2fb: Failed to remap smem space\n"); + goto out_err; + } + + par->mmio_base = (unsigned long)ioremap_nocache(pvr2_fix.mmio_start, + pvr2_fix.mmio_len); + if (!par->mmio_base) { + printk(KERN_ERR "pvr2fb: Failed to remap mmio space\n"); goto out_err; } @@ -675,22 +784,21 @@ int __init pvr2fb_init(void) NUM_TOTAL_MODES, &pvr2_modedb[defmode], 16)) fb_info->var = pvr2_var; - if (request_irq(HW_EVENT_VSYNC, pvr2fb_interrupt, 0, - "pvr2 VBL handler", fb_info)) { - err = -EBUSY; - goto out_err; - } + size = (fb_info->var.bits_per_pixel == 8) ? 256 : 16; + fb_alloc_cmap(&fb_info->cmap, size, 0); if (register_framebuffer(fb_info) < 0) - goto reg_failed; + goto out_err; modememused = get_line_length(fb_info->var.xres_virtual, fb_info->var.bits_per_pixel); modememused *= fb_info->var.yres_virtual; - printk("fb%d: %s frame buffer device, using %ldk/%ldk of video memory\n", - fb_info->node, fb_info->fix.id, modememused>>10, - videomemorysize>>10); + rev = fb_readl(par->mmio_base + 0x04); + + printk("fb%d: %s (rev %ld.%ld) frame buffer device, using %ldk/%ldk of video memory\n", + fb_info->node, fb_info->fix.id, (rev >> 4) & 0x0f, rev & 0x0f, + modememused >> 10, (unsigned long)(fb_info->fix.smem_len >> 10)); printk("fb%d: Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n", fb_info->node, fb_info->var.xres, fb_info->var.yres, fb_info->var.bits_per_pixel, @@ -698,23 +806,152 @@ int __init pvr2fb_init(void) (char *)pvr2_get_param(cables, NULL, cable_type, 3), (char *)pvr2_get_param(outputs, NULL, video_output, 3)); +#ifdef CONFIG_SH_STORE_QUEUES + printk(KERN_NOTICE "fb%d: registering with SQ API\n", fb_info->node); + + pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len, + fb_info->fix.id); + + printk(KERN_NOTICE "fb%d: Mapped video memory to SQ addr 0x%lx\n", + fb_info->node, pvr2fb_map->sq_addr); +#endif + return 0; -reg_failed: - free_irq(HW_EVENT_VSYNC, 0); out_err: - kfree(fb_info); + if (fb_info->screen_base) + iounmap(fb_info->screen_base); + if (par->mmio_base) + iounmap((void *)par->mmio_base); - return err; + return -ENXIO; } -static void __exit pvr2fb_exit(void) +#ifdef CONFIG_SH_DREAMCAST +static int __init pvr2fb_dc_init(void) +{ + if (!mach_is_dreamcast()) + return -ENXIO; + + /* Make a guess at the monitor based on the attached cable */ + if (pvr2_init_cable() == CT_VGA) { + fb_info->monspecs.hfmin = 30000; + fb_info->monspecs.hfmax = 70000; + fb_info->monspecs.vfmin = 60; + fb_info->monspecs.vfmax = 60; + } else { + /* Not VGA, using a TV (taken from acornfb) */ + fb_info->monspecs.hfmin = 15469; + fb_info->monspecs.hfmax = 15781; + fb_info->monspecs.vfmin = 49; + fb_info->monspecs.vfmax = 51; + } + + /* + * XXX: This needs to pull default video output via BIOS or other means + */ + if (video_output < 0) { + if (cable_type == CT_VGA) { + video_output = VO_VGA; + } else { + video_output = VO_NTSC; + } + } + + /* + * Nothing exciting about the DC PVR2 .. only a measly 8MiB. + */ + pvr2_fix.smem_start = 0xa5000000; /* RAM starts here */ + pvr2_fix.smem_len = 8 << 20; + + pvr2_fix.mmio_start = 0xa05f8000; /* registers start here */ + pvr2_fix.mmio_len = 0x2000; + + if (request_irq(HW_EVENT_VSYNC, pvr2fb_interrupt, 0, + "pvr2 VBL handler", fb_info)) { + return -EBUSY; + } + +#ifdef CONFIG_SH_DMA + if (request_dma(pvr2dma, "pvr2") != 0) { + free_irq(HW_EVENT_VSYNC, 0); + return -EBUSY; + } +#endif + + return pvr2fb_common_init(); +} + +static void pvr2fb_dc_exit(void) { - unregister_framebuffer(fb_info); free_irq(HW_EVENT_VSYNC, 0); - kfree(fb_info); +#ifdef CONFIG_SH_DMA + free_dma(pvr2dma); +#endif +} +#endif /* CONFIG_SH_DREAMCAST */ + +#ifdef CONFIG_PCI +static int __devinit pvr2fb_pci_probe(struct pci_dev *pdev, + const struct pci_device_id *ent) +{ + int ret; + + ret = pci_enable_device(pdev); + if (ret) { + printk(KERN_ERR "pvr2fb: PCI enable failed\n"); + return ret; + } + + ret = pci_request_regions(pdev, "pvr2fb"); + if (ret) { + printk(KERN_ERR "pvr2fb: PCI request regions failed\n"); + return ret; + } + + /* + * Slightly more exciting than the DC PVR2 .. 16MiB! + */ + pvr2_fix.smem_start = pci_resource_start(pdev, 0); + pvr2_fix.smem_len = pci_resource_len(pdev, 0); + + pvr2_fix.mmio_start = pci_resource_start(pdev, 1); + pvr2_fix.mmio_len = pci_resource_len(pdev, 1); + + return pvr2fb_common_init(); +} + +static void __devexit pvr2fb_pci_remove(struct pci_dev *pdev) +{ + pci_release_regions(pdev); +} + +static struct pci_device_id pvr2fb_pci_tbl[] __devinitdata = { + { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NEON250, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, + { 0, }, +}; + +MODULE_DEVICE_TABLE(pci, pvr2fb_pci_tbl); + +static struct pci_driver pvr2fb_pci_driver = { + .name = "pvr2fb", + .id_table = pvr2fb_pci_tbl, + .probe = pvr2fb_pci_probe, + .remove = __devexit_p(pvr2fb_pci_remove), +}; + +static int __init pvr2fb_pci_init(void) +{ + return pci_module_init(&pvr2fb_pci_driver); } +static void pvr2fb_pci_exit(void) +{ + pci_unregister_driver(&pvr2fb_pci_driver); +} +#endif /* CONFIG_PCI */ + static int __init pvr2_get_param(const struct pvr2_params *p, const char *s, int val, int size) { @@ -735,7 +972,6 @@ static int __init pvr2_get_param(const s /* * Parse command arguments. Supported arguments are: * inverse Use inverse color maps - * nomtrr Disable MTRR usage * cable:composite|rgb|vga Override the video cable type * output:NTSC|PAL|VGA Override the video output format * @@ -757,7 +993,6 @@ int __init pvr2fb_setup(char *options) if (!*this_opt) continue; if (!strcmp(this_opt, "inverse")) { - pvr2fb_inverse = 1; fb_invert_cmaps(); } else if (!strncmp(this_opt, "cable:", 6)) { strcpy(cable_arg, this_opt + 6); @@ -781,9 +1016,82 @@ int __init pvr2fb_setup(char *options) } #endif +static struct pvr2_board { + int (*init)(void); + void (*exit)(void); + char name[16]; +} board_list[] = { +#ifdef CONFIG_SH_DREAMCAST + { pvr2fb_dc_init, pvr2fb_dc_exit, "Sega DC PVR2" }, +#endif +#ifdef CONFIG_PCI + { pvr2fb_pci_init, pvr2fb_pci_exit, "PCI PVR2" }, +#endif + { 0, }, +}; + +int __init pvr2fb_init(void) +{ + int i, ret = -ENODEV; + int size; + + size = sizeof(struct fb_info) + sizeof(struct pvr2fb_par) + 16 * sizeof(u32); + + fb_info = kmalloc(size, GFP_KERNEL); + + if (!fb_info) { + printk(KERN_ERR "Failed to allocate memory for fb_info\n"); + return -ENOMEM; + } + + memset(fb_info, 0, size); + + currentpar = (struct pvr2fb_par *)(fb_info + 1); + + for (i = 0; i < ARRAY_SIZE(board_list); i++) { + struct pvr2_board *pvr_board = board_list + i; + + if (!pvr_board->init) + continue; + + ret = pvr_board->init(); + + if (ret != 0) { + printk(KERN_ERR "pvr2fb: Failed init of %s device\n", + pvr_board->name); + kfree(fb_info); + break; + } + } + + return ret; +} + +static void __exit pvr2fb_exit(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(board_list); i++) { + struct pvr2_board *pvr_board = board_list + i; + + if (pvr_board->exit) + pvr_board->exit(); + } + +#ifdef CONFIG_SH_STORE_QUEUES + sq_unmap(pvr2fb_map); +#endif + + unregister_framebuffer(fb_info); + kfree(fb_info); +} + #ifdef MODULE -MODULE_LICENSE("GPL"); module_init(pvr2fb_init); #endif module_exit(pvr2fb_exit); +MODULE_AUTHOR("Paul Mundt , M. R. Brown "); +MODULE_DESCRIPTION("Framebuffer driver for NEC PowerVR 2 based graphics boards"); +MODULE_LICENSE("GPL"); + diff -puN -L include/asm-sh/bigsur.h include/asm-sh/bigsur.h~sh-merge /dev/null --- 25/include/asm-sh/bigsur.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,80 +0,0 @@ -/* - * - * Hitachi Big Sur Eval Board support - * - * Dustin McIntire (dustin@sensoria.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Derived from Hitachi SH7751 reference manual - * - */ - -#ifndef _ASM_BIGSUR_H_ -#define _ASM_BIGSUR_H_ - -#include -#include - -/* 7751 Internal IRQ's used by external CPLD controller */ -#define BIGSUR_IRQ_LOW 0 -#define BIGSUR_IRQ_NUM 14 /* External CPLD level 1 IRQs */ -#define BIGSUR_IRQ_HIGH (BIGSUR_IRQ_LOW + BIGSUR_IRQ_NUM) -#define BIGSUR_2NDLVL_IRQ_LOW (HD64465_IRQ_BASE+HD64465_IRQ_NUM) -#define BIGSUR_2NDLVL_IRQ_NUM 32 /* Level 2 IRQs = 4 regs * 8 bits */ -#define BIGSUR_2NDLVL_IRQ_HIGH (BIGSUR_2NDLVL_IRQ_LOW + \ - BIGSUR_2NDLVL_IRQ_NUM) - -/* PCI interrupt base number (A_INTA-A_INTD) */ -#define BIGSUR_SH7751_PCI_IRQ_BASE (BIGSUR_2NDLVL_IRQ_LOW+10) - -/* CPLD registers and external chip addresses */ -#define BIGSUR_HD64464_ADDR 0xB2000000 -#define BIGSUR_DGDR 0xB1FFFE00 -#define BIGSUR_BIDR 0xB1FFFD00 -#define BIGSUR_CSLR 0xB1FFFC00 -#define BIGSUR_SW1R 0xB1FFFB00 -#define BIGSUR_DBGR 0xB1FFFA00 -#define BIGSUR_BDTR 0xB1FFF900 -#define BIGSUR_BDRR 0xB1FFF800 -#define BIGSUR_PPR1 0xB1FFF700 -#define BIGSUR_PPR2 0xB1FFF600 -#define BIGSUR_IDE2 0xB1FFF500 -#define BIGSUR_IDE3 0xB1FFF400 -#define BIGSUR_SPCR 0xB1FFF300 -#define BIGSUR_ETHR 0xB1FE0000 -#define BIGSUR_PPDR 0xB1FDFF00 -#define BIGSUR_ICTL 0xB1FDFE00 -#define BIGSUR_ICMD 0xB1FDFD00 -#define BIGSUR_DMA0 0xB1FDFC00 -#define BIGSUR_DMA1 0xB1FDFB00 -#define BIGSUR_IRQ0 0xB1FDFA00 -#define BIGSUR_IRQ1 0xB1FDF900 -#define BIGSUR_IRQ2 0xB1FDF800 -#define BIGSUR_IRQ3 0xB1FDF700 -#define BIGSUR_IMR0 0xB1FDF600 -#define BIGSUR_IMR1 0xB1FDF500 -#define BIGSUR_IMR2 0xB1FDF400 -#define BIGSUR_IMR3 0xB1FDF300 -#define BIGSUR_IRLMR0 0xB1FDF200 -#define BIGSUR_IRLMR1 0xB1FDF100 -#define BIGSUR_V320USC_ADDR 0xB1000000 -#define BIGSUR_HD64465_ADDR 0xB0000000 -#define BIGSUR_INTERNAL_BASE 0xB0000000 - -/* SMC ethernet card parameters */ -#define BIGSUR_ETHER_IOPORT 0x220 - -/* IDE register paramters */ -#define BIGSUR_IDECMD_IOPORT 0x1f0 -#define BIGSUR_IDECTL_IOPORT 0x1f8 - -/* LED bit position in BIGSUR_CSLR */ -#define BIGSUR_LED (1<<4) - -/* PCI: default LOCAL memory window sizes (seen from PCI bus) */ -#define BIGSUR_LSR0_SIZE (64*(1<<20)) //64MB -#define BIGSUR_LSR1_SIZE (64*(1<<20)) //64MB - -#endif /* _ASM_BIGSUR_H_ */ diff -puN include/asm-sh/bigsur/io.h~sh-merge include/asm-sh/bigsur/io.h --- 25/include/asm-sh/bigsur/io.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/bigsur/io.h 2004-01-09 21:32:27.000000000 -0800 @@ -18,28 +18,9 @@ #define _ASM_SH_IO_BIGSUR_H #include -#include -extern unsigned char bigsur_inb(unsigned long port); -extern unsigned short bigsur_inw(unsigned long port); -extern unsigned int bigsur_inl(unsigned long port); - -extern void bigsur_outb(unsigned char value, unsigned long port); -extern void bigsur_outw(unsigned short value, unsigned long port); -extern void bigsur_outl(unsigned int value, unsigned long port); - -extern unsigned char bigsur_inb_p(unsigned long port); -extern void bigsur_outb_p(unsigned char value, unsigned long port); - -extern void bigsur_insb(unsigned long port, void *addr, unsigned long count); -extern void bigsur_insw(unsigned long port, void *addr, unsigned long count); -extern void bigsur_insl(unsigned long port, void *addr, unsigned long count); -extern void bigsur_outsb(unsigned long port, const void *addr, unsigned long count); -extern void bigsur_outsw(unsigned long port, const void *addr, unsigned long count); -extern void bigsur_outsl(unsigned long port, const void *addr, unsigned long count); extern unsigned long bigsur_isa_port2addr(unsigned long offset); extern int bigsur_irq_demux(int irq); -extern void bigsur_init_pci(void); /* Provision for generic secondary demux step -- used by PCMCIA code */ extern void bigsur_register_irq_demux(int irq, int (*demux)(int irq, void *dev), void *dev); @@ -52,38 +33,3 @@ extern void bigsur_port_unmap(u32 basepo #endif /* _ASM_SH_IO_BIGSUR_H */ -#ifdef __WANT_IO_DEF - -# define __inb bigsur_inb -# define __inw bigsur_inw -# define __inl bigsur_inl -# define __outb bigsur_outb -# define __outw bigsur_outw -# define __outl bigsur_outl - -# define __inb_p bigsur_inb_p -# define __inw_p bigsur_inw -# define __inl_p bigsur_inl -# define __outb_p bigsur_outb_p -# define __outw_p bigsur_outw -# define __outl_p bigsur_outl - -# define __insb bigsur_insb -# define __insw bigsur_insw -# define __insl bigsur_insl -# define __outsb bigsur_outsb -# define __outsw bigsur_outsw -# define __outsl bigsur_outsl - -# define __readb generic_readb -# define __readw generic_readw -# define __readl generic_readl -# define __writeb generic_writeb -# define __writew generic_writew -# define __writel generic_writel - -# define __isa_port2addr bigsur_isa_port2addr -# define __ioremap generic_ioremap -# define __iounmap generic_iounmap - -#endif diff -puN include/asm-sh/cache.h~sh-merge include/asm-sh/cache.h --- 25/include/asm-sh/cache.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/cache.h 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: cache.h,v 1.4 2003/05/06 23:28:50 lethal Exp $ +/* $Id: cache.h,v 1.5 2003/07/16 04:08:29 lethal Exp $ * * include/asm-sh/cache.h * @@ -16,7 +16,8 @@ #define SH_CACHE_COMBINED 4 #define SH_CACHE_ASSOC 8 -#define SMP_CACHE_BYTES L1_CACHE_BYTES +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) +#define SMP_CACHE_BYTES L1_CACHE_BYTES #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) @@ -28,7 +29,7 @@ __section__(".data.cacheline_aligned"))) #endif -#define L1_CACHE_SHIFT_MAX 5 /* largest L1 which this arch supports */ +#define L1_CACHE_SHIFT_MAX 5 /* largest L1 which this arch supports */ struct cache_info { unsigned int ways; diff -puN include/asm-sh/cat68701/io.h~sh-merge include/asm-sh/cat68701/io.h --- 25/include/asm-sh/cat68701/io.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/cat68701/io.h 2004-01-09 21:32:27.000000000 -0800 @@ -13,77 +13,10 @@ #ifndef _ASM_SH_IO_CAT68701_H #define _ASM_SH_IO_CAT68701_H -#include - -extern unsigned char cat68701_inb(unsigned long port); -extern unsigned short cat68701_inw(unsigned long port); -extern unsigned int cat68701_inl(unsigned long port); - -extern void cat68701_outb(unsigned char value, unsigned long port); -extern void cat68701_outw(unsigned short value, unsigned long port); -extern void cat68701_outl(unsigned int value, unsigned long port); - -extern unsigned char cat68701_inb_p(unsigned long port); -extern void cat68701_outb_p(unsigned char value, unsigned long port); - -extern void cat68701_insb(unsigned long port, void *addr, unsigned long count); -extern void cat68701_insw(unsigned long port, void *addr, unsigned long count); -extern void cat68701_insl(unsigned long port, void *addr, unsigned long count); -extern void cat68701_outsb(unsigned long port, const void *addr, unsigned long count); -extern void cat68701_outsw(unsigned long port, const void *addr, unsigned long count); -extern void cat68701_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char cat68701_readb(unsigned long addr); -extern unsigned short cat68701_readw(unsigned long addr); -extern unsigned int cat68701_readl(unsigned long addr); -extern void cat68701_writeb(unsigned char b, unsigned long addr); -extern void cat68701_writew(unsigned short b, unsigned long addr); -extern void cat68701_writel(unsigned int b, unsigned long addr); - -extern void * cat68701_ioremap(unsigned long offset, unsigned long size); -extern void cat68701_iounmap(void *addr); - extern unsigned long cat68701_isa_port2addr(unsigned long offset); extern int cat68701_irq_demux(int irq); -extern void setup_cat68701(void); extern void init_cat68701_IRQ(void); extern void heartbeat_cat68701(void); -#ifdef __WANT_IO_DEF - -# define __inb cat68701_inb -# define __inw cat68701_inw -# define __inl cat68701_inl -# define __outb cat68701_outb -# define __outw cat68701_outw -# define __outl cat68701_outl - -# define __inb_p cat68701_inb_p -# define __inw_p cat68701_inw -# define __inl_p cat68701_inl -# define __outb_p cat68701_outb_p -# define __outw_p cat68701_outw -# define __outl_p cat68701_outl - -# define __insb cat68701_insb -# define __insw cat68701_insw -# define __insl cat68701_insl -# define __outsb cat68701_outsb -# define __outsw cat68701_outsw -# define __outsl cat68701_outsl - -# define __readb cat68701_readb -# define __readw cat68701_readw -# define __readl cat68701_readl -# define __writeb cat68701_writeb -# define __writew cat68701_writew -# define __writel cat68701_writel - -# define __isa_port2addr cat68701_isa_port2addr -# define __ioremap generic_ioremap -# define __iounmap generic_iounmap - -#endif - #endif /* _ASM_SH_IO_CAT68701_H */ diff -puN /dev/null include/asm-sh/cpu-sh2/addrspace.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/cpu-sh2/addrspace.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,16 @@ +/* + * Definitions for the address spaces of the SH-2 CPUs. + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH2_ADDRSPACE_H +#define __ASM_CPU_SH2_ADDRSPACE_H + +/* Should fill here */ + +#endif /* __ASM_CPU_SH2_ADDRSPACE_H */ + diff -puN include/asm-sh/cpu-sh2/cache.h~sh-merge include/asm-sh/cpu-sh2/cache.h --- 25/include/asm-sh/cpu-sh2/cache.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/cpu-sh2/cache.h 2004-01-09 21:32:27.000000000 -0800 @@ -10,7 +10,7 @@ #ifndef __ASM_CPU_SH2_CACHE_H #define __ASM_CPU_SH2_CACHE_H -#define L1_CACHE_BYTES 16 +#define L1_CACHE_SHIFT 4 #define CCR 0xfffffe92 /* Address of Cache Control Register */ diff -puN /dev/null include/asm-sh/cpu-sh2/dma.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/cpu-sh2/dma.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,23 @@ +/* + * Definitions for the SH-2 DMAC. + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH2_DMA_H +#define __ASM_CPU_SH2_DMA_H + +#define SH_MAX_DMA_CHANNELS 2 + +#define SAR ((unsigned long[]){ 0xffffff80, 0xffffff90 }) +#define DAR ((unsigned long[]){ 0xffffff84, 0xffffff94 }) +#define DMATCR ((unsigned long[]){ 0xffffff88, 0xffffff98 }) +#define CHCR ((unsigned long[]){ 0xfffffffc, 0xffffff9c }) + +#define DMAOR 0xffffffb0 + +#endif /* __ASM_CPU_SH2_DMA_H */ + diff -puN /dev/null include/asm-sh/cpu-sh2/shmparam.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/cpu-sh2/shmparam.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,16 @@ +/* + * include/asm-sh/cpu-sh2/shmparam.h + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH2_SHMPARAM_H +#define __ASM_CPU_SH2_SHMPARAM_H + +#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ + +#endif /* __ASM_CPU_SH2_SHMPARAM_H */ + diff -puN /dev/null include/asm-sh/cpu-sh2/sigcontext.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/cpu-sh2/sigcontext.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,17 @@ +#ifndef __ASM_CPU_SH2_SIGCONTEXT_H +#define __ASM_CPU_SH2_SIGCONTEXT_H + +struct sigcontext { + unsigned long oldmask; + + /* CPU registers */ + unsigned long sc_regs[16]; + unsigned long sc_pc; + unsigned long sc_pr; + unsigned long sc_sr; + unsigned long sc_gbr; + unsigned long sc_mach; + unsigned long sc_macl; +}; + +#endif /* __ASM_CPU_SH2_SIGCONTEXT_H */ diff -puN /dev/null include/asm-sh/cpu-sh2/ubc.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/cpu-sh2/ubc.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,32 @@ +/* + * include/asm-sh/cpu-sh2/ubc.h + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH2_UBC_H +#define __ASM_CPU_SH2_UBC_H + +#define UBC_BARA 0xffffff40 +#define UBC_BAMRA 0xffffff44 +#define UBC_BBRA 0xffffff48 +#define UBC_BARB 0xffffff60 +#define UBC_BAMRB 0xffffff64 +#define UBC_BBRB 0xffffff68 +#define UBC_BDRB 0xffffff70 +#define UBC_BDMRB 0xffffff74 +#define UBC_BRCR 0xffffff78 + +/* + * We don't have any ASID changes to make in the UBC on the SH-2. + * + * Make these purposely invalid to track misuse. + */ +#define UBC_BASRA 0x00000000 +#define UBC_BASRB 0x00000000 + +#endif /* __ASM_CPU_SH2_UBC_H */ + diff -puN include/asm-sh/cpu-sh3/cache.h~sh-merge include/asm-sh/cpu-sh3/cache.h --- 25/include/asm-sh/cpu-sh3/cache.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/cpu-sh3/cache.h 2004-01-09 21:32:27.000000000 -0800 @@ -10,7 +10,7 @@ #ifndef __ASM_CPU_SH3_CACHE_H #define __ASM_CPU_SH3_CACHE_H -#define L1_CACHE_BYTES 16 +#define L1_CACHE_SHIFT 4 #define CCR 0xffffffec /* Address of Cache Control Register */ diff -puN include/asm-sh/cpu-sh3/dma.h~sh-merge include/asm-sh/cpu-sh3/dma.h --- 25/include/asm-sh/cpu-sh3/dma.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/cpu-sh3/dma.h 2004-01-09 21:32:27.000000000 -0800 @@ -1,11 +1,7 @@ #ifndef __ASM_CPU_SH3_DMA_H #define __ASM_CPU_SH3_DMA_H -#define SAR ((unsigned long[]){0xa4000020,0xa4000030,0xa4000040,0xa4000050}) -#define DAR ((unsigned long[]){0xa4000024,0xa4000034,0xa4000044,0xa4000054}) -#define DMATCR ((unsigned long[]){0xa4000028,0xa4000038,0xa4000048,0xa4000058}) -#define CHCR ((unsigned long[]){0xa400002c,0xa400003c,0xa400004c,0xa400005c}) -#define DMAOR 0xa4000060UL +#define SH_DMAC_BASE 0xa4000020 #endif /* __ASM_CPU_SH3_DMA_H */ diff -puN include/asm-sh/cpu-sh3/mmu_context.h~sh-merge include/asm-sh/cpu-sh3/mmu_context.h --- 25/include/asm-sh/cpu-sh3/mmu_context.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/cpu-sh3/mmu_context.h 2004-01-09 21:32:27.000000000 -0800 @@ -21,6 +21,7 @@ #define MMU_PAGE_ASSOC_BIT 0x80 #define MMU_NTLB_ENTRIES 128 /* for 7708 */ +#define MMU_NTLB_WAYS 4 #define MMU_CONTROL_INIT 0x007 /* SV=0, TF=1, IX=1, AT=1 */ #endif /* __ASM_CPU_SH3_MMU_CONTEXT_H */ diff -puN /dev/null include/asm-sh/cpu-sh3/sigcontext.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/cpu-sh3/sigcontext.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,17 @@ +#ifndef __ASM_CPU_SH3_SIGCONTEXT_H +#define __ASM_CPU_SH3_SIGCONTEXT_H + +struct sigcontext { + unsigned long oldmask; + + /* CPU registers */ + unsigned long sc_regs[16]; + unsigned long sc_pc; + unsigned long sc_pr; + unsigned long sc_sr; + unsigned long sc_gbr; + unsigned long sc_mach; + unsigned long sc_macl; +}; + +#endif /* __ASM_CPU_SH3_SIGCONTEXT_H */ diff -puN include/asm-sh/cpu-sh4/cache.h~sh-merge include/asm-sh/cpu-sh4/cache.h --- 25/include/asm-sh/cpu-sh4/cache.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/cpu-sh4/cache.h 2004-01-09 21:32:27.000000000 -0800 @@ -10,7 +10,7 @@ #ifndef __ASM_CPU_SH4_CACHE_H #define __ASM_CPU_SH4_CACHE_H -#define L1_CACHE_BYTES 32 +#define L1_CACHE_SHIFT 5 #define CCR 0xff00001c /* Address of Cache Control Register */ #define CCR_CACHE_OCE 0x0001 /* Operand Cache Enable */ diff -puN include/asm-sh/cpu-sh4/dma.h~sh-merge include/asm-sh/cpu-sh4/dma.h --- 25/include/asm-sh/cpu-sh4/dma.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/cpu-sh4/dma.h 2004-01-09 21:32:27.000000000 -0800 @@ -1,11 +1,7 @@ #ifndef __ASM_CPU_SH4_DMA_H #define __ASM_CPU_SH4_DMA_H -#define SAR ((unsigned long[]){0xbfa00000,0xbfa00010,0xbfa00020,0xbfa00030}) -#define DAR ((unsigned long[]){0xbfa00004,0xbfa00014,0xbfa00024,0xbfa00034}) -#define DMATCR ((unsigned long[]){0xbfa00008,0xbfa00018,0xbfa00028,0xbfa00038}) -#define CHCR ((unsigned long[]){0xbfa0000c,0xbfa0001c,0xbfa0002c,0xbfa0003c}) -#define DMAOR 0xbfa00040UL +#define SH_DMAC_BASE 0xbfa00000 #endif /* __ASM_CPU_SH4_DMA_H */ diff -puN /dev/null include/asm-sh/cpu-sh4/sigcontext.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/cpu-sh4/sigcontext.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,24 @@ +#ifndef __ASM_CPU_SH4_SIGCONTEXT_H +#define __ASM_CPU_SH4_SIGCONTEXT_H + +struct sigcontext { + unsigned long oldmask; + + /* CPU registers */ + unsigned long sc_regs[16]; + unsigned long sc_pc; + unsigned long sc_pr; + unsigned long sc_sr; + unsigned long sc_gbr; + unsigned long sc_mach; + unsigned long sc_macl; + + /* FPU registers */ + unsigned long sc_fpregs[16]; + unsigned long sc_xfpregs[16]; + unsigned int sc_fpscr; + unsigned int sc_fpul; + unsigned int sc_ownedfp; +}; + +#endif /* __ASM_CPU_SH4_SIGCONTEXT_H */ diff -puN /dev/null include/asm-sh/cpu-sh4/sq.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/cpu-sh4/sq.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,48 @@ +/* + * include/asm-sh/cpu-sh4/sq.h + * + * Copyright (C) 2001, 2002, 2003 Paul Mundt + * Copyright (C) 2001, 2002 M. R. Brown + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH4_SQ_H +#define __ASM_CPU_SH4_SQ_H + +#include + +/* + * Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be + * mapped to any physical address space. Since data is written (and aligned) + * to 32-byte boundaries, we need to be sure that all allocations are aligned. + */ +#define SQ_SIZE 32 +#define SQ_ALIGN_MASK (~(SQ_SIZE - 1)) +#define SQ_ALIGN(addr) (((addr)+SQ_SIZE-1) & SQ_ALIGN_MASK) + +#define SQ_QACR0 (P4SEG_REG_BASE + 0x38) +#define SQ_QACR1 (P4SEG_REG_BASE + 0x3c) +#define SQ_ADDRMAX (P4SEG_STORE_QUE + 0x04000000) + +struct sq_mapping { + const char *name; + + unsigned long sq_addr; + unsigned long addr; + unsigned int size; + + struct list_head list; +}; + +/* arch/sh/kernel/cpu/sh4/sq.c */ +extern struct sq_mapping *sq_remap(unsigned long phys, unsigned int size, const char *name); +extern void sq_unmap(struct sq_mapping *map); + +extern void sq_clear(unsigned long addr, unsigned int len); +extern void sq_flush(void *addr); +extern void sq_flush_range(unsigned long start, unsigned int len); + +#endif /* __ASM_CPU_SH4_SQ_H */ + diff -puN -L include/asm-sh/dc_sysasic.h include/asm-sh/dc_sysasic.h~sh-merge /dev/null --- 25/include/asm-sh/dc_sysasic.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,35 +0,0 @@ -/* include/asm-sh/dc_sysasic.h - * - * Definitions for the Dreamcast System ASIC and related peripherals. - * - * Copyright (c) 2001 M. R. Brown - * - * This file is part of the LinuxDC project (www.linuxdc.org) - * - * Released under the terms of the GNU GPL v2.0. - * - */ - -#include - -/* Hardware events - - - Each of these events correspond to a bit within the Event Mask Registers/ - Event Status Registers. Because of the virtual IRQ numbering scheme, a - base offset must be used when calculating the virtual IRQ that each event - takes. -*/ - -#define HW_EVENT_IRQ_BASE OFFCHIP_IRQ_BASE /* 48 */ - -/* IRQ 13 */ -#define HW_EVENT_VSYNC (HW_EVENT_IRQ_BASE + 5) /* VSync */ -#define HW_EVENT_MAPLE_DMA (HW_EVENT_IRQ_BASE + 12) /* Maple DMA complete */ -#define HW_EVENT_GDROM_DMA (HW_EVENT_IRQ_BASE + 14) /* GD-ROM DMA complete */ - -/* IRQ 11 */ -#define HW_EVENT_GDROM_CMD (HW_EVENT_IRQ_BASE + 32) /* GD-ROM cmd. complete */ -#define HW_EVENT_AICA_SYS (HW_EVENT_IRQ_BASE + 33) /* AICA-related */ -#define HW_EVENT_EXTERNAL (HW_EVENT_IRQ_BASE + 35) /* Ext. (expansion) */ - -#define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95) diff -puN include/asm-sh/dma.h~sh-merge include/asm-sh/dma.h --- 25/include/asm-sh/dma.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/dma.h 2004-01-09 21:32:27.000000000 -0800 @@ -1,80 +1,98 @@ +/* + * include/asm-sh/dma.h + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ #ifndef __ASM_SH_DMA_H #define __ASM_SH_DMA_H -#ifdef CONFIG_SH_MPC1211 -#include -#else - #include +#include #include -#include /* need byte IO */ - -#define MAX_DMA_CHANNELS 8 -#define SH_MAX_DMA_CHANNELS 4 +#include /* The maximum address that we can perform a DMA transfer to on this platform */ /* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any occurrence should be flagged as an error. */ /* But... */ /* XXX: This is not applicable to SuperH, just needed for alloc_bootmem */ -#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000) +#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000) -#define DMTE_IRQ ((int[]){DMTE0_IRQ,DMTE1_IRQ,DMTE2_IRQ,DMTE3_IRQ}) +#ifdef CONFIG_NR_DMA_CHANNELS +# define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS) +#else +# define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS) +#endif -#define DMA_MODE_READ 0x00 /* I/O to memory, no autoinit, increment, single mode */ -#define DMA_MODE_WRITE 0x01 /* memory to I/O, no autoinit, increment, single mode */ -#define DMA_AUTOINIT 0x10 - -#define REQ_L 0x00000000 -#define REQ_E 0x00080000 -#define RACK_H 0x00000000 -#define RACK_L 0x00040000 -#define ACK_R 0x00000000 -#define ACK_W 0x00020000 -#define ACK_H 0x00000000 -#define ACK_L 0x00010000 -#define DM_INC 0x00004000 -#define DM_DEC 0x00008000 -#define SM_INC 0x00001000 -#define SM_DEC 0x00002000 -#define RS_DUAL 0x00000000 -#define RS_IN 0x00000200 -#define RS_OUT 0x00000300 -#define TM_BURST 0x0000080 -#define TS_8 0x00000010 -#define TS_16 0x00000020 -#define TS_32 0x00000030 -#define TS_64 0x00000000 -#define TS_BLK 0x00000040 -#define CHCR_DE 0x00000001 -#define CHCR_TE 0x00000002 -#define CHCR_IE 0x00000004 - -#define DMAOR_COD 0x00000008 -#define DMAOR_AE 0x00000004 -#define DMAOR_NMIF 0x00000002 -#define DMAOR_DME 0x00000001 +/* + * Read and write modes can mean drastically different things depending on the + * channel configuration. Consult your DMAC documentation and module + * implementation for further clues. + */ +#define DMA_MODE_READ 0x00 +#define DMA_MODE_WRITE 0x01 +#define DMA_MODE_MASK 0x01 + +extern spinlock_t dma_spin_lock; + +struct dma_info; + +struct dma_ops { + const char *name; + + int (*request)(struct dma_info *info); + void (*free)(struct dma_info *info); + + int (*get_residue)(struct dma_info *info); + int (*xfer)(struct dma_info *info); + void (*configure)(struct dma_info *info, unsigned long flags); +}; + +struct dma_info { + const char *dev_id; -struct dma_info_t { unsigned int chan; - unsigned long dev_addr; unsigned int mode; - unsigned long mem_addr; unsigned int count; -}; + + unsigned long sar; + unsigned long dar; + + unsigned int configured:1; + atomic_t busy; + + struct semaphore sem; + struct dma_ops *ops; +} __attribute__ ((packed)); + +/* arch/sh/drivers/dma/dma-api.c */ +extern int dma_xfer(unsigned int chan, unsigned long from, + unsigned long to, size_t size, unsigned int mode); + +#define dma_write(chan, from, to, size) \ + dma_xfer(chan, from, to, size, DMA_MODE_WRITE) +#define dma_write_page(chan, from, to) \ + dma_write(chan, from, to, PAGE_SIZE) + +#define dma_read(chan, from, to, size) \ + dma_xfer(chan, from, to, size, DMA_MODE_READ) +#define dma_read_page(chan, from, to) \ + dma_read(chan, from, to, PAGE_SIZE) + +extern int request_dma(unsigned int chan, const char *dev_id); +extern void free_dma(unsigned int chan); +extern int get_dma_residue(unsigned int chan); +extern struct dma_info *get_dma_info(unsigned int chan); +extern void dma_wait_for_completion(unsigned int chan); +extern void dma_configure_channel(unsigned int chan, unsigned long flags); -static __inline__ void clear_dma_ff(unsigned int dmanr){} +extern int register_dmac(struct dma_ops *ops); -/* These are in arch/sh/kernel/dma.c: */ -extern unsigned long claim_dma_lock(void); -extern void release_dma_lock(unsigned long flags); -extern void setup_dma(unsigned int dmanr, struct dma_info_t *info); -extern void enable_dma(unsigned int dmanr); -extern void disable_dma(unsigned int dmanr); -extern void set_dma_mode(unsigned int dmanr, char mode); -extern void set_dma_addr(unsigned int dmanr, unsigned int a); -extern void set_dma_count(unsigned int dmanr, unsigned int count); -extern int get_dma_residue(unsigned int dmanr); +extern struct dma_info dma_info[]; #ifdef CONFIG_PCI extern int isa_dma_bridge_buggy; @@ -82,6 +100,4 @@ extern int isa_dma_bridge_buggy; #define isa_dma_bridge_buggy (0) #endif -#endif /* CONFIG_SH_MPC1211 */ - #endif /* __ASM_SH_DMA_H */ diff -puN /dev/null include/asm-sh/dreamcast/dma.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/dreamcast/dma.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,34 @@ +/* + * include/asm-sh/dreamcast/dma.h + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_SH_DREAMCAST_DMA_H +#define __ASM_SH_DREAMCAST_DMA_H + +/* Number of DMA channels */ +#define ONCHIP_NR_DMA_CHANNELS 4 +#define G2_NR_DMA_CHANNELS 4 +#define PVR2_NR_DMA_CHANNELS 1 + +/* Channels for cascading */ +#define PVR2_CASCADE_CHAN 2 +#define G2_CASCADE_CHAN 3 + +/* PVR2 DMA Registers */ +#define PVR2_DMA_BASE 0xa05f6800 +#define PVR2_DMA_ADDR (PVR2_DMA_BASE + 0) +#define PVR2_DMA_COUNT (PVR2_DMA_BASE + 4) +#define PVR2_DMA_MODE (PVR2_DMA_BASE + 8) +#define PVR2_DMA_LMMODE0 (PVR2_DMA_BASE + 132) +#define PVR2_DMA_LMMODE1 (PVR2_DMA_BASE + 136) + +/* G2 DMA Register */ +#define G2_DMA_BASE 0xa05f7800 + +#endif /* __ASM_SH_DREAMCAST_DMA_H */ + diff -puN /dev/null include/asm-sh/dreamcast/pci.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/dreamcast/pci.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,25 @@ +/* + * include/asm-sh/dreamcast/pci.h + * + * Copyright (C) 2001, 2002 M. R. Brown + * Copyright (C) 2002, 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_SH_DREAMCAST_PCI_H +#define __ASM_SH_DREAMCAST_PCI_H + +#include + +#define GAPSPCI_REGS 0x01001400 +#define GAPSPCI_DMA_BASE 0x01840000 +#define GAPSPCI_DMA_SIZE 32768 +#define GAPSPCI_BBA_CONFIG 0x01001600 +#define GAPSPCI_BBA_CONFIG_SIZE 0x2000 + +#define GAPSPCI_IRQ HW_EVENT_EXTERNAL + +#endif /* __ASM_SH_DREAMCAST_PCI_H */ + diff -puN include/asm-sh/dreamcast/sysasic.h~sh-merge include/asm-sh/dreamcast/sysasic.h --- 25/include/asm-sh/dreamcast/sysasic.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/dreamcast/sysasic.h 2004-01-09 21:32:27.000000000 -0800 @@ -3,12 +3,15 @@ * Definitions for the Dreamcast System ASIC and related peripherals. * * Copyright (c) 2001 M. R. Brown + * Copyright (C) 2003 Paul Mundt * * This file is part of the LinuxDC project (www.linuxdc.org) * * Released under the terms of the GNU GPL v2.0. * */ +#ifndef __ASM_SH_DREAMCAST_SYSASIC_H +#define __ASM_SH_DREAMCAST_SYSASIC_H #include @@ -26,6 +29,8 @@ #define HW_EVENT_VSYNC (HW_EVENT_IRQ_BASE + 5) /* VSync */ #define HW_EVENT_MAPLE_DMA (HW_EVENT_IRQ_BASE + 12) /* Maple DMA complete */ #define HW_EVENT_GDROM_DMA (HW_EVENT_IRQ_BASE + 14) /* GD-ROM DMA complete */ +#define HW_EVENT_G2_DMA (HW_EVENT_IRQ_BASE + 15) /* G2 DMA complete */ +#define HW_EVENT_PVR2_DMA (HW_EVENT_IRQ_BASE + 19) /* PVR2 DMA complete */ /* IRQ 11 */ #define HW_EVENT_GDROM_CMD (HW_EVENT_IRQ_BASE + 32) /* GD-ROM cmd. complete */ @@ -33,3 +38,6 @@ #define HW_EVENT_EXTERNAL (HW_EVENT_IRQ_BASE + 35) /* Ext. (expansion) */ #define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95) + +#endif /* __ASM_SH_DREAMCAST_SYSASIC_H */ + diff -puN -L include/asm-sh/ec3104.h include/asm-sh/ec3104.h~sh-merge /dev/null --- 25/include/asm-sh/ec3104.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,43 +0,0 @@ -#ifndef __ASM_EC3104_H -#define __ASM_EC3104_H - - -/* - * Most of the register set is at 0xb0ec0000 - 0xb0ecffff. - * - * as far as I've figured it out the register map is: - * 0xb0ec0000 - id string - * 0xb0ec0XXX - power management - * 0xb0ec1XXX - interrupt control - * 0xb0ec3XXX - ps2 port (touch pad on aero 8000) - * 0xb0ec6XXX - i2c - * 0xb0ec7000 - first serial port (proprietary connector on aero 8000) - * 0xb0ec8000 - second serial port - * 0xb0ec9000 - third serial port - * 0xb0eca000 - fourth serial port (keyboard controller on aero 8000) - * 0xb0eccXXX - GPIO - * 0xb0ecdXXX - GPIO - */ - -#define EC3104_BASE 0xb0ec0000 - -#define EC3104_SER4_DATA (EC3104_BASE+0xa000) -#define EC3104_SER4_IIR (EC3104_BASE+0xa008) -#define EC3104_SER4_MCR (EC3104_BASE+0xa010) -#define EC3104_SER4_LSR (EC3104_BASE+0xa014) -#define EC3104_SER4_MSR (EC3104_BASE+0xa018) - -/* - * our ISA bus. this seems to be real ISA. - */ -#define EC3104_ISA_BASE 0xa5000000 - -#define EC3104_IRQ 11 -#define EC3104_IRQBASE 64 - -#define EC3104_IRQ_SER1 EC3104_IRQBASE + 7 -#define EC3104_IRQ_SER2 EC3104_IRQBASE + 8 -#define EC3104_IRQ_SER3 EC3104_IRQBASE + 9 -#define EC3104_IRQ_SER4 EC3104_IRQBASE + 10 - -#endif /* __ASM_EC3104_H */ diff -puN include/asm-sh/ec3104/io.h~sh-merge include/asm-sh/ec3104/io.h --- 25/include/asm-sh/ec3104/io.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/ec3104/io.h 2004-01-09 21:32:27.000000000 -0800 @@ -1,7 +1,6 @@ #ifndef _ASM_SH_IO_EC3104_H #define _ASM_SH_IO_EC3104_H -#include #include extern unsigned char ec3104_inb(unsigned long port); @@ -14,41 +13,4 @@ extern void ec3104_outl(unsigned long va extern int ec3104_irq_demux(int irq); -#ifdef __WANT_IO_DEF - -# define __inb ec3104_inb -# define __inw ec3104_inw -# define __inl ec3104_inl -# define __outb ec3104_outb -# define __outw ec3104_outw -# define __outl ec3104_outl - -# define __inb_p ec3104_inb -# define __inw_p ec3104_inw -# define __inl_p ec3104_inl -# define __outb_p ec3104_outb -# define __outw_p ec3104_outw -# define __outl_p ec3104_outl - -# define __insb generic_insb -# define __insw generic_insw -# define __insl generic_insl -# define __outsb generic_outsb -# define __outsw generic_outsw -# define __outsl generic_outsl - -# define __readb generic_readb -# define __readw generic_readw -# define __readl generic_readl -# define __writeb generic_writeb -# define __writew generic_writew -# define __writel generic_writel - -# define __isa_port2addr generic_isa_port2addr -# define __ioremap generic_ioremap -# define __ioremap_nocache generic_ioremap_nocache -# define __iounmap generic_iounmap - -#endif - #endif /* _ASM_SH_IO_EC3104_H */ diff -puN /dev/null include/asm-sh/flat.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/flat.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,23 @@ +/* + * include/asm-sh/flat.h + * + * uClinux flat-format executables + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive for + * more details. + */ +#ifndef __ASM_SH_FLAT_H +#define __ASM_SH_FLAT_H + +#define flat_stack_align(sp) /* nothing needed */ +#define flat_argvp_envp_on_stack() 1 +#define flat_old_ram_flag(flags) (flags) +#define flat_reloc_valid(reloc, size) ((reloc) <= (size)) +#define flat_get_addr_from_rp(rp, relval) get_unaligned(rp) +#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp) +#define flat_get_relocate_addr(rel) (rel) + +#endif /* __ASM_SH_FLAT_H */ diff -puN include/asm-sh/hardirq.h~sh-merge include/asm-sh/hardirq.h --- 25/include/asm-sh/hardirq.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/hardirq.h 2004-01-09 21:32:27.000000000 -0800 @@ -8,8 +8,6 @@ /* entry.S is sensitive to the offsets of these fields */ typedef struct { unsigned int __softirq_pending; - unsigned int __syscall_count; - struct task_struct * __ksoftirqd_task; } ____cacheline_aligned irq_cpustat_t; #include /* Standard mappings for irq_cpustat_t above */ @@ -97,27 +95,4 @@ do { \ extern void synchronize_irq(unsigned int irq); #endif /* CONFIG_SMP */ -/* XXX: MRB-remove -#define in_interrupt() ({ int __cpu = smp_processor_id(); \ - (local_irq_count(__cpu) + local_bh_count(__cpu) != 0); }) - -#define in_irq() (local_irq_count(smp_processor_id()) != 0) - -#ifndef CONFIG_SMP - -#define hardirq_trylock(cpu) (local_irq_count(cpu) == 0) -#define hardirq_endlock(cpu) do { } while (0) - -#define irq_enter(cpu, irq) (local_irq_count(cpu)++) -#define irq_exit(cpu, irq) (local_irq_count(cpu)--) - -#define synchronize_irq() barrier() - -#else - -#error Super-H SMP is not available - -#endif -*/ - #endif /* __ASM_SH_HARDIRQ_H */ diff -puN -L include/asm-sh/hd64461.h include/asm-sh/hd64461.h~sh-merge /dev/null --- 25/include/asm-sh/hd64461.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,75 +0,0 @@ -#ifndef __ASM_SH_HD64461 -#define __ASM_SH_HD64461 -/* - * $Id: hd64461.h,v 1.7 2001/07/07 11:43:58 yaegashi Exp $ - * Copyright (C) 2000 YAEGASHI Takeshi - * Hitachi HD64461 companion chip support - */ -#include - -#define HD64461_STBCR 0x10000 -#define HD64461_SYSCR 0x10002 -#define HD64461_SCPUCR 0x10004 - -#define HD64461_LCDCBAR 0x11000 -#define HD64461_LCDCLOR 0x11002 -#define HD64461_LCDCCRR 0x11004 -#define HD64461_LDR1 0x11010 -#define HD64461_LDR2 0x11012 -#define HD64461_LDHNCR 0x11014 -#define HD64461_LDHNSR 0x11016 -#define HD64461_LDVNTR 0x11018 -#define HD64461_LDVNDR 0x1101a -#define HD64461_LDVSPR 0x1101c -#define HD64461_LDR3 0x1101e - -#define HD64461_CPTWAR 0x11030 -#define HD64461_CPTWDR 0x11032 -#define HD64461_CPTRAR 0x11034 -#define HD64461_CPTRDR 0x11036 - -#define HD64461_PCC0ISR 0x12000 -#define HD64461_PCC0GCR 0x12002 -#define HD64461_PCC0CSCR 0x12004 -#define HD64461_PCC0CSCIER 0x12006 -#define HD64461_PCC0SCR 0x12008 -#define HD64461_PCC1ISR 0x12010 -#define HD64461_PCC1GCR 0x12012 -#define HD64461_PCC1CSCR 0x12014 -#define HD64461_PCC1CSCIER 0x12016 -#define HD64461_PCC1SCR 0x12018 -#define HD64461_P0OCR 0x1202a -#define HD64461_P1OCR 0x1202c -#define HD64461_PGCR 0x1202e - -#define HD64461_GPACR 0x14000 -#define HD64461_GPBCR 0x14002 -#define HD64461_GPCCR 0x14004 -#define HD64461_GPDCR 0x14006 -#define HD64461_GPADR 0x14010 -#define HD64461_GPBDR 0x14012 -#define HD64461_GPCDR 0x14014 -#define HD64461_GPDDR 0x14016 -#define HD64461_GPAICR 0x14020 -#define HD64461_GPBICR 0x14022 -#define HD64461_GPCICR 0x14024 -#define HD64461_GPDICR 0x14026 -#define HD64461_GPAISR 0x14040 -#define HD64461_GPBISR 0x14042 -#define HD64461_GPCISR 0x14044 -#define HD64461_GPDISR 0x14046 - -#define HD64461_NIRR 0x15000 -#define HD64461_NIMR 0x15002 - -#ifndef CONFIG_HD64461_IOBASE -#define CONFIG_HD64461_IOBASE 0xb0000000 -#endif -#ifndef CONFIG_HD64461_IRQ -#define CONFIG_HD64461_IRQ 36 -#endif - -#define HD64461_IRQBASE OFFCHIP_IRQ_BASE -#define HD64461_IRQ_NUM 16 - -#endif diff -puN include/asm-sh/hd64461/io.h~sh-merge include/asm-sh/hd64461/io.h --- 25/include/asm-sh/hd64461/io.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/hd64461/io.h 2004-01-09 21:32:27.000000000 -0800 @@ -12,8 +12,6 @@ #ifndef _ASM_SH_IO_HD64461_H #define _ASM_SH_IO_HD64461_H -#include - extern unsigned char hd64461_inb(unsigned long port); extern unsigned short hd64461_inw(unsigned long port); extern unsigned int hd64461_inl(unsigned long port); @@ -25,49 +23,6 @@ extern void hd64461_outl(unsigned int va extern unsigned char hd64461_inb_p(unsigned long port); extern void hd64461_outb_p(unsigned char value, unsigned long port); -extern void hd64461_insb(unsigned long port, void *addr, unsigned long count); -extern void hd64461_insw(unsigned long port, void *addr, unsigned long count); -extern void hd64461_insl(unsigned long port, void *addr, unsigned long count); -extern void hd64461_outsb(unsigned long port, const void *addr, unsigned long count); -extern void hd64461_outsw(unsigned long port, const void *addr, unsigned long count); -extern void hd64461_outsl(unsigned long port, const void *addr, unsigned long count); extern int hd64461_irq_demux(int irq); -#ifdef __WANT_IO_DEF - -# define __inb hd64461_inb -# define __inw hd64461_inw -# define __inl hd64461_inl -# define __outb hd64461_outb -# define __outw hd64461_outw -# define __outl hd64461_outl - -# define __inb_p hd64461_inb_p -# define __inw_p hd64461_inw -# define __inl_p hd64461_inl -# define __outb_p hd64461_outb_p -# define __outw_p hd64461_outw -# define __outl_p hd64461_outl - -# define __insb hd64461_insb -# define __insw hd64461_insw -# define __insl hd64461_insl -# define __outsb hd64461_outsb -# define __outsw hd64461_outsw -# define __outsl hd64461_outsl - -# define __readb generic_readb -# define __readw generic_readw -# define __readl generic_readl -# define __writeb generic_writeb -# define __writew generic_writew -# define __writel generic_writel - -# define __isa_port2addr generic_isa_port2addr -# define __ioremap generic_ioremap -# define __ioremap_nocache generic_ioremap_nocache -# define __iounmap generic_iounmap - -#endif - #endif /* _ASM_SH_IO_HD64461_H */ diff -puN -L include/asm-sh/hd64465_gpio.h include/asm-sh/hd64465_gpio.h~sh-merge /dev/null --- 25/include/asm-sh/hd64465_gpio.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,46 +0,0 @@ -#ifndef _ASM_SH_HD64465_GPIO_ -#define _ASM_SH_HD64465_GPIO_ 1 -/* - * $Id: hd64465_gpio.h,v 1.2 2001/05/24 00:14:13 gniibe Exp $ - * - * Hitachi HD64465 companion chip: General Purpose IO pins support. - * This layer enables other device drivers to configure GPIO - * pins, get and set their values, and register an interrupt - * routine for when input pins change in hardware. - * - * by Greg Banks - * (c) 2000 PocketPenguins Inc. - */ -#include - -/* Macro to construct a portpin number (used in all - * subsequent functions) from a port letter and a pin - * number, e.g. HD64465_GPIO_PORTPIN('A', 5). - */ -#define HD64465_GPIO_PORTPIN(port,pin) (((port)-'A')<<3|(pin)) - -/* Pin configuration constants for _configure() */ -#define HD64465_GPIO_FUNCTION2 0 /* use the pin's *other* function */ -#define HD64465_GPIO_OUT 1 /* output */ -#define HD64465_GPIO_IN_PULLUP 2 /* input, pull-up MOS on */ -#define HD64465_GPIO_IN 3 /* input */ - -/* Configure a pin's direction */ -extern void hd64465_gpio_configure(int portpin, int direction); - -/* Get, set value */ -extern void hd64465_gpio_set_pin(int portpin, unsigned int value); -extern unsigned int hd64465_gpio_get_pin(int portpin); -extern void hd64465_gpio_set_port(int port, unsigned int value); -extern unsigned int hd64465_gpio_get_port(int port); - -/* mode constants for _register_irq() */ -#define HD64465_GPIO_FALLING 0 -#define HD64465_GPIO_RISING 1 - -/* Interrupt on external value change */ -extern void hd64465_gpio_register_irq(int portpin, int mode, - void (*handler)(int portpin, void *dev), void *dev); -extern void hd64465_gpio_unregister_irq(int portpin); - -#endif /* _ASM_SH_HD64465_GPIO_ */ diff -puN -L include/asm-sh/hd64465.h include/asm-sh/hd64465.h~sh-merge /dev/null --- 25/include/asm-sh/hd64465.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,257 +0,0 @@ -#ifndef _ASM_SH_HD64465_ -#define _ASM_SH_HD64465_ 1 -/* - * $Id: hd64465.h,v 1.3 2001/02/07 18:31:20 stuart_menefy Exp $ - * - * Hitachi HD64465 companion chip support - * - * by Greg Banks - * (c) 2000 PocketPenguins Inc. - * - * Derived from which bore the message: - * Copyright (C) 2000 YAEGASHI Takeshi - */ -#include -#include -#include - -/* - * Note that registers are defined here as virtual port numbers, - * which have no meaning except to get translated by hd64465_isa_port2addr() - * to an address in the range 0xb0000000-0xb3ffffff. Note that - * this translation happens to consist of adding the lower 16 bits - * of the virtual port number to 0xb0000000. Note also that the manual - * shows addresses as absolute physical addresses starting at 0x10000000, - * so e.g. the NIRR register is listed as 0x15000 here, 0x10005000 in the - * manual, and accessed using address 0xb0005000 - Greg. - */ - -/* System registers */ -#define HD64465_REG_SRR 0x1000c /* System Revision Register */ -#define HD64465_REG_SDID 0x10010 /* System Device ID Reg */ -#define HD64465_SDID 0x8122 /* 64465 device ID */ - -/* Power Management registers */ -#define HD64465_REG_SMSCR 0x10000 /* System Module Standby Control Reg */ -#define HD64465_SMSCR_PS2ST 0x4000 /* PS/2 Standby */ -#define HD64465_SMSCR_ADCST 0x1000 /* ADC Standby */ -#define HD64465_SMSCR_UARTST 0x0800 /* UART Standby */ -#define HD64465_SMSCR_SCDIST 0x0200 /* Serial Codec Standby */ -#define HD64465_SMSCR_PPST 0x0100 /* Parallel Port Standby */ -#define HD64465_SMSCR_PC0ST 0x0040 /* PCMCIA0 Standby */ -#define HD64465_SMSCR_PC1ST 0x0020 /* PCMCIA1 Standby */ -#define HD64465_SMSCR_AFEST 0x0010 /* AFE Standby */ -#define HD64465_SMSCR_TM0ST 0x0008 /* Timer0 Standby */ -#define HD64465_SMSCR_TM1ST 0x0004 /* Timer1 Standby */ -#define HD64465_SMSCR_IRDAST 0x0002 /* IRDA Standby */ -#define HD64465_SMSCR_KBCST 0x0001 /* Keyboard Controller Standby */ - -/* Interrupt Controller registers */ -#define HD64465_REG_NIRR 0x15000 /* Interrupt Request Register */ -#define HD64465_REG_NIMR 0x15002 /* Interrupt Mask Register */ -#define HD64465_REG_NITR 0x15004 /* Interrupt Trigger Mode Register */ - -/* Timer registers */ -#define HD64465_REG_TCVR1 0x16000 /* Timer 1 constant value register */ -#define HD64465_REG_TCVR0 0x16002 /* Timer 0 constant value register */ -#define HD64465_REG_TRVR1 0x16004 /* Timer 1 read value register */ -#define HD64465_REG_TRVR0 0x16006 /* Timer 0 read value register */ -#define HD64465_REG_TCR1 0x16008 /* Timer 1 control register */ -#define HD64465_REG_TCR0 0x1600A /* Timer 0 control register */ -#define HD64465_TCR_EADT 0x10 /* Enable ADTRIG# signal */ -#define HD64465_TCR_ETMO 0x08 /* Enable TMO signal */ -#define HD64465_TCR_PST_MASK 0x06 /* Clock Prescale */ -#define HD64465_TCR_PST_1 0x06 /* 1:1 */ -#define HD64465_TCR_PST_4 0x04 /* 1:4 */ -#define HD64465_TCR_PST_8 0x02 /* 1:8 */ -#define HD64465_TCR_PST_16 0x00 /* 1:16 */ -#define HD64465_TCR_TSTP 0x01 /* Start/Stop timer */ -#define HD64465_REG_TIRR 0x1600C /* Timer interrupt request register */ -#define HD64465_REG_TIDR 0x1600E /* Timer interrupt disable register */ -#define HD64465_REG_PWM1CS 0x16010 /* PWM 1 clock scale register */ -#define HD64465_REG_PWM1LPC 0x16012 /* PWM 1 low pulse width counter register */ -#define HD64465_REG_PWM1HPC 0x16014 /* PWM 1 high pulse width counter register */ -#define HD64465_REG_PWM0CS 0x16018 /* PWM 0 clock scale register */ -#define HD64465_REG_PWM0LPC 0x1601A /* PWM 0 low pulse width counter register */ -#define HD64465_REG_PWM0HPC 0x1601C /* PWM 0 high pulse width counter register */ - -/* Analog/Digital Converter registers */ -#define HD64465_REG_ADDRA 0x1E000 /* A/D data register A */ -#define HD64465_REG_ADDRB 0x1E002 /* A/D data register B */ -#define HD64465_REG_ADDRC 0x1E004 /* A/D data register C */ -#define HD64465_REG_ADDRD 0x1E006 /* A/D data register D */ -#define HD64465_REG_ADCSR 0x1E008 /* A/D control/status register */ -#define HD64465_ADCSR_ADF 0x80 /* A/D End Flag */ -#define HD64465_ADCSR_ADST 0x40 /* A/D Start Flag */ -#define HD64465_ADCSR_ADIS 0x20 /* A/D Interrupt Status */ -#define HD64465_ADCSR_TRGE 0x10 /* A/D Trigger Enable */ -#define HD64465_ADCSR_ADIE 0x08 /* A/D Interrupt Enable */ -#define HD64465_ADCSR_SCAN 0x04 /* A/D Scan Mode */ -#define HD64465_ADCSR_CH_MASK 0x03 /* A/D Channel */ -#define HD64465_REG_ADCALCR 0x1E00A /* A/D calibration sample control */ -#define HD64465_REG_ADCAL 0x1E00C /* A/D calibration data register */ - - -/* General Purpose I/O ports registers */ -#define HD64465_REG_GPACR 0x14000 /* Port A Control Register */ -#define HD64465_REG_GPBCR 0x14002 /* Port B Control Register */ -#define HD64465_REG_GPCCR 0x14004 /* Port C Control Register */ -#define HD64465_REG_GPDCR 0x14006 /* Port D Control Register */ -#define HD64465_REG_GPECR 0x14008 /* Port E Control Register */ -#define HD64465_REG_GPADR 0x14010 /* Port A Data Register */ -#define HD64465_REG_GPBDR 0x14012 /* Port B Data Register */ -#define HD64465_REG_GPCDR 0x14014 /* Port C Data Register */ -#define HD64465_REG_GPDDR 0x14016 /* Port D Data Register */ -#define HD64465_REG_GPEDR 0x14018 /* Port E Data Register */ -#define HD64465_REG_GPAICR 0x14020 /* Port A Interrupt Control Register */ -#define HD64465_REG_GPBICR 0x14022 /* Port B Interrupt Control Register */ -#define HD64465_REG_GPCICR 0x14024 /* Port C Interrupt Control Register */ -#define HD64465_REG_GPDICR 0x14026 /* Port D Interrupt Control Register */ -#define HD64465_REG_GPEICR 0x14028 /* Port E Interrupt Control Register */ -#define HD64465_REG_GPAISR 0x14040 /* Port A Interrupt Status Register */ -#define HD64465_REG_GPBISR 0x14042 /* Port B Interrupt Status Register */ -#define HD64465_REG_GPCISR 0x14044 /* Port C Interrupt Status Register */ -#define HD64465_REG_GPDISR 0x14046 /* Port D Interrupt Status Register */ -#define HD64465_REG_GPEISR 0x14048 /* Port E Interrupt Status Register */ - -/* PCMCIA bridge interface */ -#define HD64465_REG_PCC0ISR 0x12000 /* socket 0 interface status */ -#define HD64465_PCCISR_PREADY 0x80 /* mem card ready / io card IREQ */ -#define HD64465_PCCISR_PIREQ 0x80 -#define HD64465_PCCISR_PMWP 0x40 /* mem card write-protected */ -#define HD64465_PCCISR_PVS2 0x20 /* voltage select pin 2 */ -#define HD64465_PCCISR_PVS1 0x10 /* voltage select pin 1 */ -#define HD64465_PCCISR_PCD_MASK 0x0c /* card detect */ -#define HD64465_PCCISR_PBVD_MASK 0x03 /* battery voltage */ -#define HD64465_PCCISR_PBVD_BATGOOD 0x03 /* battery good */ -#define HD64465_PCCISR_PBVD_BATWARN 0x01 /* battery low warning */ -#define HD64465_PCCISR_PBVD_BATDEAD1 0x02 /* battery dead */ -#define HD64465_PCCISR_PBVD_BATDEAD2 0x00 /* battery dead */ -#define HD64465_REG_PCC0GCR 0x12002 /* socket 0 general control */ -#define HD64465_PCCGCR_PDRV 0x80 /* output drive */ -#define HD64465_PCCGCR_PCCR 0x40 /* PC card reset */ -#define HD64465_PCCGCR_PCCT 0x20 /* PC card type, 1=IO&mem, 0=mem */ -#define HD64465_PCCGCR_PVCC0 0x10 /* voltage control pin VCC0SEL0 */ -#define HD64465_PCCGCR_PMMOD 0x08 /* memory mode */ -#define HD64465_PCCGCR_PPA25 0x04 /* pin A25 */ -#define HD64465_PCCGCR_PPA24 0x02 /* pin A24 */ -#define HD64465_PCCGCR_PREG 0x01 /* ping PCC0REG# */ -#define HD64465_REG_PCC0CSCR 0x12004 /* socket 0 card status change */ -#define HD64465_PCCCSCR_PSCDI 0x80 /* sw card detect intr */ -#define HD64465_PCCCSCR_PSWSEL 0x40 /* power select */ -#define HD64465_PCCCSCR_PIREQ 0x20 /* IREQ intr req */ -#define HD64465_PCCCSCR_PSC 0x10 /* STSCHG (status change) pin */ -#define HD64465_PCCCSCR_PCDC 0x08 /* CD (card detect) change */ -#define HD64465_PCCCSCR_PRC 0x04 /* ready change */ -#define HD64465_PCCCSCR_PBW 0x02 /* battery warning change */ -#define HD64465_PCCCSCR_PBD 0x01 /* battery dead change */ -#define HD64465_REG_PCC0CSCIER 0x12006 /* socket 0 card status change interrupt enable */ -#define HD64465_PCCCSCIER_PCRE 0x80 /* change reset enable */ -#define HD64465_PCCCSCIER_PIREQE_MASK 0x60 /* IREQ enable */ -#define HD64465_PCCCSCIER_PIREQE_DISABLED 0x00 /* IREQ disabled */ -#define HD64465_PCCCSCIER_PIREQE_LEVEL 0x20 /* IREQ level-triggered */ -#define HD64465_PCCCSCIER_PIREQE_FALLING 0x40 /* IREQ falling-edge-trig */ -#define HD64465_PCCCSCIER_PIREQE_RISING 0x60 /* IREQ rising-edge-trig */ -#define HD64465_PCCCSCIER_PSCE 0x10 /* status change enable */ -#define HD64465_PCCCSCIER_PCDE 0x08 /* card detect change enable */ -#define HD64465_PCCCSCIER_PRE 0x04 /* ready change enable */ -#define HD64465_PCCCSCIER_PBWE 0x02 /* battery warn change enable */ -#define HD64465_PCCCSCIER_PBDE 0x01 /* battery dead change enable*/ -#define HD64465_REG_PCC0SCR 0x12008 /* socket 0 software control */ -#define HD64465_PCCSCR_SHDN 0x10 /* TPS2206 SHutDowN pin */ -#define HD64465_PCCSCR_SWP 0x01 /* write protect */ -#define HD64465_REG_PCCPSR 0x1200A /* serial power switch control */ -#define HD64465_REG_PCC1ISR 0x12010 /* socket 1 interface status */ -#define HD64465_REG_PCC1GCR 0x12012 /* socket 1 general control */ -#define HD64465_REG_PCC1CSCR 0x12014 /* socket 1 card status change */ -#define HD64465_REG_PCC1CSCIER 0x12016 /* socket 1 card status change interrupt enable */ -#define HD64465_REG_PCC1SCR 0x12018 /* socket 1 software control */ - - -/* PS/2 Keyboard and mouse controller -- *not* register compatible */ -#define HD64465_REG_KBCSR 0x1dc00 /* Keyboard Control/Status reg */ -#define HD64465_KBCSR_KBCIE 0x8000 /* KBCK Input Enable */ -#define HD64465_KBCSR_KBCOE 0x4000 /* KBCK Output Enable */ -#define HD64465_KBCSR_KBDOE 0x2000 /* KB DATA Output Enable */ -#define HD64465_KBCSR_KBCD 0x1000 /* KBCK Driven */ -#define HD64465_KBCSR_KBDD 0x0800 /* KB DATA Driven */ -#define HD64465_KBCSR_KBCS 0x0400 /* KBCK pin Status */ -#define HD64465_KBCSR_KBDS 0x0200 /* KB DATA pin Status */ -#define HD64465_KBCSR_KBDP 0x0100 /* KB DATA Parity bit */ -#define HD64465_KBCSR_KBD_MASK 0x00ff /* KD DATA shift reg */ -#define HD64465_REG_KBISR 0x1dc04 /* Keyboard Interrupt Status reg */ -#define HD64465_KBISR_KBRDF 0x0001 /* KB Received Data Full */ -#define HD64465_REG_MSCSR 0x1dc10 /* Mouse Control/Status reg */ -#define HD64465_REG_MSISR 0x1dc14 /* Mouse Interrupt Status reg */ - - -/* - * Logical address at which the HD64465 is mapped. Note that this - * should always be in the P2 segment (uncached and untranslated). - */ -#ifndef CONFIG_HD64465_IOBASE -#define CONFIG_HD64465_IOBASE 0xb0000000 -#endif -/* - * The HD64465 multiplexes all its modules' interrupts onto - * this single interrupt. - */ -#ifndef CONFIG_HD64465_IRQ -#define CONFIG_HD64465_IRQ 5 -#endif - - -#define _HD64465_IO_MASK 0xf8000000 -#define is_hd64465_addr(addr) \ - ((addr & _HD64465_IO_MASK) == (CONFIG_HD64465_IOBASE & _HD64465_IO_MASK)) - -/* - * A range of 16 virtual interrupts generated by - * demuxing the HD64465 muxed interrupt. - */ -#define HD64465_IRQ_BASE OFFCHIP_IRQ_BASE -#define HD64465_IRQ_NUM 16 -#define HD64465_IRQ_ADC (HD64465_IRQ_BASE+0) -#define HD64465_IRQ_USB (HD64465_IRQ_BASE+1) -#define HD64465_IRQ_SCDI (HD64465_IRQ_BASE+2) -#define HD64465_IRQ_PARALLEL (HD64465_IRQ_BASE+3) -/* bit 4 is reserved */ -#define HD64465_IRQ_UART (HD64465_IRQ_BASE+5) -#define HD64465_IRQ_IRDA (HD64465_IRQ_BASE+6) -#define HD64465_IRQ_PS2MOUSE (HD64465_IRQ_BASE+7) -#define HD64465_IRQ_KBC (HD64465_IRQ_BASE+8) -#define HD64465_IRQ_TIMER1 (HD64465_IRQ_BASE+9) -#define HD64465_IRQ_TIMER0 (HD64465_IRQ_BASE+10) -#define HD64465_IRQ_GPIO (HD64465_IRQ_BASE+11) -#define HD64465_IRQ_AFE (HD64465_IRQ_BASE+12) -#define HD64465_IRQ_PCMCIA1 (HD64465_IRQ_BASE+13) -#define HD64465_IRQ_PCMCIA0 (HD64465_IRQ_BASE+14) -#define HD64465_IRQ_PS2KBD (HD64465_IRQ_BASE+15) - -/* Constants for PCMCIA mappings */ -#define HD64465_PCC_WINDOW 0x01000000 - -#define HD64465_PCC0_BASE 0xb8000000 /* area 6 */ -#define HD64465_PCC0_ATTR (HD64465_PCC0_BASE) -#define HD64465_PCC0_COMM (HD64465_PCC0_BASE+HD64465_PCC_WINDOW) -#define HD64465_PCC0_IO (HD64465_PCC0_BASE+2*HD64465_PCC_WINDOW) - -#define HD64465_PCC1_BASE 0xb4000000 /* area 5 */ -#define HD64465_PCC1_ATTR (HD64465_PCC1_BASE) -#define HD64465_PCC1_COMM (HD64465_PCC1_BASE+HD64465_PCC_WINDOW) -#define HD64465_PCC1_IO (HD64465_PCC1_BASE+2*HD64465_PCC_WINDOW) - -/* - * Base of USB controller interface (as memory) - */ -#define HD64465_USB_BASE (CONFIG_HD64465_IOBASE+0xb000) -#define HD64465_USB_LEN 0x1000 -/* - * Base of embedded SRAM, used for USB controller. - */ -#define HD64465_SRAM_BASE (CONFIG_HD64465_IOBASE+0x9000) -#define HD64465_SRAM_LEN 0x1000 - - - -#endif /* _ASM_SH_HD64465_ */ diff -puN include/asm-sh/hd64465/io.h~sh-merge include/asm-sh/hd64465/io.h --- 25/include/asm-sh/hd64465/io.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/hd64465/io.h 2004-01-09 21:32:27.000000000 -0800 @@ -16,8 +16,6 @@ #ifndef _ASM_SH_IO_HD64465_H #define _ASM_SH_IO_HD64465_H -#include - extern unsigned char hd64465_inb(unsigned long port); extern unsigned short hd64465_inw(unsigned long port); extern unsigned int hd64465_inl(unsigned long port); @@ -29,12 +27,6 @@ extern void hd64465_outl(unsigned int va extern unsigned char hd64465_inb_p(unsigned long port); extern void hd64465_outb_p(unsigned char value, unsigned long port); -extern void hd64465_insb(unsigned long port, void *addr, unsigned long count); -extern void hd64465_insw(unsigned long port, void *addr, unsigned long count); -extern void hd64465_insl(unsigned long port, void *addr, unsigned long count); -extern void hd64465_outsb(unsigned long port, const void *addr, unsigned long count); -extern void hd64465_outsw(unsigned long port, const void *addr, unsigned long count); -extern void hd64465_outsl(unsigned long port, const void *addr, unsigned long count); extern unsigned long hd64465_isa_port2addr(unsigned long offset); extern int hd64465_irq_demux(int irq); /* Provision for generic secondary demux step -- used by PCMCIA code */ @@ -49,42 +41,4 @@ extern void hd64465_port_map(unsigned sh unsigned long addr, unsigned char shift); extern void hd64465_port_unmap(unsigned short baseport, unsigned int nports); - -#ifdef __WANT_IO_DEF - -# define __inb hd64465_inb -# define __inw hd64465_inw -# define __inl hd64465_inl -# define __outb hd64465_outb -# define __outw hd64465_outw -# define __outl hd64465_outl - -# define __inb_p hd64465_inb_p -# define __inw_p hd64465_inw -# define __inl_p hd64465_inl -# define __outb_p hd64465_outb_p -# define __outw_p hd64465_outw -# define __outl_p hd64465_outl - -# define __insb hd64465_insb -# define __insw hd64465_insw -# define __insl hd64465_insl -# define __outsb hd64465_outsb -# define __outsw hd64465_outsw -# define __outsl hd64465_outsl - -# define __readb generic_readb -# define __readw generic_readw -# define __readl generic_readl -# define __writeb generic_writeb -# define __writew generic_writew -# define __writel generic_writel - -# define __isa_port2addr hd64465_isa_port2addr -# define __ioremap generic_ioremap -# define __iounmap generic_iounmap - - -#endif - #endif /* _ASM_SH_IO_HD64465_H */ diff -puN -L include/asm-sh/hitachi_7751se.h include/asm-sh/hitachi_7751se.h~sh-merge /dev/null --- 25/include/asm-sh/hitachi_7751se.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,68 +0,0 @@ -#ifndef __ASM_SH_HITACHI_7751SE_H -#define __ASM_SH_HITACHI_7751SE_H - -/* - * linux/include/asm-sh/hitachi_7751se.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SolutionEngine support - - * Modified for 7751 Solution Engine by - * Ian da Silva and Jeremy Siegel, 2001. - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ -#define PA_LED 0xba000000 /* LED */ -#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_MODE (PA_MRSHPC + 4) -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#define IRQ_79C973 13 - -#endif /* __ASM_SH_HITACHI_7751SE_H */ diff -puN -L include/asm-sh/hitachi_se.h include/asm-sh/hitachi_se.h~sh-merge /dev/null --- 25/include/asm-sh/hitachi_se.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,69 +0,0 @@ -#ifndef __ASM_SH_HITACHI_SE_H -#define __ASM_SH_HITACHI_SE_H - -/* - * linux/include/asm-sh/hitachi_se.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SolutionEngine support - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_83902 0xb0000000 /* DP83902A */ -#define PA_83902_IF 0xb0040000 /* DP83902A remote io port */ -#define PA_83902_RST 0xb0080000 /* DP83902A reset port */ - -#define PA_SUPERIO 0xb0400000 /* SMC37C935A super io chip */ -#define PA_DIPSW0 0xb0800000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb0800002 /* Dip switch 7,8 */ -#define PA_LED 0xb0c00000 /* LED */ -#define PA_BCR 0xb1400000 /* FPGA */ - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#define IRQ_STNIC 10 - -#endif /* __ASM_SH_HITACHI_SE_H */ diff -puN -L include/asm-sh/io_7751se.h include/asm-sh/io_7751se.h~sh-merge /dev/null --- 25/include/asm-sh/io_7751se.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,80 +0,0 @@ -/* - * include/asm-sh/io_7751se.h - * - * Modified version of io_se.h for the 7751se-specific functions. - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an Hitachi SolutionEngine - */ - -#ifndef _ASM_SH_IO_7751SE_H -#define _ASM_SH_IO_7751SE_H - -#include - -extern unsigned char sh7751se_inb(unsigned long port); -extern unsigned short sh7751se_inw(unsigned long port); -extern unsigned int sh7751se_inl(unsigned long port); - -extern void sh7751se_outb(unsigned char value, unsigned long port); -extern void sh7751se_outw(unsigned short value, unsigned long port); -extern void sh7751se_outl(unsigned int value, unsigned long port); - -extern unsigned char sh7751se_inb_p(unsigned long port); -extern void sh7751se_outb_p(unsigned char value, unsigned long port); - -extern void sh7751se_insb(unsigned long port, void *addr, unsigned long count); -extern void sh7751se_insw(unsigned long port, void *addr, unsigned long count); -extern void sh7751se_insl(unsigned long port, void *addr, unsigned long count); -extern void sh7751se_outsb(unsigned long port, const void *addr, unsigned long count); -extern void sh7751se_outsw(unsigned long port, const void *addr, unsigned long count); -extern void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char sh7751se_readb(unsigned long addr); -extern unsigned short sh7751se_readw(unsigned long addr); -extern unsigned int sh7751se_readl(unsigned long addr); -extern void sh7751se_writeb(unsigned char b, unsigned long addr); -extern void sh7751se_writew(unsigned short b, unsigned long addr); -extern void sh7751se_writel(unsigned int b, unsigned long addr); - -extern unsigned long sh7751se_isa_port2addr(unsigned long offset); - -#ifdef __WANT_IO_DEF - -# define __inb sh7751se_inb -# define __inw sh7751se_inw -# define __inl sh7751se_inl -# define __outb sh7751se_outb -# define __outw sh7751se_outw -# define __outl sh7751se_outl - -# define __inb_p sh7751se_inb_p -# define __inw_p sh7751se_inw -# define __inl_p sh7751se_inl -# define __outb_p sh7751se_outb_p -# define __outw_p sh7751se_outw -# define __outl_p sh7751se_outl - -# define __insb sh7751se_insb -# define __insw sh7751se_insw -# define __insl sh7751se_insl -# define __outsb sh7751se_outsb -# define __outsw sh7751se_outsw -# define __outsl sh7751se_outsl - -# define __readb sh7751se_readb -# define __readw sh7751se_readw -# define __readl sh7751se_readl -# define __writeb sh7751se_writeb -# define __writew sh7751se_writew -# define __writel sh7751se_writel - -# define __isa_port2addr sh7751se_isa_port2addr -# define __ioremap generic_ioremap -# define __iounmap generic_iounmap - -#endif - -#endif /* _ASM_SH_IO_7751SE_H */ diff -puN -L include/asm-sh/io_adx.h include/asm-sh/io_adx.h~sh-merge /dev/null --- 25/include/asm-sh/io_adx.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,86 +0,0 @@ -/* - * include/asm-sh/io_adx.h - * - * Copyright (C) 2001 A&D Co., Ltd. - * - * This file may be copied or modified under the terms of the GNU - * General Public License. See linux/COPYING for more information. - * - * IO functions for an A&D ADX Board - */ - -#ifndef _ASM_SH_IO_ADX_H -#define _ASM_SH_IO_ADX_H - -#include - -extern unsigned char adx_inb(unsigned long port); -extern unsigned short adx_inw(unsigned long port); -extern unsigned int adx_inl(unsigned long port); - -extern void adx_outb(unsigned char value, unsigned long port); -extern void adx_outw(unsigned short value, unsigned long port); -extern void adx_outl(unsigned int value, unsigned long port); - -extern unsigned char adx_inb_p(unsigned long port); -extern void adx_outb_p(unsigned char value, unsigned long port); - -extern void adx_insb(unsigned long port, void *addr, unsigned long count); -extern void adx_insw(unsigned long port, void *addr, unsigned long count); -extern void adx_insl(unsigned long port, void *addr, unsigned long count); -extern void adx_outsb(unsigned long port, const void *addr, unsigned long count); -extern void adx_outsw(unsigned long port, const void *addr, unsigned long count); -extern void adx_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char adx_readb(unsigned long addr); -extern unsigned short adx_readw(unsigned long addr); -extern unsigned int adx_readl(unsigned long addr); -extern void adx_writeb(unsigned char b, unsigned long addr); -extern void adx_writew(unsigned short b, unsigned long addr); -extern void adx_writel(unsigned int b, unsigned long addr); - -extern void * adx_ioremap(unsigned long offset, unsigned long size); -extern void adx_iounmap(void *addr); - -extern unsigned long adx_isa_port2addr(unsigned long offset); - -extern void setup_adx(void); -extern void init_adx_IRQ(void); - -#ifdef __WANT_IO_DEF - -#define __inb adx_inb -#define __inw adx_inw -#define __inl adx_inl -#define __outb adx_outb -#define __outw adx_outw -#define __outl adx_outl - -#define __inb_p adx_inb_p -#define __inw_p adx_inw -#define __inl_p adx_inl -#define __outb_p adx_outb_p -#define __outw_p adx_outw -#define __outl_p adx_outl - -#define __insb adx_insb -#define __insw adx_insw -#define __insl adx_insl -#define __outsb adx_outsb -#define __outsw adx_outsw -#define __outsl adx_outsl - -#define __readb adx_readb -#define __readw adx_readw -#define __readl adx_readl -#define __writeb adx_writeb -#define __writew adx_writew -#define __writel adx_writel - -#define __isa_port2addr adx_isa_port2addr -#define __ioremap adx_ioremap -#define __iounmap adx_iounmap - -#endif - -#endif /* _ASM_SH_IO_AANDD_H */ diff -puN -L include/asm-sh/io_bigsur.h include/asm-sh/io_bigsur.h~sh-merge /dev/null --- 25/include/asm-sh/io_bigsur.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,89 +0,0 @@ -/* - * include/asm-sh/io_bigsur.h - * - * By Dustin McIntire (dustin@sensoria.com) (c)2001 - * Derived from io_hd64465.h, which bore the message: - * By Greg Banks - * (c) 2000 PocketPenguins Inc. - * and from io_hd64461.h, which bore the message: - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for a Hitachi Big Sur Evaluation Board. - */ - -#ifndef _ASM_SH_IO_BIGSUR_H -#define _ASM_SH_IO_BIGSUR_H - -#include -#include - -extern unsigned char bigsur_inb(unsigned long port); -extern unsigned short bigsur_inw(unsigned long port); -extern unsigned int bigsur_inl(unsigned long port); - -extern void bigsur_outb(unsigned char value, unsigned long port); -extern void bigsur_outw(unsigned short value, unsigned long port); -extern void bigsur_outl(unsigned int value, unsigned long port); - -extern unsigned char bigsur_inb_p(unsigned long port); -extern void bigsur_outb_p(unsigned char value, unsigned long port); - -extern void bigsur_insb(unsigned long port, void *addr, unsigned long count); -extern void bigsur_insw(unsigned long port, void *addr, unsigned long count); -extern void bigsur_insl(unsigned long port, void *addr, unsigned long count); -extern void bigsur_outsb(unsigned long port, const void *addr, unsigned long count); -extern void bigsur_outsw(unsigned long port, const void *addr, unsigned long count); -extern void bigsur_outsl(unsigned long port, const void *addr, unsigned long count); -extern unsigned long bigsur_isa_port2addr(unsigned long offset); -extern int bigsur_irq_demux(int irq); -extern void bigsur_init_pci(void); -/* Provision for generic secondary demux step -- used by PCMCIA code */ -extern void bigsur_register_irq_demux(int irq, - int (*demux)(int irq, void *dev), void *dev); -extern void bigsur_unregister_irq_demux(int irq); -/* Set this variable to 1 to see port traffic */ -extern int bigsur_io_debug; -/* Map a range of ports to a range of kernel virtual memory. */ -extern void bigsur_port_map(u32 baseport, u32 nports, u32 addr, u8 shift); -extern void bigsur_port_unmap(u32 baseport, u32 nports); - -#endif /* _ASM_SH_IO_BIGSUR_H */ - -#ifdef __WANT_IO_DEF - -# define __inb bigsur_inb -# define __inw bigsur_inw -# define __inl bigsur_inl -# define __outb bigsur_outb -# define __outw bigsur_outw -# define __outl bigsur_outl - -# define __inb_p bigsur_inb_p -# define __inw_p bigsur_inw -# define __inl_p bigsur_inl -# define __outb_p bigsur_outb_p -# define __outw_p bigsur_outw -# define __outl_p bigsur_outl - -# define __insb bigsur_insb -# define __insw bigsur_insw -# define __insl bigsur_insl -# define __outsb bigsur_outsb -# define __outsw bigsur_outsw -# define __outsl bigsur_outsl - -# define __readb generic_readb -# define __readw generic_readw -# define __readl generic_readl -# define __writeb generic_writeb -# define __writew generic_writew -# define __writel generic_writel - -# define __isa_port2addr bigsur_isa_port2addr -# define __ioremap generic_ioremap -# define __iounmap generic_iounmap - -#endif diff -puN -L include/asm-sh/io_cat68701.h include/asm-sh/io_cat68701.h~sh-merge /dev/null --- 25/include/asm-sh/io_cat68701.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,89 +0,0 @@ -/* - * include/asm-sh/io_cat68701.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * 2001 Yutarou Ebihar (ebihara@si-linux.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an AONE Corp. CAT-68701 SH7708 Borad - */ - -#ifndef _ASM_SH_IO_CAT68701_H -#define _ASM_SH_IO_CAT68701_H - -#include - -extern unsigned char cat68701_inb(unsigned long port); -extern unsigned short cat68701_inw(unsigned long port); -extern unsigned int cat68701_inl(unsigned long port); - -extern void cat68701_outb(unsigned char value, unsigned long port); -extern void cat68701_outw(unsigned short value, unsigned long port); -extern void cat68701_outl(unsigned int value, unsigned long port); - -extern unsigned char cat68701_inb_p(unsigned long port); -extern void cat68701_outb_p(unsigned char value, unsigned long port); - -extern void cat68701_insb(unsigned long port, void *addr, unsigned long count); -extern void cat68701_insw(unsigned long port, void *addr, unsigned long count); -extern void cat68701_insl(unsigned long port, void *addr, unsigned long count); -extern void cat68701_outsb(unsigned long port, const void *addr, unsigned long count); -extern void cat68701_outsw(unsigned long port, const void *addr, unsigned long count); -extern void cat68701_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char cat68701_readb(unsigned long addr); -extern unsigned short cat68701_readw(unsigned long addr); -extern unsigned int cat68701_readl(unsigned long addr); -extern void cat68701_writeb(unsigned char b, unsigned long addr); -extern void cat68701_writew(unsigned short b, unsigned long addr); -extern void cat68701_writel(unsigned int b, unsigned long addr); - -extern void * cat68701_ioremap(unsigned long offset, unsigned long size); -extern void cat68701_iounmap(void *addr); - -extern unsigned long cat68701_isa_port2addr(unsigned long offset); -extern int cat68701_irq_demux(int irq); - -extern void setup_cat68701(void); -extern void init_cat68701_IRQ(void); -extern void heartbeat_cat68701(void); - -#ifdef __WANT_IO_DEF - -# define __inb cat68701_inb -# define __inw cat68701_inw -# define __inl cat68701_inl -# define __outb cat68701_outb -# define __outw cat68701_outw -# define __outl cat68701_outl - -# define __inb_p cat68701_inb_p -# define __inw_p cat68701_inw -# define __inl_p cat68701_inl -# define __outb_p cat68701_outb_p -# define __outw_p cat68701_outw -# define __outl_p cat68701_outl - -# define __insb cat68701_insb -# define __insw cat68701_insw -# define __insl cat68701_insl -# define __outsb cat68701_outsb -# define __outsw cat68701_outsw -# define __outsl cat68701_outsl - -# define __readb cat68701_readb -# define __readw cat68701_readw -# define __readl cat68701_readl -# define __writeb cat68701_writeb -# define __writew cat68701_writew -# define __writel cat68701_writel - -# define __isa_port2addr cat68701_isa_port2addr -# define __ioremap generic_ioremap -# define __iounmap generic_iounmap - -#endif - -#endif /* _ASM_SH_IO_CAT68701_H */ diff -puN -L include/asm-sh/io_dc.h include/asm-sh/io_dc.h~sh-merge /dev/null --- 25/include/asm-sh/io_dc.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,49 +0,0 @@ -/* - * $Id: io_dc.h,v 1.1 2001/04/01 15:02:56 yaegashi Exp $ - * IO functions for SEGA Dreamcast - */ - -#ifndef _ASM_SH_IO_DREAMCAST_H -#define _ASM_SH_IO_DREAMCAST_H - -#include - -unsigned long dreamcast_isa_port2addr(unsigned long offset); - -#ifdef __WANT_IO_DEF - -# define __inb generic_inb -# define __inw generic_inw -# define __inl generic_inl -# define __outb generic_outb -# define __outw generic_outw -# define __outl generic_outl - -# define __inb_p generic_inb_p -# define __inw_p generic_inw -# define __inl_p generic_inl -# define __outb_p generic_outb_p -# define __outw_p generic_outw -# define __outl_p generic_outl - -# define __insb generic_insb -# define __insw generic_insw -# define __insl generic_insl -# define __outsb generic_outsb -# define __outsw generic_outsw -# define __outsl generic_outsl - -# define __readb generic_readb -# define __readw generic_readw -# define __readl generic_readl -# define __writeb generic_writeb -# define __writew generic_writew -# define __writel generic_writel - -# define __isa_port2addr dreamcast_isa_port2addr -# define __ioremap generic_ioremap -# define __iounmap generic_iounmap - -#endif - -#endif /* _ASM_SH_IO_DREAMCAST_H */ diff -puN -L include/asm-sh/io_ec3104.h include/asm-sh/io_ec3104.h~sh-merge /dev/null --- 25/include/asm-sh/io_ec3104.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,54 +0,0 @@ -#ifndef _ASM_SH_IO_EC3104_H -#define _ASM_SH_IO_EC3104_H - -#include -#include - -extern unsigned char ec3104_inb(unsigned long port); -extern unsigned short ec3104_inw(unsigned long port); -extern unsigned long ec3104_inl(unsigned long port); - -extern void ec3104_outb(unsigned char value, unsigned long port); -extern void ec3104_outw(unsigned short value, unsigned long port); -extern void ec3104_outl(unsigned long value, unsigned long port); - -extern int ec3104_irq_demux(int irq); - -#ifdef __WANT_IO_DEF - -# define __inb ec3104_inb -# define __inw ec3104_inw -# define __inl ec3104_inl -# define __outb ec3104_outb -# define __outw ec3104_outw -# define __outl ec3104_outl - -# define __inb_p ec3104_inb -# define __inw_p ec3104_inw -# define __inl_p ec3104_inl -# define __outb_p ec3104_outb -# define __outw_p ec3104_outw -# define __outl_p ec3104_outl - -# define __insb generic_insb -# define __insw generic_insw -# define __insl generic_insl -# define __outsb generic_outsb -# define __outsw generic_outsw -# define __outsl generic_outsl - -# define __readb generic_readb -# define __readw generic_readw -# define __readl generic_readl -# define __writeb generic_writeb -# define __writew generic_writew -# define __writel generic_writel - -# define __isa_port2addr generic_isa_port2addr -# define __ioremap generic_ioremap -# define __ioremap_nocache generic_ioremap_nocache -# define __iounmap generic_iounmap - -#endif - -#endif /* _ASM_SH_IO_EC3104_H */ diff -puN -L include/asm-sh/io_generic.h include/asm-sh/io_generic.h~sh-merge /dev/null --- 25/include/asm-sh/io_generic.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,51 +0,0 @@ -/* - * include/asm-sh/io_generic.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Generic IO functions - */ - -#ifndef _ASM_SH_IO_GENERIC_H -#define _ASM_SH_IO_GENERIC_H - -extern unsigned long generic_io_base; - -extern unsigned char generic_inb(unsigned long port); -extern unsigned short generic_inw(unsigned long port); -extern unsigned int generic_inl(unsigned long port); - -extern void generic_outb(unsigned char value, unsigned long port); -extern void generic_outw(unsigned short value, unsigned long port); -extern void generic_outl(unsigned int value, unsigned long port); - -extern unsigned char generic_inb_p(unsigned long port); -extern unsigned short generic_inw_p(unsigned long port); -extern unsigned int generic_inl_p(unsigned long port); -extern void generic_outb_p(unsigned char value, unsigned long port); -extern void generic_outw_p(unsigned short value, unsigned long port); -extern void generic_outl_p(unsigned int value, unsigned long port); - -extern void generic_insb(unsigned long port, void *addr, unsigned long count); -extern void generic_insw(unsigned long port, void *addr, unsigned long count); -extern void generic_insl(unsigned long port, void *addr, unsigned long count); -extern void generic_outsb(unsigned long port, const void *addr, unsigned long count); -extern void generic_outsw(unsigned long port, const void *addr, unsigned long count); -extern void generic_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char generic_readb(unsigned long addr); -extern unsigned short generic_readw(unsigned long addr); -extern unsigned int generic_readl(unsigned long addr); -extern void generic_writeb(unsigned char b, unsigned long addr); -extern void generic_writew(unsigned short b, unsigned long addr); -extern void generic_writel(unsigned int b, unsigned long addr); - -extern void *generic_ioremap(unsigned long offset, unsigned long size); -extern void generic_iounmap(void *addr); - -extern unsigned long generic_isa_port2addr(unsigned long offset); - -#endif /* _ASM_SH_IO_GENERIC_H */ diff -puN include/asm-sh/io.h~sh-merge include/asm-sh/io.h --- 25/include/asm-sh/io.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/io.h 2004-01-09 21:32:27.000000000 -0800 @@ -18,8 +18,7 @@ /* * We follow the Alpha convention here: - * __inb expands to an inline function call (which either calls via the - * mach_vec if generic, or a machine specific implementation) + * __inb expands to an inline function call (which calls via the mv) * _inb is a real function call (note ___raw fns are _ version of __raw) * inb by default expands to _inb, but the machine specific code may * define it to __inb if it chooses. @@ -27,6 +26,8 @@ #include #include +#include +#include #include /* @@ -35,11 +36,13 @@ */ #ifdef __KERNEL__ -#if defined(CONFIG_SH_GENERIC) || defined(CONFIG_SH_CQREEK) || defined(CONFIG_SH_UNKNOWN) - -/* In a generic kernel, we always go through the machine vector. */ - -#include +/* + * Since boards are able to define their own set of I/O routines through + * their respective machine vector, we always wrap through the mv. + * + * Also, in the event that a board hasn't provided its own definition for + * a given routine, it will be wrapped to generic code at run-time. + */ # define __inb(p) sh_mv.mv_inb((p)) # define __inw(p) sh_mv.mv_inw((p)) @@ -55,12 +58,12 @@ # define __outw_p(x,p) sh_mv.mv_outw_p((x),(p)) # define __outl_p(x,p) sh_mv.mv_outl_p((x),(p)) -#define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c)) -#define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c)) -#define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c)) -#define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c)) -#define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c)) -#define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c)) +# define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c)) +# define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c)) +# define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c)) +# define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c)) +# define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c)) +# define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c)) # define __readb(a) sh_mv.mv_readb((a)) # define __readw(a) sh_mv.mv_readw((a)) @@ -102,205 +105,31 @@ # define __raw_writew __writew # define __raw_writel __writel -#else - -/* Control operations through platform specific headers */ -# define __WANT_IO_DEF - -# include - -#undef __WANT_IO_DEF - -#endif /* GENERIC */ -#endif /* __KERNEL__ */ - -/* These are always function calls, in both kernel and user space */ -extern unsigned char _inb (unsigned long port); -extern unsigned short _inw (unsigned long port); -extern unsigned int _inl (unsigned long port); -extern void _outb (unsigned char b, unsigned long port); -extern void _outw (unsigned short w, unsigned long port); -extern void _outl (unsigned int l, unsigned long port); -extern unsigned char _inb_p (unsigned long port); -extern unsigned short _inw_p (unsigned long port); -extern unsigned int _inl_p (unsigned long port); -extern void _outb_p (unsigned char b, unsigned long port); -extern void _outw_p (unsigned short w, unsigned long port); -extern void _outl_p (unsigned int l, unsigned long port); -extern void _insb (unsigned long port, void *dst, unsigned long count); -extern void _insw (unsigned long port, void *dst, unsigned long count); -extern void _insl (unsigned long port, void *dst, unsigned long count); -extern void _outsb (unsigned long port, const void *src, unsigned long count); -extern void _outsw (unsigned long port, const void *src, unsigned long count); -extern void _outsl (unsigned long port, const void *src, unsigned long count); -extern unsigned char _readb(unsigned long addr); -extern unsigned short _readw(unsigned long addr); -extern unsigned int _readl(unsigned long addr); -extern void _writeb(unsigned char b, unsigned long addr); -extern void _writew(unsigned short b, unsigned long addr); -extern void _writel(unsigned int b, unsigned long addr); - -#ifdef __KERNEL__ -extern unsigned char ___raw_readb(unsigned long addr); -extern unsigned short ___raw_readw(unsigned long addr); -extern unsigned int ___raw_readl(unsigned long addr); -extern void ___raw_writeb(unsigned char b, unsigned long addr); -extern void ___raw_writew(unsigned short b, unsigned long addr); -extern void ___raw_writel(unsigned int b, unsigned long addr); -#endif - -#ifdef __KERNEL__ /* * The platform header files may define some of these macros to use * the inlined versions where appropriate. These macros may also be * redefined by userlevel programs. */ -#ifndef inb -# define inb(p) _inb(p) -#endif -#ifndef inw -# define inw(p) _inw(p) -#endif -#ifndef inl -# define inl(p) _inl(p) -#endif - -#ifndef outb -# define outb(b,p) _outb((b),(p)) -#endif -#ifndef outw -# define outw(w,p) _outw((w),(p)) -#endif -#ifndef outl -# define outl(l,p) _outl((l),(p)) -#endif - -#ifndef inb_p -# define inb_p _inb_p -#endif -#ifndef inw_p -# define inw_p _inw_p -#endif -#ifndef inl_p -# define inl_p _inl_p -#endif - -#ifndef outb_p -# define outb_p _outb_p -#endif -#ifndef outw_p -# define outw_p _outw_p -#endif -#ifndef outl_p -# define outl_p _outl_p -#endif - -#ifndef insb -# define insb(p,d,c) _insb((p),(d),(c)) -#endif -#ifndef insw -# define insw(p,d,c) _insw((p),(d),(c)) -#endif -#ifndef insl -# define insl(p,d,c) _insl((p),(d),(c)) -#endif -#ifndef outsb -# define outsb(p,s,c) _outsb((p),(s),(c)) -#endif -#ifndef outsw -# define outsw(p,s,c) _outsw((p),(s),(c)) -#endif -#ifndef outsl -# define outsl(p,s,c) _outsl((p),(s),(c)) -#endif - #ifdef __raw_readb -# define readb(a) ({ unsigned long r_ = __raw_readb(a); mb(); r_; }) +# define readb(a) ({ unsigned long r_ = __raw_readb((unsigned long)a); mb(); r_; }) #endif #ifdef __raw_readw -# define readw(a) ({ unsigned long r_ = __raw_readw(a); mb(); r_; }) +# define readw(a) ({ unsigned long r_ = __raw_readw((unsigned long)a); mb(); r_; }) #endif #ifdef __raw_readl -# define readl(a) ({ unsigned long r_ = __raw_readl(a); mb(); r_; }) +# define readl(a) ({ unsigned long r_ = __raw_readl((unsigned long)a); mb(); r_; }) #endif #ifdef __raw_writeb -# define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); }) +# define writeb(v,a) ({ __raw_writeb((v),(unsigned long)(a)); mb(); }) #endif #ifdef __raw_writew -# define writew(v,a) ({ __raw_writew((v),(a)); mb(); }) +# define writew(v,a) ({ __raw_writew((v),(unsigned long)(a)); mb(); }) #endif #ifdef __raw_writel -# define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) -#endif - -#ifndef __raw_readb -# define __raw_readb(a) ___raw_readb((unsigned long)(a)) -#endif -#ifndef __raw_readw -# define __raw_readw(a) ___raw_readw((unsigned long)(a)) -#endif -#ifndef __raw_readl -# define __raw_readl(a) ___raw_readl((unsigned long)(a)) +# define writel(v,a) ({ __raw_writel((v),(unsigned long)(a)); mb(); }) #endif -#ifndef __raw_writeb -# define __raw_writeb(v,a) ___raw_writeb((v),(unsigned long)(a)) -#endif -#ifndef __raw_writew -# define __raw_writew(v,a) ___raw_writew((v),(unsigned long)(a)) -#endif -#ifndef __raw_writel -# define __raw_writel(v,a) ___raw_writel((v),(unsigned long)(a)) -#endif - -#ifndef readb -# define readb(a) _readb((unsigned long)(a)) -#endif -#ifndef readw -# define readw(a) _readw((unsigned long)(a)) -#endif -#ifndef readl -# define readl(a) _readl((unsigned long)(a)) -#endif - -#ifndef writeb -# define writeb(v,a) _writeb((v),(unsigned long)(a)) -#endif -#ifndef writew -# define writew(v,a) _writew((v),(unsigned long)(a)) -#endif -#ifndef writel -# define writel(v,a) _writel((v),(unsigned long)(a)) -#endif - -#else - -/* Userspace declarations. */ - -extern unsigned char inb(unsigned long port); -extern unsigned short inw(unsigned long port); -extern unsigned int inl(unsigned long port); -extern void outb(unsigned char b, unsigned long port); -extern void outw(unsigned short w, unsigned long port); -extern void outl(unsigned int l, unsigned long port); -extern void insb(unsigned long port, void *dst, unsigned long count); -extern void insw(unsigned long port, void *dst, unsigned long count); -extern void insl(unsigned long port, void *dst, unsigned long count); -extern void outsb(unsigned long port, const void *src, unsigned long count); -extern void outsw(unsigned long port, const void *src, unsigned long count); -extern void outsl(unsigned long port, const void *src, unsigned long count); -extern unsigned char readb(unsigned long addr); -extern unsigned short readw(unsigned long addr); -extern unsigned long readl(unsigned long addr); -extern void writeb(unsigned char b, unsigned long addr); -extern void writew(unsigned short b, unsigned long addr); -extern void writel(unsigned int b, unsigned long addr); - -#endif /* __KERNEL__ */ - -#ifdef __KERNEL__ - /* * If the platform has PC-like I/O, this function converts the offset into * an address. @@ -310,6 +139,20 @@ static __inline__ unsigned long isa_port return __isa_port2addr(offset); } +/* + * This function provides a method for the generic case where a board-specific + * isa_port2addr simply needs to return the port + some arbitrary port base. + * + * We use this at board setup time to implicitly set the port base, and + * as a result, we can use the generic isa_port2addr. + */ +static inline void __set_io_port_base(unsigned long pbase) +{ + extern unsigned long generic_io_base; + + generic_io_base = pbase; +} + #define isa_readb(a) readb(isa_port2addr(a)) #define isa_readw(a) readw(isa_port2addr(a)) #define isa_readl(a) readl(isa_port2addr(a)) @@ -361,8 +204,6 @@ static __inline__ void ctrl_outl(unsigne #define IO_SPACE_LIMIT 0xffffffff -#include - /* * Change virtual addresses to physical addresses and vv. * These are trivial on the 1:1 Linux/SuperH mapping @@ -449,4 +290,5 @@ out: __flush_wback_region(_start,_size) #endif /* __KERNEL__ */ + #endif /* __ASM_SH_IO_H */ diff -puN -L include/asm-sh/io_hd64461.h include/asm-sh/io_hd64461.h~sh-merge /dev/null --- 25/include/asm-sh/io_hd64461.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,73 +0,0 @@ -/* - * include/asm-sh/io_hd64461.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an HD64461 - */ - -#ifndef _ASM_SH_IO_HD64461_H -#define _ASM_SH_IO_HD64461_H - -#include - -extern unsigned char hd64461_inb(unsigned long port); -extern unsigned short hd64461_inw(unsigned long port); -extern unsigned int hd64461_inl(unsigned long port); - -extern void hd64461_outb(unsigned char value, unsigned long port); -extern void hd64461_outw(unsigned short value, unsigned long port); -extern void hd64461_outl(unsigned int value, unsigned long port); - -extern unsigned char hd64461_inb_p(unsigned long port); -extern void hd64461_outb_p(unsigned char value, unsigned long port); - -extern void hd64461_insb(unsigned long port, void *addr, unsigned long count); -extern void hd64461_insw(unsigned long port, void *addr, unsigned long count); -extern void hd64461_insl(unsigned long port, void *addr, unsigned long count); -extern void hd64461_outsb(unsigned long port, const void *addr, unsigned long count); -extern void hd64461_outsw(unsigned long port, const void *addr, unsigned long count); -extern void hd64461_outsl(unsigned long port, const void *addr, unsigned long count); -extern int hd64461_irq_demux(int irq); - -#ifdef __WANT_IO_DEF - -# define __inb hd64461_inb -# define __inw hd64461_inw -# define __inl hd64461_inl -# define __outb hd64461_outb -# define __outw hd64461_outw -# define __outl hd64461_outl - -# define __inb_p hd64461_inb_p -# define __inw_p hd64461_inw -# define __inl_p hd64461_inl -# define __outb_p hd64461_outb_p -# define __outw_p hd64461_outw -# define __outl_p hd64461_outl - -# define __insb hd64461_insb -# define __insw hd64461_insw -# define __insl hd64461_insl -# define __outsb hd64461_outsb -# define __outsw hd64461_outsw -# define __outsl hd64461_outsl - -# define __readb generic_readb -# define __readw generic_readw -# define __readl generic_readl -# define __writeb generic_writeb -# define __writew generic_writew -# define __writel generic_writel - -# define __isa_port2addr generic_isa_port2addr -# define __ioremap generic_ioremap -# define __ioremap_nocache generic_ioremap_nocache -# define __iounmap generic_iounmap - -#endif - -#endif /* _ASM_SH_IO_HD64461_H */ diff -puN -L include/asm-sh/io_hd64465.h include/asm-sh/io_hd64465.h~sh-merge /dev/null --- 25/include/asm-sh/io_hd64465.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,90 +0,0 @@ -/* - * include/asm-sh/io_hd64465.h - * - * By Greg Banks - * (c) 2000 PocketPenguins Inc. - * - * Derived from io_hd64461.h, which bore the message: - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an HD64465 "Windows CE Intelligent Peripheral Controller". - */ - -#ifndef _ASM_SH_IO_HD64465_H -#define _ASM_SH_IO_HD64465_H - -#include - -extern unsigned char hd64465_inb(unsigned long port); -extern unsigned short hd64465_inw(unsigned long port); -extern unsigned int hd64465_inl(unsigned long port); - -extern void hd64465_outb(unsigned char value, unsigned long port); -extern void hd64465_outw(unsigned short value, unsigned long port); -extern void hd64465_outl(unsigned int value, unsigned long port); - -extern unsigned char hd64465_inb_p(unsigned long port); -extern void hd64465_outb_p(unsigned char value, unsigned long port); - -extern void hd64465_insb(unsigned long port, void *addr, unsigned long count); -extern void hd64465_insw(unsigned long port, void *addr, unsigned long count); -extern void hd64465_insl(unsigned long port, void *addr, unsigned long count); -extern void hd64465_outsb(unsigned long port, const void *addr, unsigned long count); -extern void hd64465_outsw(unsigned long port, const void *addr, unsigned long count); -extern void hd64465_outsl(unsigned long port, const void *addr, unsigned long count); -extern unsigned long hd64465_isa_port2addr(unsigned long offset); -extern int hd64465_irq_demux(int irq); -/* Provision for generic secondary demux step -- used by PCMCIA code */ -extern void hd64465_register_irq_demux(int irq, - int (*demux)(int irq, void *dev), void *dev); -extern void hd64465_unregister_irq_demux(int irq); -/* Set this variable to 1 to see port traffic */ -extern int hd64465_io_debug; -/* Map a range of ports to a range of kernel virtual memory. - */ -extern void hd64465_port_map(unsigned short baseport, unsigned int nports, - unsigned long addr, unsigned char shift); -extern void hd64465_port_unmap(unsigned short baseport, unsigned int nports); - - -#ifdef __WANT_IO_DEF - -# define __inb hd64465_inb -# define __inw hd64465_inw -# define __inl hd64465_inl -# define __outb hd64465_outb -# define __outw hd64465_outw -# define __outl hd64465_outl - -# define __inb_p hd64465_inb_p -# define __inw_p hd64465_inw -# define __inl_p hd64465_inl -# define __outb_p hd64465_outb_p -# define __outw_p hd64465_outw -# define __outl_p hd64465_outl - -# define __insb hd64465_insb -# define __insw hd64465_insw -# define __insl hd64465_insl -# define __outsb hd64465_outsb -# define __outsw hd64465_outsw -# define __outsl hd64465_outsl - -# define __readb generic_readb -# define __readw generic_readw -# define __readl generic_readl -# define __writeb generic_writeb -# define __writew generic_writew -# define __writel generic_writel - -# define __isa_port2addr hd64465_isa_port2addr -# define __ioremap generic_ioremap -# define __iounmap generic_iounmap - - -#endif - -#endif /* _ASM_SH_IO_HD64465_H */ diff -puN -L include/asm-sh/io_se.h include/asm-sh/io_se.h~sh-merge /dev/null --- 25/include/asm-sh/io_se.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,80 +0,0 @@ -/* - * include/asm-sh/io_se.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an Hitachi SolutionEngine - */ - -#ifndef _ASM_SH_IO_SE_H -#define _ASM_SH_IO_SE_H - -#include - -extern unsigned char se_inb(unsigned long port); -extern unsigned short se_inw(unsigned long port); -extern unsigned int se_inl(unsigned long port); - -extern void se_outb(unsigned char value, unsigned long port); -extern void se_outw(unsigned short value, unsigned long port); -extern void se_outl(unsigned int value, unsigned long port); - -extern unsigned char se_inb_p(unsigned long port); -extern void se_outb_p(unsigned char value, unsigned long port); - -extern void se_insb(unsigned long port, void *addr, unsigned long count); -extern void se_insw(unsigned long port, void *addr, unsigned long count); -extern void se_insl(unsigned long port, void *addr, unsigned long count); -extern void se_outsb(unsigned long port, const void *addr, unsigned long count); -extern void se_outsw(unsigned long port, const void *addr, unsigned long count); -extern void se_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char se_readb(unsigned long addr); -extern unsigned short se_readw(unsigned long addr); -extern unsigned int se_readl(unsigned long addr); -extern void se_writeb(unsigned char b, unsigned long addr); -extern void se_writew(unsigned short b, unsigned long addr); -extern void se_writel(unsigned int b, unsigned long addr); - -extern unsigned long se_isa_port2addr(unsigned long offset); - -#ifdef __WANT_IO_DEF - -# define __inb se_inb -# define __inw se_inw -# define __inl se_inl -# define __outb se_outb -# define __outw se_outw -# define __outl se_outl - -# define __inb_p se_inb_p -# define __inw_p se_inw -# define __inl_p se_inl -# define __outb_p se_outb_p -# define __outw_p se_outw -# define __outl_p se_outl - -# define __insb se_insb -# define __insw se_insw -# define __insl se_insl -# define __outsb se_outsb -# define __outsw se_outsw -# define __outsl se_outsl - -# define __readb se_readb -# define __readw se_readw -# define __readl se_readl -# define __writeb se_writeb -# define __writew se_writew -# define __writel se_writel - -# define __isa_port2addr se_isa_port2addr -# define __ioremap generic_ioremap -# define __iounmap generic_iounmap - -#endif - -#endif /* _ASM_SH_IO_SE_H */ diff -puN -L include/asm-sh/io_sh2000.h include/asm-sh/io_sh2000.h~sh-merge /dev/null --- 25/include/asm-sh/io_sh2000.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,56 +0,0 @@ -/* - * include/asm-sh/io_sh2000.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * 2001 SUGIOKA Toshinobu (sugioka@itonet.co.jp) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for use when we don't know what machine we are on - */ - -#ifndef _ASM_SH_IO_SH2000_H -#define _ASM_SH_IO_SH2000_H - -#include - -unsigned long sh2000_isa_port2addr(unsigned long offset); - -#ifdef __WANT_IO_DEF - -# define __inb generic_inb -# define __inw generic_inw -# define __inl generic_inl -# define __outb generic_outb -# define __outw generic_outw -# define __outl generic_outl - -# define __inb_p generic_inb_p -# define __inw_p generic_inw -# define __inl_p generic_inl -# define __outb_p generic_outb_p -# define __outw_p generic_outw -# define __outl_p generic_outl - -# define __insb generic_insb -# define __insw generic_insw -# define __insl generic_insl -# define __outsb generic_outsb -# define __outsw generic_outsw -# define __outsl generic_outsl - -# define __readb generic_readb -# define __readw generic_readw -# define __readl generic_readl -# define __writeb generic_writeb -# define __writew generic_writew -# define __writel generic_writel - -# define __isa_port2addr sh2000_isa_port2addr -# define __ioremap generic_ioremap -# define __iounmap generic_iounmap - -#endif - -#endif /* _ASM_SH_IO_SH2000_H */ diff -puN -L include/asm-sh/io_unknown.h include/asm-sh/io_unknown.h~sh-merge /dev/null --- 25/include/asm-sh/io_unknown.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,84 +0,0 @@ -/* - * include/asm-sh/io_unknown.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for use when we don't know what machine we are on - */ - -#ifndef _ASM_SH_IO_UNKNOWN_H -#define _ASM_SH_IO_UNKNOWN_H - -extern unsigned char unknown_inb(unsigned long port); -extern unsigned short unknown_inw(unsigned long port); -extern unsigned int unknown_inl(unsigned long port); - -extern void unknown_outb(unsigned char value, unsigned long port); -extern void unknown_outw(unsigned short value, unsigned long port); -extern void unknown_outl(unsigned int value, unsigned long port); - -extern unsigned char unknown_inb_p(unsigned long port); -extern unsigned short unknown_inw_p(unsigned long port); -extern unsigned int unknown_inl_p(unsigned long port); -extern void unknown_outb_p(unsigned char value, unsigned long port); -extern void unknown_outw_p(unsigned short value, unsigned long port); -extern void unknown_outl_p(unsigned int value, unsigned long port); - -extern void unknown_insb(unsigned long port, void *addr, unsigned long count); -extern void unknown_insw(unsigned long port, void *addr, unsigned long count); -extern void unknown_insl(unsigned long port, void *addr, unsigned long count); -extern void unknown_outsb(unsigned long port, const void *addr, unsigned long count); -extern void unknown_outsw(unsigned long port, const void *addr, unsigned long count); -extern void unknown_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char unknown_readb(unsigned long addr); -extern unsigned short unknown_readw(unsigned long addr); -extern unsigned int unknown_readl(unsigned long addr); -extern void unknown_writeb(unsigned char b, unsigned long addr); -extern void unknown_writew(unsigned short b, unsigned long addr); -extern void unknown_writel(unsigned int b, unsigned long addr); - -extern unsigned long unknown_isa_port2addr(unsigned long offset); -extern void *unknown_ioremap(unsigned long offset, unsigned long size); -extern void unknown_iounmap(void *addr); - -#ifdef __WANT_IO_DEF - -# define __inb unknown_inb -# define __inw unknown_inw -# define __inl unknown_inl -# define __outb unknown_outb -# define __outw unknown_outw -# define __outl unknown_outl - -# define __inb_p unknown_inb_p -# define __inw_p unknown_inw_p -# define __inl_p unknown_inl_p -# define __outb_p unknown_outb_p -# define __outw_p unknown_outw_p -# define __outl_p unknown_outl_p - -# define __insb unknown_insb -# define __insw unknown_insw -# define __insl unknown_insl -# define __outsb unknown_outsb -# define __outsw unknown_outsw -# define __outsl unknown_outsl - -# define __readb unknown_readb -# define __readw unknown_readw -# define __readl unknown_readl -# define __writeb unknown_writeb -# define __writew unknown_writew -# define __writel unknown_writel - -# define __isa_port2addr unknown_isa_port2addr -# define __ioremap unknown_ioremap -# define __iounmap unknown_iounmap - -#endif - -#endif /* _ASM_SH_IO_UNKNOWN_H */ diff -puN include/asm-sh/ipc.h~sh-merge include/asm-sh/ipc.h --- 25/include/asm-sh/ipc.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/ipc.h 2004-01-09 21:32:27.000000000 -0800 @@ -7,7 +7,7 @@ * See arch/i386/kernel/sys_i386.c for ugly details.. */ struct ipc_kludge { - struct msgbuf *msgp; + struct msgbuf __user *msgp; long msgtyp; }; diff -puN include/asm-sh/irq.h~sh-merge include/asm-sh/irq.h --- 25/include/asm-sh/irq.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/irq.h 2004-01-09 21:32:27.000000000 -0800 @@ -7,6 +7,7 @@ * * Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi * Copyright (C) 2000 Kazumoto Kojima + * Copyright (C) 2003 Paul Mundt * */ @@ -21,6 +22,7 @@ #define INTC_IPRA 0xffd00004UL #define INTC_IPRB 0xffd00008UL #define INTC_IPRC 0xffd0000cUL +#define INTC_IPRD 0xffd00010UL #endif #define TIMER_IRQ 16 @@ -46,6 +48,10 @@ #define DMTE1_IRQ 35 #define DMTE2_IRQ 36 #define DMTE3_IRQ 37 +#define DMTE4_IRQ 44 /* 7751R only */ +#define DMTE5_IRQ 45 /* 7751R only */ +#define DMTE6_IRQ 46 /* 7751R only */ +#define DMTE7_IRQ 47 /* 7751R only */ #define DMAE_IRQ 38 #define DMA_IPR_ADDR INTC_IPRC #define DMA_IPR_POS 2 @@ -123,6 +129,8 @@ # define ONCHIP_NR_IRQS 48 // Actually 44 # elif defined(CONFIG_CPU_SUBTYPE_SH7751) # define ONCHIP_NR_IRQS 72 +# elif defined(CONFIG_CPU_SUBTYPE_SH7760) +# define ONCHIP_NR_IRQS 110 # elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) # define ONCHIP_NR_IRQS 144 # endif @@ -194,7 +202,22 @@ extern void make_ipr_irq(unsigned int ir int pos, int priority); extern void make_imask_irq(unsigned int irq); -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) +#if defined(CONFIG_CPU_SUBTYPE_SH7604) +#define INTC_IPRA 0xfffffee2UL +#define INTC_IPRB 0xfffffe60UL + +#define INTC_VCRA 0xfffffe62UL +#define INTC_VCRB 0xfffffe64UL +#define INTC_VCRC 0xfffffe66UL +#define INTC_VCRD 0xfffffe68UL + +#define INTC_VCRWDT 0xfffffee4UL +#define INTC_VCRDIV 0xffffff0cUL +#define INTC_VCRDMA0 0xffffffa0UL +#define INTC_VCRDMA1 0xffffffa8UL + +#define INTC_ICR 0xfffffee0UL +#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) #define INTC_IRR0 0xa4000004UL #define INTC_IRR1 0xa4000006UL #define INTC_IRR2 0xa4000008UL @@ -293,61 +316,12 @@ extern void make_intc2_irq(unsigned int #endif -#ifdef CONFIG_SH_GENERIC - -static __inline__ int irq_demux(int irq) -{ - if (sh_mv.mv_irq_demux) { - irq = sh_mv.mv_irq_demux(irq); - } - return __irq_demux(irq); -} - -#elif defined(CONFIG_SH_BIGSUR) - -extern int bigsur_irq_demux(int irq); -#define irq_demux(irq) bigsur_irq_demux(irq) - -#elif defined(CONFIG_HD64461) - -extern int hd64461_irq_demux(int irq); -#define irq_demux(irq) hd64461_irq_demux(irq) - -#elif defined(CONFIG_HD64465) - -extern int hd64465_irq_demux(int irq); -#define irq_demux(irq) hd64465_irq_demux(irq) - -#elif defined(CONFIG_SH_EC3104) - -extern int ec3104_irq_demux(int irq); -#define irq_demux ec3104_irq_demux - -#elif defined(CONFIG_SH_CAT68701) - -extern int cat68701_irq_demux(int irq); -#define irq_demux cat68701_irq_demux - -#elif defined(CONFIG_SH_DREAMCAST) - -extern int systemasic_irq_demux(int irq); -#define irq_demux systemasic_irq_demux - -#elif defined(CONFIG_SH_MPC1211) - -extern int mpc1211_irq_demux(int irq); -#define irq_demux mpc1211_irq_demux - -#else - -#define irq_demux(irq) __irq_demux(irq) - -#endif - -static __inline__ int irq_canonicalize(int irq) +static inline int generic_irq_demux(int irq) { return irq; } +#define irq_canonicalize(irq) (irq) +#define irq_demux(irq) __irq_demux(sh_mv.mv_irq_demux(irq)) #endif /* __ASM_SH_IRQ_H */ diff -puN -L include/asm-sh/keyboard-ec3104.h include/asm-sh/keyboard-ec3104.h~sh-merge /dev/null --- 25/include/asm-sh/keyboard-ec3104.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,17 +0,0 @@ -extern unsigned char ec3104_kbd_sysrq_xlate[]; -extern int ec3104_kbd_setkeycode(unsigned int scancode, unsigned int keycode); -extern int ec3104_kbd_getkeycode(unsigned int scancode); -extern int ec3104_kbd_translate(unsigned char, unsigned char *, char); -extern char ec3104_kbd_unexpected_up(unsigned char); -extern void ec3104_kbd_leds(unsigned char); -extern void ec3104_kbd_init_hw(void); - -#define SYSRQ_KEY 0x54 - -#define kbd_sysrq_xlate ec3104_kbd_sysrq_xlate -#define kbd_setkeycode ec3104_kbd_setkeycode -#define kbd_getkeycode ec3104_kbd_getkeycode -#define kbd_translate ec3104_kbd_translate -#define kbd_unexpected_up ec3104_kbd_unexpected_up -#define kbd_leds ec3104_kbd_leds -#define kbd_init_hw ec3104_kbd_init_hw diff -puN include/asm-sh/kgdb.h~sh-merge include/asm-sh/kgdb.h --- 25/include/asm-sh/kgdb.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/kgdb.h 2004-01-09 21:32:27.000000000 -0800 @@ -18,6 +18,8 @@ #include +struct console; + /* Same as pt_regs but has vbr in place of syscall_nr */ struct kgdb_regs { unsigned long regs[16]; @@ -89,6 +91,18 @@ extern int setjmp(jmp_buf __jmpb); } \ } while (0) +/* KGDB should be able to flush all kernel text space */ +#if defined(CONFIG_CPU_SH4) +#define kgdb_flush_icache_range(start, end) \ +{ \ + extern void __flush_purge_region(void *, int); \ + __flush_purge_region((void*)(start), (int)(end) - (int)(start));\ + flush_icache_range((start), (end)); \ +} +#else +#define kgdb_flush_icache_range(start, end) do { } while (0) +#endif + /* Kernel assert macros */ #ifdef CONFIG_KGDB_KERNEL_ASSERTS diff -puN /dev/null include/asm-sh/local.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/local.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,7 @@ +#ifndef __ASM_SH_LOCAL_H +#define __ASM_SH_LOCAL_H + +#include + +#endif /* __ASM_SH_LOCAL_H */ + diff -puN include/asm-sh/machvec.h~sh-merge include/asm-sh/machvec.h --- 25/include/asm-sh/machvec.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/machvec.h 2004-01-09 21:32:27.000000000 -0800 @@ -15,13 +15,12 @@ #include #include +#include struct timeval; struct sh_machine_vector { - const char *mv_name; - int mv_nr_irqs; unsigned char (*mv_inb)(unsigned long); @@ -59,15 +58,10 @@ struct sh_machine_vector int (*mv_irq_demux)(int irq); - void (*mv_init_arch)(void); void (*mv_init_irq)(void); void (*mv_init_pci)(void); - void (*mv_kill_arch)(int); void (*mv_heartbeat)(void); - - void (*mv_rtc_gettimeofday)(struct timespec *ts); - int (*mv_rtc_settimeofday)(const time_t secs); }; extern struct sh_machine_vector sh_mv; diff -puN include/asm-sh/mc146818rtc.h~sh-merge include/asm-sh/mc146818rtc.h --- 25/include/asm-sh/mc146818rtc.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/mc146818rtc.h 2004-01-09 21:32:27.000000000 -0800 @@ -23,6 +23,15 @@ #define CMOS_READ(addr) __CMOS_READ(addr,b) #define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,b) +#elif defined(CONFIG_SH_SECUREEDGE5410) +#include + +#define RTC_PORT(n) SECUREEDGE_IOPORT_ADDR +#define CMOS_READ(addr) secureedge5410_cmos_read(addr) +#define CMOS_WRITE(val,addr) secureedge5410_cmos_write(val,addr) +extern unsigned char secureedge5410_cmos_read(int addr); +extern void secureedge5410_cmos_write(unsigned char val, int addr); + #elif defined(CONFIG_CPU_SH4) #define RTC_PORT(n) (R64CNT+(n)*4) #define CMOS_READ(addr) __CMOS_READ(addr,w) diff -puN include/asm-sh/module.h~sh-merge include/asm-sh/module.h --- 25/include/asm-sh/module.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/module.h 2004-01-09 21:32:27.000000000 -0800 @@ -14,7 +14,9 @@ struct mod_arch_specific { #define Elf_Ehdr Elf32_Ehdr #ifdef CONFIG_CPU_LITTLE_ENDIAN -# ifdef CONFIG_CPU_SH3 +# ifdef CONFIG_CPU_SH2 +# define MODULE_PROC_FAMILY "SH2LE " +# elif defined CONFIG_CPU_SH3 # define MODULE_PROC_FAMILY "SH3LE " # elif defined CONFIG_CPU_SH4 # define MODULE_PROC_FAMILY "SH4LE " @@ -22,7 +24,9 @@ struct mod_arch_specific { # error unknown processor family # endif #else -# ifdef CONFIG_CPU_SH3 +# ifdef CONFIG_CPU_SH2 +# define MODULE_PROC_FAMILY "SH2BE " +# elif defined CONFIG_CPU_SH3 # define MODULE_PROC_FAMILY "SH3BE " # elif defined CONFIG_CPU_SH4 # define MODULE_PROC_FAMILY "SH4BE " diff -puN include/asm-sh/mpc1211/io.h~sh-merge include/asm-sh/mpc1211/io.h --- 25/include/asm-sh/mpc1211/io.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/mpc1211/io.h 2004-01-09 21:32:27.000000000 -0800 @@ -10,77 +10,13 @@ #define _ASM_SH_IO_MPC1211_H #include -#include -extern unsigned char mpc1211_inb(unsigned long port); -extern unsigned short mpc1211_inw(unsigned long port); -extern unsigned int mpc1211_inl(unsigned long port); - -extern void mpc1211_outb(unsigned char value, unsigned long port); -extern void mpc1211_outw(unsigned short value, unsigned long port); -extern void mpc1211_outl(unsigned int value, unsigned long port); - -extern unsigned char mpc1211_inb_p(unsigned long port); -extern void mpc1211_outb_p(unsigned char value, unsigned long port); - -extern void mpc1211_insb(unsigned long port, void *addr, unsigned long count); -extern void mpc1211_insw(unsigned long port, void *addr, unsigned long count); -extern void mpc1211_insl(unsigned long port, void *addr, unsigned long count); -extern void mpc1211_outsb(unsigned long port, const void *addr, unsigned long count); -extern void mpc1211_outsw(unsigned long port, const void *addr, unsigned long count); -extern void mpc1211_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char mpc1211_readb(unsigned long addr); -extern unsigned short mpc1211_readw(unsigned long addr); -extern unsigned int mpc1211_readl(unsigned long addr); -extern void mpc1211_writeb(unsigned char b, unsigned long addr); -extern void mpc1211_writew(unsigned short b, unsigned long addr); -extern void mpc1211_writel(unsigned int b, unsigned long addr); - -extern unsigned long mpc1211_isa_port2addr(unsigned long offset); extern int mpc1211_irq_demux(int irq); -extern void setup_mpc1211(void); extern void init_mpc1211_IRQ(void); extern void heartbeat_mpc1211(void); extern void mpc1211_rtc_gettimeofday(struct timeval *tv); extern int mpc1211_rtc_settimeofday(const struct timeval *tv); -#ifdef __WANT_IO_DEF - -# define __inb mpc1211_inb -# define __inw mpc1211_inw -# define __inl mpc1211_inl -# define __outb mpc1211_outb -# define __outw mpc1211_outw -# define __outl mpc1211_outl - -# define __inb_p mpc1211_inb_p -# define __inw_p mpc1211_inw -# define __inl_p mpc1211_inl -# define __outb_p mpc1211_outb_p -# define __outw_p mpc1211_outw -# define __outl_p mpc1211_outl - -# define __insb mpc1211_insb -# define __insw mpc1211_insw -# define __insl mpc1211_insl -# define __outsb mpc1211_outsb -# define __outsw mpc1211_outsw -# define __outsl mpc1211_outsl - -# define __readb mpc1211_readb -# define __readw mpc1211_readw -# define __readl mpc1211_readl -# define __writeb mpc1211_writeb -# define __writew mpc1211_writew -# define __writel mpc1211_writel - -# define __isa_port2addr mpc1211_isa_port2addr -# define __ioremap generic_ioremap -# define __iounmap generic_iounmap - -#endif - #endif /* _ASM_SH_IO_MPC1211_H */ diff -puN include/asm-sh/overdrive/io.h~sh-merge include/asm-sh/overdrive/io.h --- 25/include/asm-sh/overdrive/io.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/overdrive/io.h 2004-01-09 21:32:27.000000000 -0800 @@ -12,8 +12,6 @@ #ifndef _ASM_SH_IO_OD_H #define _ASM_SH_IO_OD_H -#include - extern unsigned char od_inb(unsigned long port); extern unsigned short od_inw(unsigned long port); extern unsigned int od_inl(unsigned long port); @@ -38,40 +36,4 @@ extern void od_outsl(unsigned long port, extern unsigned long od_isa_port2addr(unsigned long offset); -#ifdef __WANT_IO_DEF - -# define __inb od_inb -# define __inw od_inw -# define __inl od_inl -# define __outb od_outb -# define __outw od_outw -# define __outl od_outl - -# define __inb_p od_inb_p -# define __inw_p od_inw_p -# define __inl_p od_inl_p -# define __outb_p od_outb_p -# define __outw_p od_outw_p -# define __outl_p od_outl_p - -# define __insb od_insb -# define __insw od_insw -# define __insl od_insl -# define __outsb od_outsb -# define __outsw od_outsw -# define __outsl od_outsl - -# define __readb generic_readb -# define __readw generic_readw -# define __readl generic_readl -# define __writeb generic_writeb -# define __writew generic_writew -# define __writel generic_writel - -# define __isa_port2addr od_isa_port2addr -# define __ioremap generic_ioremap -# define __iounmap generic_iounmap - -#endif - #endif /* _ASM_SH_IO_OD_H */ diff -puN include/asm-sh/page.h~sh-merge include/asm-sh/page.h --- 25/include/asm-sh/page.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/page.h 2004-01-09 21:32:27.000000000 -0800 @@ -24,10 +24,13 @@ #ifdef __KERNEL__ #ifndef __ASSEMBLY__ -extern void clear_page(void *to); -extern void copy_page(void *to, void *from); +extern void (*clear_page)(void *to); +extern void (*copy_page)(void *to, void *from); -#if defined(CONFIG_CPU_SH3) +extern void clear_page_slow(void *to); +extern void copy_page_slow(void *to, void *from); + +#if defined(CONFIG_CPU_SH2) || defined(CONFIG_CPU_SH3) || !defined(CONFIG_MMU) #define clear_user_page(page, vaddr, pg) clear_page(page) #define copy_user_page(to, from, vaddr, pg) copy_page(to, from) #elif defined(CONFIG_CPU_SH4) @@ -64,7 +67,7 @@ typedef struct { unsigned long pgprot; } /* * IF YOU CHANGE THIS, PLEASE ALSO CHANGE * - * arch/sh/vmlinux.lds.S + * arch/sh/kernel/vmlinux.lds.S * * which has the same constant encoded.. */ diff -puN include/asm-sh/pci.h~sh-merge include/asm-sh/pci.h --- 25/include/asm-sh/pci.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/pci.h 2004-01-09 21:32:27.000000000 -0800 @@ -13,29 +13,25 @@ #define pcibios_assign_all_busses() 1 -#if defined(CONFIG_CPU_SUBTYPE_ST40STB1) -/* These are currently the correct values for the STM overdrive board. - * We need some way of setting this on a board specific way, it will - * not be the same on other boards I think - */ -#define PCIBIOS_MIN_IO 0x2000 -#define PCIBIOS_MIN_MEM 0x10000000 - -#elif defined(CONFIG_SH_DREAMCAST) -#define PCIBIOS_MIN_IO 0x2000 -#define PCIBIOS_MIN_MEM 0x10000000 -#elif defined(CONFIG_SH_BIGSUR) && defined(CONFIG_CPU_SUBTYPE_SH7751) -#define PCIBIOS_MIN_IO 0x2000 -#define PCIBIOS_MIN_MEM 0xFD000000 - -#elif defined(CONFIG_SH_7751_SOLUTION_ENGINE) -#define PCIBIOS_MIN_IO 0x4000 -#define PCIBIOS_MIN_MEM 0xFD000000 - -#elif defined(CONFIG_SH_MPC1211) -#define PCIBIOS_MIN_IO 0x2000 -#define PCIBIOS_MIN_MEM 0xb0000000 -#endif +/* + * A board can define one or more PCI channels that represent built-in (or + * external) PCI controllers. + */ +struct pci_channel { + struct pci_ops *pci_ops; + struct resource *io_resource; + struct resource *mem_resource; + int first_devfn; + int last_devfn; +}; + +/* + * Each board initializes this array and terminates it with a NULL entry. + */ +extern struct pci_channel board_pci_channels[]; + +#define PCIBIOS_MIN_IO board_pci_channels->io_resource->start +#define PCIBIOS_MIN_MEM board_pci_channels->mem_resource->start struct pci_dev; @@ -251,23 +247,6 @@ static inline int pci_dma_supported(stru #define sg_dma_address(sg) (virt_to_bus((sg)->dma_address)) #define sg_dma_len(sg) ((sg)->length) -/* - * A board can define one or more PCI channels that represent built-in (or - * external) PCI controllers. - */ -struct pci_channel { - struct pci_ops *pci_ops; - struct resource *io_resource; - struct resource *mem_resource; - int first_devfn; - int last_devfn; -}; - -/* - * Each board initializes this array and terminates it with a NULL entry. - */ -extern struct pci_channel board_pci_channels[]; - /* Board-specific fixup routines. */ extern void pcibios_fixup(void); extern void pcibios_fixup_irqs(void); diff -puN -L include/asm-sh/pci-sh7751.h include/asm-sh/pci-sh7751.h~sh-merge /dev/null --- 25/include/asm-sh/pci-sh7751.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,281 +0,0 @@ -/* - * Low-Level PCI Support for SH7751 targets - * - * Dustin McIntire (dustin@sensoria.com) (c) 2001 - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - */ - -#ifndef _PCI_SH7751_H_ -#define _PCI_SH7751_H_ - -#include - -/* set debug level 4=verbose...1=terse */ -//#define DEBUG_PCI 3 -#undef DEBUG_PCI - -#ifdef DEBUG_PCI -#define PCIDBG(n, x...) { if(DEBUG_PCI>=n) printk(x); } -#else -#define PCIDBG(n, x...) -#endif - -/* startup values */ -#define PCI_PROBE_BIOS 1 -#define PCI_PROBE_CONF1 2 -#define PCI_PROBE_CONF2 4 -#define PCI_NO_SORT 0x100 -#define PCI_BIOS_SORT 0x200 -#define PCI_NO_CHECKS 0x400 -#define PCI_ASSIGN_ROMS 0x1000 -#define PCI_BIOS_IRQ_SCAN 0x2000 - -/* Platform Specific Values */ -#define SH7751_VENDOR_ID 0x1054 -#define SH7751_DEVICE_ID 0x3505 - -/* SH7751 Specific Values */ -#define SH7751_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */ -#define SH7751_PCI_CONFIG_SIZE 0x1000000 /* Config space size */ -#define SH7751_PCI_MEMORY_BASE 0xFD000000 /* Memory space base addr */ -#define SH7751_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ -#define SH7751_PCI_IO_BASE 0xFE240000 /* IO space base address */ -#define SH7751_PCI_IO_SIZE 0x40000 /* Size of IO window */ - -#define SH7751_PCIREG_BASE 0xFE200000 /* PCI regs base address */ -#define PCI_REG(n) (SH7751_PCIREG_BASE+ n) - -#define SH7751_PCICONF0 0x0 /* PCI Config Reg 0 */ - #define SH7751_PCICONF0_DEVID 0xFFFF0000 /* Device ID */ - #define SH7751_PCICONF0_VNDID 0x0000FFFF /* Vendor ID */ -#define SH7751_PCICONF1 0x4 /* PCI Config Reg 1 */ - #define SH7751_PCICONF1_DPE 0x80000000 /* Data Parity Error */ - #define SH7751_PCICONF1_SSE 0x40000000 /* System Error Status */ - #define SH7751_PCICONF1_RMA 0x20000000 /* Master Abort */ - #define SH7751_PCICONF1_RTA 0x10000000 /* Target Abort Rx Status */ - #define SH7751_PCICONF1_STA 0x08000000 /* Target Abort Exec Status */ - #define SH7751_PCICONF1_DEV 0x06000000 /* Timing Status */ - #define SH7751_PCICONF1_DPD 0x01000000 /* Data Parity Status */ - #define SH7751_PCICONF1_FBBC 0x00800000 /* Back 2 Back Status */ - #define SH7751_PCICONF1_UDF 0x00400000 /* User Defined Status */ - #define SH7751_PCICONF1_66M 0x00200000 /* 66Mhz Operation Status */ - #define SH7751_PCICONF1_PM 0x00100000 /* Power Management Status */ - #define SH7751_PCICONF1_PBBE 0x00000200 /* Back 2 Back Control */ - #define SH7751_PCICONF1_SER 0x00000100 /* SERR Output Control */ - #define SH7751_PCICONF1_WCC 0x00000080 /* Wait Cycle Control */ - #define SH7751_PCICONF1_PER 0x00000040 /* Parity Error Response */ - #define SH7751_PCICONF1_VPS 0x00000020 /* VGA Pallet Snoop */ - #define SH7751_PCICONF1_MWIE 0x00000010 /* Memory Write+Invalidate */ - #define SH7751_PCICONF1_SPC 0x00000008 /* Special Cycle Control */ - #define SH7751_PCICONF1_BUM 0x00000004 /* Bus Master Control */ - #define SH7751_PCICONF1_MES 0x00000002 /* Memory Space Control */ - #define SH7751_PCICONF1_IOS 0x00000001 /* I/O Space Control */ -#define SH7751_PCICONF2 0x8 /* PCI Config Reg 2 */ - #define SH7751_PCICONF2_BCC 0xFF000000 /* Base Class Code */ - #define SH7751_PCICONF2_SCC 0x00FF0000 /* Sub-Class Code */ - #define SH7751_PCICONF2_RLPI 0x0000FF00 /* Programming Interface */ - #define SH7751_PCICONF2_REV 0x000000FF /* Revision ID */ -#define SH7751_PCICONF3 0xC /* PCI Config Reg 3 */ - #define SH7751_PCICONF3_BIST7 0x80000000 /* Bist Supported */ - #define SH7751_PCICONF3_BIST6 0x40000000 /* Bist Executing */ - #define SH7751_PCICONF3_BIST3_0 0x0F000000 /* Bist Passed */ - #define SH7751_PCICONF3_HD7 0x00800000 /* Single Funtion device */ - #define SH7751_PCICONF3_HD6_0 0x007F0000 /* Configuration Layout */ - #define SH7751_PCICONF3_LAT 0x0000FF00 /* Latency Timer */ - #define SH7751_PCICONF3_CLS 0x000000FF /* Cache Line Size */ -#define SH7751_PCICONF4 0x10 /* PCI Config Reg 4 */ - #define SH7751_PCICONF4_BASE 0xFFFFFFFC /* I/O Space Base Addr */ - #define SH7751_PCICONF4_ASI 0x00000001 /* Address Space Type */ -#define SH7751_PCICONF5 0x14 /* PCI Config Reg 5 */ - #define SH7751_PCICONF5_BASE 0xFFFFFFF0 /* Mem Space Base Addr */ - #define SH7751_PCICONF5_LAP 0x00000008 /* Prefetch Enabled */ - #define SH7751_PCICONF5_LAT 0x00000006 /* Local Memory type */ - #define SH7751_PCICONF5_ASI 0x00000001 /* Address Space Type */ -#define SH7751_PCICONF6 0x18 /* PCI Config Reg 6 */ - #define SH7751_PCICONF6_BASE 0xFFFFFFF0 /* Mem Space Base Addr */ - #define SH7751_PCICONF6_LAP 0x00000008 /* Prefetch Enabled */ - #define SH7751_PCICONF6_LAT 0x00000006 /* Local Memory type */ - #define SH7751_PCICONF6_ASI 0x00000001 /* Address Space Type */ -/* PCICONF7 - PCICONF10 are undefined */ -#define SH7751_PCICONF11 0x2C /* PCI Config Reg 11 */ - #define SH7751_PCICONF11_SSID 0xFFFF0000 /* Subsystem ID */ - #define SH7751_PCICONF11_SVID 0x0000FFFF /* Subsystem Vendor ID */ -/* PCICONF12 is undefined */ -#define SH7751_PCICONF13 0x34 /* PCI Config Reg 13 */ - #define SH7751_PCICONF13_CPTR 0x000000FF /* PM function pointer */ -/* PCICONF14 is undefined */ -#define SH7751_PCICONF15 0x3C /* PCI Config Reg 15 */ - #define SH7751_PCICONF15_IPIN 0x000000FF /* Interrupt Pin */ -#define SH7751_PCICONF16 0x40 /* PCI Config Reg 16 */ - #define SH7751_PCICONF16_PMES 0xF8000000 /* PME Support */ - #define SH7751_PCICONF16_D2S 0x04000000 /* D2 Support */ - #define SH7751_PCICONF16_D1S 0x02000000 /* D1 Support */ - #define SH7751_PCICONF16_DSI 0x00200000 /* Bit Device Init. */ - #define SH7751_PCICONF16_PMCK 0x00080000 /* Clock for PME req. */ - #define SH7751_PCICONF16_VER 0x00070000 /* PM Version */ - #define SH7751_PCICONF16_NIP 0x0000FF00 /* Next Item Pointer */ - #define SH7751_PCICONF16_CID 0x000000FF /* Capability Identifier */ -#define SH7751_PCICONF17 0x44 /* PCI Config Reg 17 */ - #define SH7751_PCICONF17_DATA 0xFF000000 /* Data field for PM */ - #define SH7751_PCICONF17_PMES 0x00800000 /* PME Status */ - #define SH7751_PCICONF17_DSCL 0x00600000 /* Data Scaling Value */ - #define SH7751_PCICONF17_DSEL 0x001E0000 /* Data Select */ - #define SH7751_PCICONF17_PMEN 0x00010000 /* PME Enable */ - #define SH7751_PCICONF17_PWST 0x00000003 /* Power State */ -/* SH7715 Internal PCI Registers */ -#define SH7751_PCICR 0x100 /* PCI Control Register */ - #define SH7751_PCICR_PREFIX 0xA5000000 /* CR prefix for write */ - #define SH7751_PCICR_TRSB 0x00000200 /* Target Read Single */ - #define SH7751_PCICR_BSWP 0x00000100 /* Target Byte Swap */ - #define SH7751_PCICR_PLUP 0x00000080 /* Enable PCI Pullup */ - #define SH7751_PCICR_ARBM 0x00000040 /* PCI Arbitration Mode */ - #define SH7751_PCICR_MD 0x00000030 /* MD9 and MD10 status */ - #define SH7751_PCICR_SERR 0x00000008 /* SERR output assert */ - #define SH7751_PCICR_INTA 0x00000004 /* INTA output assert */ - #define SH7751_PCICR_PRST 0x00000002 /* PCI Reset Assert */ - #define SH7751_PCICR_CFIN 0x00000001 /* Central Fun. Init Done */ -#define SH7751_PCILSR0 0x104 /* PCI Local Space Register0 */ -#define SH7751_PCILSR1 0x108 /* PCI Local Space Register1 */ -#define SH7751_PCILAR0 0x10C /* PCI Local Address Register1 */ -#define SH7751_PCILAR1 0x110 /* PCI Local Address Register1 */ -#define SH7751_PCIINT 0x114 /* PCI Interrupt Register */ - #define SH7751_PCIINT_MLCK 0x00008000 /* Master Lock Error */ - #define SH7751_PCIINT_TABT 0x00004000 /* Target Abort Error */ - #define SH7751_PCIINT_TRET 0x00000200 /* Target Retry Error */ - #define SH7751_PCIINT_MFDE 0x00000100 /* Master Func. Disable Error */ - #define SH7751_PCIINT_PRTY 0x00000080 /* Address Parity Error */ - #define SH7751_PCIINT_SERR 0x00000040 /* SERR Detection Error */ - #define SH7751_PCIINT_TWDP 0x00000020 /* Tgt. Write Parity Error */ - #define SH7751_PCIINT_TRDP 0x00000010 /* Tgt. Read Parity Error Det. */ - #define SH7751_PCIINT_MTABT 0x00000008 /* Master-Tgt. Abort Error */ - #define SH7751_PCIINT_MMABT 0x00000004 /* Master-Master Abort Error */ - #define SH7751_PCIINT_MWPD 0x00000002 /* Master Write PERR Detect */ - #define SH7751_PCIINT_MRPD 0x00000002 /* Master Read PERR Detect */ -#define SH7751_PCIINTM 0x118 /* PCI Interrupt Mask Register */ -#define SH7751_PCIALR 0x11C /* Error Address Register */ -#define SH7751_PCICLR 0x120 /* Error Command/Data Register */ - #define SH7751_PCICLR_MPIO 0x80000000 /* Error Command/Data Register */ - #define SH7751_PCICLR_MDMA0 0x40000000 /* DMA0 Transfer Error */ - #define SH7751_PCICLR_MDMA1 0x20000000 /* DMA1 Transfer Error */ - #define SH7751_PCICLR_MDMA2 0x10000000 /* DMA2 Transfer Error */ - #define SH7751_PCICLR_MDMA3 0x08000000 /* DMA3 Transfer Error */ - #define SH7751_PCICLR_TGT 0x04000000 /* Target Transfer Error */ - #define SH7751_PCICLR_CMDL 0x0000000F /* PCI Command at Error */ -#define SH7751_PCIAINT 0x130 /* Arbiter Interrupt Register */ - #define SH7751_PCIAINT_MBKN 0x00002000 /* Master Broken Interrupt */ - #define SH7751_PCIAINT_TBTO 0x00001000 /* Target Bus Time Out */ - #define SH7751_PCIAINT_MBTO 0x00001000 /* Master Bus Time Out */ - #define SH7751_PCIAINT_TABT 0x00000008 /* Target Abort */ - #define SH7751_PCIAINT_MABT 0x00000004 /* Master Abort */ - #define SH7751_PCIAINT_RDPE 0x00000002 /* Read Data Parity Error */ - #define SH7751_PCIAINT_WDPE 0x00000002 /* Write Data Parity Error */ -#define SH7751_PCIAINTM 0x134 /* Arbiter Int. Mask Register */ -#define SH7751_PCIBMLR 0x138 /* Error Bus Master Register */ - #define SH7751_PCIBMLR_REQ4 0x00000010 /* REQ4 bus master at error */ - #define SH7751_PCIBMLR_REQ3 0x00000008 /* REQ3 bus master at error */ - #define SH7751_PCIBMLR_REQ2 0x00000004 /* REQ2 bus master at error */ - #define SH7751_PCIBMLR_REQ1 0x00000002 /* REQ1 bus master at error */ - #define SH7751_PCIBMLR_REQ0 0x00000001 /* REQ0 bus master at error */ -#define SH7751_PCIDMABT 0x140 /* DMA Transfer Arb. Register */ - #define SH7751_PCIDMABT_RRBN 0x00000001 /* DMA Arbitor Round-Robin */ -#define SH7751_PCIDPA0 0x180 /* DMA0 Transfer Addr. Register */ -#define SH7751_PCIDLA0 0x184 /* DMA0 Local Addr. Register */ -#define SH7751_PCIDTC0 0x188 /* DMA0 Transfer Cnt. Register */ -#define SH7751_PCIDCR0 0x18C /* DMA0 Control Register */ - #define SH7751_PCIDCR_ALGN 0x00000600 /* DMA Alignment Mode */ - #define SH7751_PCIDCR_MAST 0x00000100 /* DMA Termination Type */ - #define SH7751_PCIDCR_INTM 0x00000080 /* DMA Interrupt Done Mask*/ - #define SH7751_PCIDCR_INTS 0x00000040 /* DMA Interrupt Done Status */ - #define SH7751_PCIDCR_LHLD 0x00000020 /* Local Address Control */ - #define SH7751_PCIDCR_PHLD 0x00000010 /* PCI Address Control*/ - #define SH7751_PCIDCR_IOSEL 0x00000008 /* PCI Address Space Type */ - #define SH7751_PCIDCR_DIR 0x00000004 /* DMA Transfer Direction */ - #define SH7751_PCIDCR_STOP 0x00000002 /* Force DMA Stop */ - #define SH7751_PCIDCR_STRT 0x00000001 /* DMA Start */ -#define SH7751_PCIDPA1 0x190 /* DMA1 Transfer Addr. Register */ -#define SH7751_PCIDLA1 0x194 /* DMA1 Local Addr. Register */ -#define SH7751_PCIDTC1 0x198 /* DMA1 Transfer Cnt. Register */ -#define SH7751_PCIDCR1 0x19C /* DMA1 Control Register */ -#define SH7751_PCIDPA2 0x1A0 /* DMA2 Transfer Addr. Register */ -#define SH7751_PCIDLA2 0x1A4 /* DMA2 Local Addr. Register */ -#define SH7751_PCIDTC2 0x1A8 /* DMA2 Transfer Cnt. Register */ -#define SH7751_PCIDCR2 0x1AC /* DMA2 Control Register */ -#define SH7751_PCIDPA3 0x1B0 /* DMA3 Transfer Addr. Register */ -#define SH7751_PCIDLA3 0x1B4 /* DMA3 Local Addr. Register */ -#define SH7751_PCIDTC3 0x1B8 /* DMA3 Transfer Cnt. Register */ -#define SH7751_PCIDCR3 0x1BC /* DMA3 Control Register */ -#define SH7751_PCIPAR 0x1C0 /* PIO Address Register */ - #define SH7751_PCIPAR_CFGEN 0x80000000 /* Configuration Enable */ - #define SH7751_PCIPAR_BUSNO 0x00FF0000 /* Config. Bus Number */ - #define SH7751_PCIPAR_DEVNO 0x0000FF00 /* Config. Device Number */ - #define SH7751_PCIPAR_REGAD 0x000000FC /* Register Address Number */ -#define SH7751_PCIMBR 0x1C4 /* Memory Base Address Register */ - #define SH7751_PCIMBR_MASK 0xFF000000 /* Memory Space Mask */ - #define SH7751_PCIMBR_LOCK 0x00000001 /* Lock Memory Space */ -#define SH7751_PCIIOBR 0x1C8 /* I/O Base Address Register */ - #define SH7751_PCIIOBR_MASK 0xFFFC0000 /* IO Space Mask */ - #define SH7751_PCIIOBR_LOCK 0x00000001 /* Lock IO Space */ -#define SH7751_PCIPINT 0x1CC /* Power Mgmnt Int. Register */ - #define SH7751_PCIPINT_D3 0x00000002 /* D3 Pwr Mgmt. Interrupt */ - #define SH7751_PCIPINT_D0 0x00000001 /* D0 Pwr Mgmt. Interrupt */ -#define SH7751_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */ -#define SH7751_PCICLKR 0x1D4 /* Clock Ctrl. Register */ - #define SH7751_PCICLKR_PCSTP 0x00000002 /* PCI Clock Stop */ - #define SH7751_PCICLKR_BCSTP 0x00000002 /* BCLK Clock Stop */ -/* For definitions of BCR, MCR see ... */ -#define SH7751_PCIBCR1 0x1E0 /* Memory BCR1 Register */ -#define SH7751_PCIBCR2 0x1E4 /* Memory BCR2 Register */ -#define SH7751_PCIWCR1 0x1E8 /* Wait Control 1 Register */ -#define SH7751_PCIWCR2 0x1EC /* Wait Control 2 Register */ -#define SH7751_PCIWCR3 0x1F0 /* Wait Control 3 Register */ -#define SH7751_PCIMCR 0x1F4 /* Memory Control Register */ -#define SH7751_PCIPCTR 0x200 /* Port Control Register */ - #define SH7751_PCIPCTR_P2EN 0x000400000 /* Port 2 Enable */ - #define SH7751_PCIPCTR_P1EN 0x000200000 /* Port 1 Enable */ - #define SH7751_PCIPCTR_P0EN 0x000100000 /* Port 0 Enable */ - #define SH7751_PCIPCTR_P2UP 0x000000020 /* Port2 Pull Up Enable */ - #define SH7751_PCIPCTR_P2IO 0x000000010 /* Port2 Output Enable */ - #define SH7751_PCIPCTR_P1UP 0x000000008 /* Port1 Pull Up Enable */ - #define SH7751_PCIPCTR_P1IO 0x000000004 /* Port1 Output Enable */ - #define SH7751_PCIPCTR_P0UP 0x000000002 /* Port0 Pull Up Enable */ - #define SH7751_PCIPCTR_P0IO 0x000000001 /* Port0 Output Enable */ -#define SH7751_PCIPDTR 0x204 /* Port Data Register */ - #define SH7751_PCIPDTR_PB5 0x000000020 /* Port 5 Enable */ - #define SH7751_PCIPDTR_PB4 0x000000010 /* Port 4 Enable */ - #define SH7751_PCIPDTR_PB3 0x000000008 /* Port 3 Enable */ - #define SH7751_PCIPDTR_PB2 0x000000004 /* Port 2 Enable */ - #define SH7751_PCIPDTR_PB1 0x000000002 /* Port 1 Enable */ - #define SH7751_PCIPDTR_PB0 0x000000001 /* Port 0 Enable */ -#define SH7751_PCIPDR 0x220 /* Port IO Data Register */ - -/* Memory Control Registers */ -#define SH7751_BCR1 0xFF800000 /* Memory BCR1 Register */ -#define SH7751_BCR2 0xFF800004 /* Memory BCR2 Register */ -#define SH7751_WCR1 0xFF800008 /* Wait Control 1 Register */ -#define SH7751_WCR2 0xFF80000C /* Wait Control 2 Register */ -#define SH7751_WCR3 0xFF800010 /* Wait Control 3 Register */ -#define SH7751_MCR 0xFF800014 /* Memory Control Register */ - -/* General Memory Config Addresses */ -#define SH7751_CS0_BASE_ADDR 0x0 -#define SH7751_MEM_REGION_SIZE 0x04000000 -#define SH7751_CS1_BASE_ADDR (SH7751_CS0_BASE_ADDR + SH7751_MEM_REGION_SIZE) -#define SH7751_CS2_BASE_ADDR (SH7751_CS1_BASE_ADDR + SH7751_MEM_REGION_SIZE) -#define SH7751_CS3_BASE_ADDR (SH7751_CS2_BASE_ADDR + SH7751_MEM_REGION_SIZE) -#define SH7751_CS4_BASE_ADDR (SH7751_CS3_BASE_ADDR + SH7751_MEM_REGION_SIZE) -#define SH7751_CS5_BASE_ADDR (SH7751_CS4_BASE_ADDR + SH7751_MEM_REGION_SIZE) -#define SH7751_CS6_BASE_ADDR (SH7751_CS5_BASE_ADDR + SH7751_MEM_REGION_SIZE) - -/* General PCI values */ -#define SH7751_PCI_HOST_BRIDGE 0x6 - -/* External functions defined per platform i.e. Big Sur, SE... (these could be routed - * through the machine vectors... */ -extern int pcibios_init_platform(void); -extern int pcibios_map_platform_irq(u8 slot, u8 pin); - -#endif /* _PCI_SH7751_H_ */ - diff -puN include/asm-sh/pgalloc.h~sh-merge include/asm-sh/pgalloc.h --- 25/include/asm-sh/pgalloc.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/pgalloc.h 2004-01-09 21:32:27.000000000 -0800 @@ -42,18 +42,11 @@ static inline void pgd_free(pgd_t *pgd) static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) { - int count = 0; pte_t *pte; - do { - pte = (pte_t *) __get_free_page(GFP_KERNEL | __GFP_REPEAT); - if (pte) - clear_page(pte); - else { - current->state = TASK_UNINTERRUPTIBLE; - schedule_timeout(HZ); - } - } while (!pte && (count++ < 10)); + pte = (pte_t *) __get_free_page(GFP_KERNEL | __GFP_REPEAT); + if (pte) + clear_page(pte); return pte; } @@ -61,18 +54,11 @@ static inline pte_t *pte_alloc_one_kerne static inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) { - int count = 0; struct page *pte; - do { - pte = alloc_pages(GFP_KERNEL, 0); - if (pte) - clear_page(page_address(pte)); - else { - current->state = TASK_UNINTERRUPTIBLE; - schedule_timeout(HZ); - } - } while (!pte && (count++ < 10)); + pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT, 0); + if (pte) + clear_page(page_address(pte)); return pte; } diff -puN include/asm-sh/processor.h~sh-merge include/asm-sh/processor.h --- 25/include/asm-sh/processor.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/processor.h 2004-01-09 21:32:27.000000000 -0800 @@ -2,7 +2,7 @@ * include/asm-sh/processor.h * * Copyright (C) 1999, 2000 Niibe Yutaka - * Copyright (C) 2002 Paul Mundt + * Copyright (C) 2002, 2003 Paul Mundt */ #ifndef __ASM_SH_PROCESSOR_H @@ -22,20 +22,27 @@ /* Core Processor Version Register */ #define CCN_PVR 0xff000030 #define CCN_PRR 0xff000044 + /* * CPU type and hardware bug flags. Kept separately for each CPU. + * + * Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry + * in arch/sh/Kconfig, as well as an entry in arch/sh/kernel/setup.c + * for parsing the subtype in get_cpu_subtype(). */ enum cpu_type { - CPU_SH7604, /* Represents 7604 */ - CPU_SH7708, /* Represents 7707, 7708, 7708S, 7708R, 7709 */ - CPU_SH7729, /* Represents 7709A, 7729 */ - CPU_SH7750, /* Represents 7750 */ - CPU_SH7750S, /* Represents 7750S */ - CPU_SH7750R, /* Represents 7750R */ - CPU_SH7751, /* Represents 7751 */ - CPU_SH7751R, /* Represents 7751R */ - CPU_ST40RA, /* Represents ST40RA (formerly ST40STB1) */ - CPU_ST40GX1, /* Represents ST40GX1 */ + /* SH-2 types */ + CPU_SH7604, + + /* SH-3 types */ + CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R, CPU_SH7709, + CPU_SH7709A, CPU_SH7729, CPU_SH7300, + + /* SH-4 types */ + CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, + CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501, + + /* Unknown subtype */ CPU_SH_NONE }; @@ -55,12 +62,12 @@ struct sh_cpuinfo { unsigned long flags; }; +extern struct sh_cpuinfo boot_cpu_data; + #ifdef CONFIG_SMP extern struct sh_cpuinfo cpu_data[]; #define current_cpu_data cpu_data[smp_processor_id()] #else -extern struct sh_cpuinfo boot_cpu_data; - #define cpu_data (&boot_cpu_data) #define current_cpu_data boot_cpu_data #endif @@ -87,8 +94,9 @@ extern struct sh_cpuinfo boot_cpu_data; * IMASK-bit: * Interrupt level mask */ -#define SR_FD 0x00008000 -#define SR_IMASK 0x000000f0 +#define SR_FD 0x00008000 +#define SR_DSP 0x00001000 +#define SR_IMASK 0x000000f0 /* * FPU structure and data @@ -119,7 +127,14 @@ union sh_fpu_union { struct sh_fpu_soft_struct soft; }; -#define CPU_HAS_FPU 0x0001 +/* + * Processor flags + */ + +#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ +#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ +#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ +#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ struct thread_struct { unsigned long sp; @@ -128,16 +143,21 @@ struct thread_struct { unsigned long trap_no, error_code; unsigned long address; /* Hardware debugging registers may come here */ + unsigned long ubc_pc; /* floating point info */ union sh_fpu_union fpu; }; +/* Count of active tasks with UBC settings */ +extern int ubc_usercnt; + #define INIT_THREAD { \ sizeof(init_stack) + (long) &init_stack, /* sp */ \ 0, /* pc */ \ 0, 0, \ 0, \ + 0, \ {{{0,}},} /* fpu state */ \ } @@ -239,6 +259,6 @@ extern unsigned long get_wchan(struct ta #define KSTK_EIP(tsk) ((tsk)->thread.pc) #define KSTK_ESP(tsk) ((tsk)->thread.sp) -#define cpu_relax() barrier() +#define cpu_relax() __asm__ __volatile__ ("sleep" : : : "memory") #endif /* __ASM_SH_PROCESSOR_H */ diff -puN include/asm-sh/ptrace.h~sh-merge include/asm-sh/ptrace.h --- 25/include/asm-sh/ptrace.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/ptrace.h 2004-01-09 21:32:27.000000000 -0800 @@ -37,13 +37,13 @@ #define REG_SYSCALL 22 -#define REG_FPUL 23 +#define REG_FPREG0 23 +#define REG_FPREG15 38 +#define REG_XFREG0 39 +#define REG_XFREG15 54 -#define REG_FPREG0 24 -#define REG_FPREG15 39 -#define REG_XDREG0 40 -#define REG_XDREG14 47 -#define REG_FPSCR 48 +#define REG_FPSCR 55 +#define REG_FPUL 56 /* options set using PTRACE_SETOPTIONS */ #define PTRACE_O_TRACESYSGOOD 0x00000001 @@ -63,6 +63,30 @@ struct pt_regs { long tra; }; +/* + * This struct defines the way the DSP registers are stored on the + * kernel stack during a system call or other kernel entry. + */ +struct pt_dspregs { + unsigned long a1; + unsigned long a0g; + unsigned long a1g; + unsigned long m0; + unsigned long m1; + unsigned long a0; + unsigned long x0; + unsigned long x1; + unsigned long y0; + unsigned long y1; + unsigned long dsr; + unsigned long rs; + unsigned long re; + unsigned long mod; +}; + +#define PTRACE_GETDSPREGS 55 +#define PTRACE_SETDSPREGS 56 + #ifdef __KERNEL__ #define user_mode(regs) (((regs)->sr & 0x40000000)==0) #define instruction_pointer(regs) ((regs)->pc) diff -puN include/asm-sh/rtc.h~sh-merge include/asm-sh/rtc.h --- 25/include/asm-sh/rtc.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/rtc.h 2004-01-09 21:32:27.000000000 -0800 @@ -4,11 +4,11 @@ #include #include -#define rtc_gettimeofday sh_mv.mv_rtc_gettimeofday -#define rtc_settimeofday sh_mv.mv_rtc_settimeofday - extern void sh_rtc_gettimeofday(struct timespec *ts); extern int sh_rtc_settimeofday(const time_t secs); +extern void (*board_time_init)(void); +extern void (*rtc_get_time)(struct timespec *); +extern int (*rtc_set_time)(const time_t); /* RCR1 Bits */ #define RCR1_CF 0x80 /* Carry Flag */ diff -puN include/asm-sh/saturn/io.h~sh-merge include/asm-sh/saturn/io.h --- 25/include/asm-sh/saturn/io.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/saturn/io.h 2004-01-09 21:32:27.000000000 -0800 @@ -10,48 +10,10 @@ #ifndef __ASM_SH_SATURN_IO_H #define __ASM_SH_SATURN_IO_H -#include - /* arch/sh/boards/saturn/io.c */ extern unsigned long saturn_isa_port2addr(unsigned long offset); extern void *saturn_ioremap(unsigned long offset, unsigned long size); extern void saturn_iounmap(void *addr); -#ifdef __WANT_IO_DEF - -# define __inb generic_inb -# define __inw generic_inw -# define __inl generic_inl -# define __outb generic_outb -# define __outw generic_outw -# define __outl generic_outl - -# define __inb_p generic_inb_p -# define __inw_p generic_inw -# define __inl_p generic_inl -# define __outb_p generic_outb_p -# define __outw_p generic_outw -# define __outl_p generic_outl - -# define __insb generic_insb -# define __insw generic_insw -# define __insl generic_insl -# define __outsb generic_outsb -# define __outsw generic_outsw -# define __outsl generic_outsl - -# define __readb generic_readb -# define __readw generic_readw -# define __readl generic_readl -# define __writeb generic_writeb -# define __writew generic_writew -# define __writel generic_writel - -# define __isa_port2addr saturn_isa_port2addr -# define __ioremap saturn_ioremap -# define __iounmap saturn_iounmap - -#endif - #endif /* __ASM_SH_SATURN_IO_H */ diff -puN include/asm-sh/se7751/io.h~sh-merge include/asm-sh/se7751/io.h --- 25/include/asm-sh/se7751/io.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/se7751/io.h 2004-01-09 21:32:27.000000000 -0800 @@ -12,8 +12,6 @@ #ifndef _ASM_SH_IO_7751SE_H #define _ASM_SH_IO_7751SE_H -#include - extern unsigned char sh7751se_inb(unsigned long port); extern unsigned short sh7751se_inw(unsigned long port); extern unsigned int sh7751se_inl(unsigned long port); @@ -41,40 +39,4 @@ extern void sh7751se_writel(unsigned int extern unsigned long sh7751se_isa_port2addr(unsigned long offset); -#ifdef __WANT_IO_DEF - -# define __inb sh7751se_inb -# define __inw sh7751se_inw -# define __inl sh7751se_inl -# define __outb sh7751se_outb -# define __outw sh7751se_outw -# define __outl sh7751se_outl - -# define __inb_p sh7751se_inb_p -# define __inw_p sh7751se_inw -# define __inl_p sh7751se_inl -# define __outb_p sh7751se_outb_p -# define __outw_p sh7751se_outw -# define __outl_p sh7751se_outl - -# define __insb sh7751se_insb -# define __insw sh7751se_insw -# define __insl sh7751se_insl -# define __outsb sh7751se_outsb -# define __outsw sh7751se_outsw -# define __outsl sh7751se_outsl - -# define __readb sh7751se_readb -# define __readw sh7751se_readw -# define __readl sh7751se_readl -# define __writeb sh7751se_writeb -# define __writew sh7751se_writew -# define __writel sh7751se_writel - -# define __isa_port2addr sh7751se_isa_port2addr -# define __ioremap generic_ioremap -# define __iounmap generic_iounmap - -#endif - #endif /* _ASM_SH_IO_7751SE_H */ diff -puN /dev/null include/asm-sh/sections.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/sections.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,9 @@ +#ifndef __ASM_SH_SECTIONS_H +#define __ASM_SH_SECTIONS_H + +#include + +extern char _end[]; + +#endif /* __ASM_SH_SECTIONS_H */ + diff -puN /dev/null include/asm-sh/segment.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/segment.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,6 @@ +#ifndef __ASM_SH_SEGMENT_H +#define __ASM_SH_SEGMENT_H + +/* Only here because we have some old header files that expect it.. */ + +#endif /* __ASM_SH_SEGMENT_H */ diff -puN include/asm-sh/se/io.h~sh-merge include/asm-sh/se/io.h --- 25/include/asm-sh/se/io.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/se/io.h 2004-01-09 21:32:27.000000000 -0800 @@ -12,8 +12,6 @@ #ifndef _ASM_SH_IO_SE_H #define _ASM_SH_IO_SE_H -#include - extern unsigned char se_inb(unsigned long port); extern unsigned short se_inw(unsigned long port); extern unsigned int se_inl(unsigned long port); @@ -32,49 +30,6 @@ extern void se_outsb(unsigned long port, extern void se_outsw(unsigned long port, const void *addr, unsigned long count); extern void se_outsl(unsigned long port, const void *addr, unsigned long count); -extern unsigned char se_readb(unsigned long addr); -extern unsigned short se_readw(unsigned long addr); -extern unsigned int se_readl(unsigned long addr); -extern void se_writeb(unsigned char b, unsigned long addr); -extern void se_writew(unsigned short b, unsigned long addr); -extern void se_writel(unsigned int b, unsigned long addr); - extern unsigned long se_isa_port2addr(unsigned long offset); -#ifdef __WANT_IO_DEF - -# define __inb se_inb -# define __inw se_inw -# define __inl se_inl -# define __outb se_outb -# define __outw se_outw -# define __outl se_outl - -# define __inb_p se_inb_p -# define __inw_p se_inw -# define __inl_p se_inl -# define __outb_p se_outb_p -# define __outw_p se_outw -# define __outl_p se_outl - -# define __insb se_insb -# define __insw se_insw -# define __insl se_insl -# define __outsb se_outsb -# define __outsw se_outsw -# define __outsl se_outsl - -# define __readb se_readb -# define __readw se_readw -# define __readl se_readl -# define __writeb se_writeb -# define __writew se_writew -# define __writel se_writel - -# define __isa_port2addr se_isa_port2addr -# define __ioremap generic_ioremap -# define __iounmap generic_iounmap - -#endif - #endif /* _ASM_SH_IO_SE_H */ diff -puN -L include/asm-sh/serial-bigsur.h include/asm-sh/serial-bigsur.h~sh-merge /dev/null --- 25/include/asm-sh/serial-bigsur.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,27 +0,0 @@ -/* - * include/asm-sh/serial-bigsur.h - * - * Configuration details for Big Sur 16550 based serial ports - * i.e. HD64465, PCMCIA, etc. - */ - -#ifndef _ASM_SERIAL_BIGSUR_H -#define _ASM_SERIAL_BIGSUR_H -#include - -#define BASE_BAUD (3379200 / 16) - -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) - - -#define STD_SERIAL_PORT_DEFNS \ - /* UART CLK PORT IRQ FLAGS */ \ - { 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */ - - -#define SERIAL_PORT_DFNS STD_SERIAL_PORT_DEFNS - -/* XXX: This should be moved ino irq.h */ -#define irq_canonicalize(x) (x) - -#endif /* _ASM_SERIAL_BIGSUR_H */ diff -puN -L include/asm-sh/serial-ec3104.h include/asm-sh/serial-ec3104.h~sh-merge /dev/null --- 25/include/asm-sh/serial-ec3104.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,22 +0,0 @@ -#include -/* Naturally we don't know the exact value but 115200 baud has a divisor - * of 9 and 19200 baud has a divisor of 52, so this seems like a good - * guess. */ -#define BASE_BAUD (16800000 / 16) - -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) - -/* there is a fourth serial port with the expected values as well, but - * it's got the keyboard controller behind it so we can't really use it - * (without moving the keyboard driver to userspace, which doesn't sound - * like a very good idea) */ -#define STD_SERIAL_PORT_DEFNS \ - /* UART CLK PORT IRQ FLAGS */ \ - { 0, BASE_BAUD, 0x11C00, EC3104_IRQBASE+7, STD_COM_FLAGS }, /* ttyS0 */ \ - { 0, BASE_BAUD, 0x12000, EC3104_IRQBASE+8, STD_COM_FLAGS }, /* ttyS1 */ \ - { 0, BASE_BAUD, 0x12400, EC3104_IRQBASE+9, STD_COM_FLAGS }, /* ttyS2 */ - -#define SERIAL_PORT_DFNS STD_SERIAL_PORT_DEFNS - -/* XXX: This should be moved ino irq.h */ -#define irq_canonicalize(x) (x) diff -puN include/asm-sh/sigcontext.h~sh-merge include/asm-sh/sigcontext.h --- 25/include/asm-sh/sigcontext.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/sigcontext.h 2004-01-09 21:32:27.000000000 -0800 @@ -1,26 +1,6 @@ #ifndef __ASM_SH_SIGCONTEXT_H #define __ASM_SH_SIGCONTEXT_H -struct sigcontext { - unsigned long oldmask; - - /* CPU registers */ - unsigned long sc_regs[16]; - unsigned long sc_pc; - unsigned long sc_pr; - unsigned long sc_sr; - unsigned long sc_gbr; - unsigned long sc_mach; - unsigned long sc_macl; - -#if defined(CONFIG_CPU_SH4) - /* FPU registers */ - unsigned long sc_fpregs[16]; - unsigned long sc_xfpregs[16]; - unsigned int sc_fpscr; - unsigned int sc_fpul; - unsigned int sc_ownedfp; -#endif -}; +#include #endif /* __ASM_SH_SIGCONTEXT_H */ diff -puN -L include/asm-sh/smc37c93x.h include/asm-sh/smc37c93x.h~sh-merge /dev/null --- 25/include/asm-sh/smc37c93x.h +++ /dev/null 2002-08-30 16:31:37.000000000 -0700 @@ -1,190 +0,0 @@ -#ifndef __ASM_SH_SMC37C93X_H -#define __ASM_SH_SMC37C93X_H - -/* - * linux/include/asm-sh/smc37c93x.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * SMSC 37C93x Super IO Chip support - */ - -/* Default base I/O address */ -#define FDC_PRIMARY_BASE 0x3f0 -#define IDE1_PRIMARY_BASE 0x1f0 -#define IDE1_SECONDARY_BASE 0x170 -#define PARPORT_PRIMARY_BASE 0x378 -#define COM1_PRIMARY_BASE 0x2f8 -#define COM2_PRIMARY_BASE 0x3f8 -#define RTC_PRIMARY_BASE 0x070 -#define KBC_PRIMARY_BASE 0x060 -#define AUXIO_PRIMARY_BASE 0x000 /* XXX */ - -/* Logical device number */ -#define LDN_FDC 0 -#define LDN_IDE1 1 -#define LDN_IDE2 2 -#define LDN_PARPORT 3 -#define LDN_COM1 4 -#define LDN_COM2 5 -#define LDN_RTC 6 -#define LDN_KBC 7 -#define LDN_AUXIO 8 - -/* Configuration port and key */ -#define CONFIG_PORT 0x3f0 -#define INDEX_PORT CONFIG_PORT -#define DATA_PORT 0x3f1 -#define CONFIG_ENTER 0x55 -#define CONFIG_EXIT 0xaa - -/* Configuration index */ -#define CURRENT_LDN_INDEX 0x07 -#define POWER_CONTROL_INDEX 0x22 -#define ACTIVATE_INDEX 0x30 -#define IO_BASE_HI_INDEX 0x60 -#define IO_BASE_LO_INDEX 0x61 -#define IRQ_SELECT_INDEX 0x70 -#define DMA_SELECT_INDEX 0x74 - -#define GPIO46_INDEX 0xc6 -#define GPIO47_INDEX 0xc7 - -/* UART stuff. Only for debugging. */ -/* UART Register */ - -#define UART_RBR 0x0 /* Receiver Buffer Register (Read Only) */ -#define UART_THR 0x0 /* Transmitter Holding Register (Write Only) */ -#define UART_IER 0x2 /* Interrupt Enable Register */ -#define UART_IIR 0x4 /* Interrupt Ident Register (Read Only) */ -#define UART_FCR 0x4 /* FIFO Control Register (Write Only) */ -#define UART_LCR 0x6 /* Line Control Register */ -#define UART_MCR 0x8 /* MODEM Control Register */ -#define UART_LSR 0xa /* Line Status Register */ -#define UART_MSR 0xc /* MODEM Status Register */ -#define UART_SCR 0xe /* Scratch Register */ -#define UART_DLL 0x0 /* Divisor Latch (LS) */ -#define UART_DLM 0x2 /* Divisor Latch (MS) */ - -#ifndef __ASSEMBLY__ -typedef struct uart_reg { - volatile __u16 rbr; - volatile __u16 ier; - volatile __u16 iir; - volatile __u16 lcr; - volatile __u16 mcr; - volatile __u16 lsr; - volatile __u16 msr; - volatile __u16 scr; -} uart_reg; -#endif /* ! __ASSEMBLY__ */ - -/* Alias for Write Only Register */ - -#define thr rbr -#define tcr iir - -/* Alias for Divisor Latch Register */ - -#define dll rbr -#define dlm ier -#define fcr iir - -/* Interrupt Enable Register */ - -#define IER_ERDAI 0x0100 /* Enable Received Data Available Interrupt */ -#define IER_ETHREI 0x0200 /* Enable Transmitter Holding Register Empty Interrupt */ -#define IER_ELSI 0x0400 /* Enable Receiver Line Status Interrupt */ -#define IER_EMSI 0x0800 /* Enable MODEM Status Interrupt */ - -/* Interrupt Ident Register */ - -#define IIR_IP 0x0100 /* "0" if Interrupt Pending */ -#define IIR_IIB0 0x0200 /* Interrupt ID Bit 0 */ -#define IIR_IIB1 0x0400 /* Interrupt ID Bit 1 */ -#define IIR_IIB2 0x0800 /* Interrupt ID Bit 2 */ -#define IIR_FIFO 0xc000 /* FIFOs enabled */ - -/* FIFO Control Register */ - -#define FCR_FEN 0x0100 /* FIFO enable */ -#define FCR_RFRES 0x0200 /* Receiver FIFO reset */ -#define FCR_TFRES 0x0400 /* Transmitter FIFO reset */ -#define FCR_DMA 0x0800 /* DMA mode select */ -#define FCR_RTL 0x4000 /* Receiver triger (LSB) */ -#define FCR_RTM 0x8000 /* Receiver triger (MSB) */ - -/* Line Control Register */ - -#define LCR_WLS0 0x0100 /* Word Length Select Bit 0 */ -#define LCR_WLS1 0x0200 /* Word Length Select Bit 1 */ -#define LCR_STB 0x0400 /* Number of Stop Bits */ -#define LCR_PEN 0x0800 /* Parity Enable */ -#define LCR_EPS 0x1000 /* Even Parity Select */ -#define LCR_SP 0x2000 /* Stick Parity */ -#define LCR_SB 0x4000 /* Set Break */ -#define LCR_DLAB 0x8000 /* Divisor Latch Access Bit */ - -/* MODEM Control Register */ - -#define MCR_DTR 0x0100 /* Data Terminal Ready */ -#define MCR_RTS 0x0200 /* Request to Send */ -#define MCR_OUT1 0x0400 /* Out 1 */ -#define MCR_IRQEN 0x0800 /* IRQ Enable */ -#define MCR_LOOP 0x1000 /* Loop */ - -/* Line Status Register */ - -#define LSR_DR 0x0100 /* Data Ready */ -#define LSR_OE 0x0200 /* Overrun Error */ -#define LSR_PE 0x0400 /* Parity Error */ -#define LSR_FE 0x0800 /* Framing Error */ -#define LSR_BI 0x1000 /* Break Interrupt */ -#define LSR_THRE 0x2000 /* Transmitter Holding Register Empty */ -#define LSR_TEMT 0x4000 /* Transmitter Empty */ -#define LSR_FIFOE 0x8000 /* Receiver FIFO error */ - -/* MODEM Status Register */ - -#define MSR_DCTS 0x0100 /* Delta Clear to Send */ -#define MSR_DDSR 0x0200 /* Delta Data Set Ready */ -#define MSR_TERI 0x0400 /* Trailing Edge Ring Indicator */ -#define MSR_DDCD 0x0800 /* Delta Data Carrier Detect */ -#define MSR_CTS 0x1000 /* Clear to Send */ -#define MSR_DSR 0x2000 /* Data Set Ready */ -#define MSR_RI 0x4000 /* Ring Indicator */ -#define MSR_DCD 0x8000 /* Data Carrier Detect */ - -/* Baud Rate Divisor */ - -#define UART_CLK (1843200) /* 1.8432 MHz */ -#define UART_BAUD(x) (UART_CLK / (16 * (x))) - -/* RTC register definition */ -#define RTC_SECONDS 0 -#define RTC_SECONDS_ALARM 1 -#define RTC_MINUTES 2 -#define RTC_MINUTES_ALARM 3 -#define RTC_HOURS 4 -#define RTC_HOURS_ALARM 5 -#define RTC_DAY_OF_WEEK 6 -#define RTC_DAY_OF_MONTH 7 -#define RTC_MONTH 8 -#define RTC_YEAR 9 -#define RTC_FREQ_SELECT 10 -# define RTC_UIP 0x80 -# define RTC_DIV_CTL 0x70 -/* This RTC can work under 32.768KHz clock only. */ -# define RTC_OSC_ENABLE 0x20 -# define RTC_OSC_DISABLE 0x00 -#define RTC_CONTROL 11 -# define RTC_SET 0x80 -# define RTC_PIE 0x40 -# define RTC_AIE 0x20 -# define RTC_UIE 0x10 -# define RTC_SQWE 0x08 -# define RTC_DM_BINARY 0x04 -# define RTC_24H 0x02 -# define RTC_DST_EN 0x01 - -#endif /* __ASM_SH_SMC37C93X_H */ diff -puN include/asm-sh/smp.h~sh-merge include/asm-sh/smp.h --- 25/include/asm-sh/smp.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/smp.h 2004-01-09 21:32:27.000000000 -0800 @@ -1,11 +1,18 @@ /* - * Copyright (C) 2002 Paul Mundt + * include/asm-sh/smp.h + * + * Copyright (C) 2002, 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive for + * more details. */ #ifndef __ASM_SH_SMP_H #define __ASM_SH_SMP_H #include #include +#include #ifdef CONFIG_SMP @@ -13,18 +20,14 @@ #include #include -extern unsigned long cpu_online_map; +extern cpumask_t cpu_online_map; +extern cpumask_t cpu_possible_map; -#define cpu_online(cpu) (cpu_online_map & (1 << (cpu))) -#define cpu_possible(cpu) (cpu_online(cpu)) +#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map) +#define cpu_possible(cpu) cpu_isset(cpu, cpu_possible_map) #define smp_processor_id() (current_thread_info()->cpu) -extern inline unsigned int num_online_cpus(void) -{ - return hweight32(cpu_online_map); -} - /* I've no idea what the real meaning of this is */ #define PROC_CHANGE_PENALTY 20 diff -puN /dev/null include/asm-sh/snapgear/io.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/snapgear/io.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,92 @@ +/* + * include/asm-sh/snapgear/io.h + * + * Modified version of io_se.h for the snapgear-specific functions. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * IO functions for a SnapGear + */ + +#ifndef _ASM_SH_IO_SNAPGEAR_H +#define _ASM_SH_IO_SNAPGEAR_H + +#if defined(CONFIG_CPU_SH4) +/* + * The external interrupt lines, these take up ints 0 - 15 inclusive + * depending on the priority for the interrupt. In fact the priority + * is the interrupt :-) + */ + +#define IRL0_IRQ 2 +#define IRL0_IPR_ADDR INTC_IPRD +#define IRL0_IPR_POS 3 +#define IRL0_PRIORITY 13 + +#define IRL1_IRQ 5 +#define IRL1_IPR_ADDR INTC_IPRD +#define IRL1_IPR_POS 2 +#define IRL1_PRIORITY 10 + +#define IRL2_IRQ 8 +#define IRL2_IPR_ADDR INTC_IPRD +#define IRL2_IPR_POS 1 +#define IRL2_PRIORITY 7 + +#define IRL3_IRQ 11 +#define IRL3_IPR_ADDR INTC_IPRD +#define IRL3_IPR_POS 0 +#define IRL3_PRIORITY 4 +#endif + +extern unsigned char snapgear_inb(unsigned long port); +extern unsigned short snapgear_inw(unsigned long port); +extern unsigned int snapgear_inl(unsigned long port); + +extern void snapgear_outb(unsigned char value, unsigned long port); +extern void snapgear_outw(unsigned short value, unsigned long port); +extern void snapgear_outl(unsigned int value, unsigned long port); + +extern unsigned char snapgear_inb_p(unsigned long port); +extern void snapgear_outb_p(unsigned char value, unsigned long port); + +extern void snapgear_insl(unsigned long port, void *addr, unsigned long count); +extern void snapgear_outsl(unsigned long port, const void *addr, unsigned long count); + +extern unsigned long snapgear_isa_port2addr(unsigned long offset); + +#ifdef CONFIG_SH_SECUREEDGE5410 +/* + * We need to remember what was written to the ioport as some bits + * are shared with other functions and you cannot read back what was + * written :-| + * + * Bit Read Write + * ----------------------------------------------- + * D0 DCD on ttySC1 power + * D1 Reset Switch heatbeat + * D2 ttySC0 CTS (7100) LAN + * D3 - WAN + * D4 ttySC0 DCD (7100) CONSOLE + * D5 - ONLINE + * D6 - VPN + * D7 - DTR on ttySC1 + * D8 - ttySC0 RTS (7100) + * D9 - ttySC0 DTR (7100) + * D10 - RTC SCLK + * D11 RTC DATA RTC DATA + * D12 - RTS RESET + */ + + #define SECUREEDGE_IOPORT_ADDR ((volatile short *) 0xb0000000) + extern unsigned short secureedge5410_ioport; + + #define SECUREEDGE_WRITE_IOPORT(val, mask) (*SECUREEDGE_IOPORT_ADDR = \ + (secureedge5410_ioport = \ + ((secureedge5410_ioport & ~(mask)) | ((val) & (mask))))) + #define SECUREEDGE_READ_IOPORT() \ + ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817)) +#endif + +#endif /* _ASM_SH_IO_SNAPGEAR_H */ diff -puN include/asm-sh/spinlock.h~sh-merge include/asm-sh/spinlock.h --- 25/include/asm-sh/spinlock.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/spinlock.h 2004-01-09 21:32:27.000000000 -0800 @@ -70,9 +70,10 @@ typedef struct { atomic_t counter; } rwlock_t; -#define RW_LOCK_UNLOCKED (rwlock_t) { { 0 } } +#define RW_LOCK_BIAS 0x01000000 +#define RW_LOCK_UNLOCKED (rwlock_t) { { 0 }, { RW_LOCK_BIAS } } #define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while (0) -#define rwlock_is_locked(x) (*(volatile int *)(x) != 0) +#define rwlock_is_locked(x) (atomic_read(&(x)->counter) != RW_LOCK_BIAS) static inline void _raw_read_lock(rwlock_t *rw) { @@ -104,5 +105,15 @@ static inline void _raw_write_unlock(rwl _raw_spin_unlock(&rw->lock); } +static inline int _raw_write_trylock(rwlock_t *rw) +{ + if (atomic_sub_and_test(RW_LOCK_BIAS, &rw->counter)) + return 1; + + atomic_add(RW_LOCK_BIAS, &rw->counter); + + return 0; +} + #endif /* __ASM_SH_SPINLOCK_H */ diff -puN include/asm-sh/system.h~sh-merge include/asm-sh/system.h --- 25/include/asm-sh/system.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/system.h 2004-01-09 21:32:27.000000000 -0800 @@ -14,7 +14,7 @@ */ #define switch_to(prev, next, last) do { \ - register unsigned long __dummy; \ + task_t *__last; \ register unsigned long *__ts1 __asm__ ("r1") = &prev->thread.sp; \ register unsigned long *__ts2 __asm__ ("r2") = &prev->thread.pc; \ register unsigned long *__ts4 __asm__ ("r4") = (unsigned long *)prev; \ @@ -51,10 +51,11 @@ "mov.l @r15+, r8\n\t" \ "lds.l @r15+, pr\n\t" \ "ldc.l @r15+, gbr\n\t" \ - : "=z" (__dummy) \ + : "=z" (__last) \ : "r" (__ts1), "r" (__ts2), "r" (__ts4), \ "r" (__ts5), "r" (__ts6), "r" (__ts7) \ : "r3", "t"); \ + last = __last; \ } while (0) #define nop() __asm__ __volatile__ ("nop") diff -puN /dev/null include/asm-sh/systemh/7751systemh.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/systemh/7751systemh.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,68 @@ +#ifndef __ASM_SH_SYSTEMH_7751SYSTEMH_H +#define __ASM_SH_SYSTEMH_7751SYSTEMH_H + +/* + * linux/include/asm-sh/systemh/7751systemh.h + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Hitachi SystemH support + + * Modified for 7751 SystemH by + * Jonathan Short, 2002. + */ + +/* Box specific addresses. */ + +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_FROM 0x01000000 /* EPROM */ +#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 + +#define PA_EXT4 0x12000000 +#define PA_EXT4_SIZE 0x02000000 +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ + +#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ +#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ +#define PA_LED 0xba000000 /* LED */ +#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ + +#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ +#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_MODE (PA_MRSHPC + 4) +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) + +#define BCR_ILCRA (PA_BCR + 0) +#define BCR_ILCRB (PA_BCR + 2) +#define BCR_ILCRC (PA_BCR + 4) +#define BCR_ILCRD (PA_BCR + 6) +#define BCR_ILCRE (PA_BCR + 8) +#define BCR_ILCRF (PA_BCR + 10) +#define BCR_ILCRG (PA_BCR + 12) + +#define IRQ_79C973 13 + +#endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */ diff -puN /dev/null include/asm-sh/systemh/io.h --- /dev/null 2002-08-30 16:31:37.000000000 -0700 +++ 25-akpm/include/asm-sh/systemh/io.h 2004-01-09 21:32:27.000000000 -0800 @@ -0,0 +1,43 @@ +/* + * include/asm-sh/systemh/io.h + * + * Stupid I/O definitions for SystemH, cloned from SE7751. + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_SH_SYSTEMH_IO_H +#define __ASM_SH_SYSTEMH_IO_H + +extern unsigned char sh7751systemh_inb(unsigned long port); +extern unsigned short sh7751systemh_inw(unsigned long port); +extern unsigned int sh7751systemh_inl(unsigned long port); + +extern void sh7751systemh_outb(unsigned char value, unsigned long port); +extern void sh7751systemh_outw(unsigned short value, unsigned long port); +extern void sh7751systemh_outl(unsigned int value, unsigned long port); + +extern unsigned char sh7751systemh_inb_p(unsigned long port); +extern void sh7751systemh_outb_p(unsigned char value, unsigned long port); + +extern void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count); +extern void sh7751systemh_insw(unsigned long port, void *addr, unsigned long count); +extern void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count); +extern void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count); +extern void sh7751systemh_outsw(unsigned long port, const void *addr, unsigned long count); +extern void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count); + +extern unsigned char sh7751systemh_readb(unsigned long addr); +extern unsigned short sh7751systemh_readw(unsigned long addr); +extern unsigned int sh7751systemh_readl(unsigned long addr); +extern void sh7751systemh_writeb(unsigned char b, unsigned long addr); +extern void sh7751systemh_writew(unsigned short b, unsigned long addr); +extern void sh7751systemh_writel(unsigned int b, unsigned long addr); + +extern unsigned long sh7751systemh_isa_port2addr(unsigned long offset); + +#endif /* __ASM_SH_SYSTEMH_IO_H */ + diff -puN include/asm-sh/timex.h~sh-merge include/asm-sh/timex.h --- 25/include/asm-sh/timex.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/timex.h 2004-01-09 21:32:27.000000000 -0800 @@ -6,7 +6,7 @@ #ifndef __ASM_SH_TIMEX_H #define __ASM_SH_TIMEX_H -#define CLOCK_TICK_RATE (current_cpu_data.module_clock/4) /* Underlying HZ */ +#define CLOCK_TICK_RATE (CONFIG_SH_PCLK_FREQ / 4) /* Underlying HZ */ #define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */ #define FINETUNE ((((((long)LATCH * HZ - CLOCK_TICK_RATE) << SHIFT_HZ) * \ (1000000/CLOCK_TICK_FACTOR) / (CLOCK_TICK_RATE/CLOCK_TICK_FACTOR)) \ diff -puN include/asm-sh/uaccess.h~sh-merge include/asm-sh/uaccess.h --- 25/include/asm-sh/uaccess.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/uaccess.h 2004-01-09 21:32:27.000000000 -0800 @@ -1,4 +1,4 @@ -/* $Id: uaccess.h,v 1.9 2003/05/06 23:28:51 lethal Exp $ +/* $Id: uaccess.h,v 1.11 2003/10/13 07:21:20 lethal Exp $ * * User space memory access functions * @@ -140,13 +140,13 @@ static inline int __access_ok(unsigned l } #endif /* CONFIG_MMU */ -static inline int access_ok(int type, const void *p, unsigned long size) +static inline int access_ok(int type, const void __user *p, unsigned long size) { unsigned long addr = (unsigned long)p; return __access_ok(addr, size); } -static inline int verify_area(int type, const void * addr, unsigned long size) +static inline int verify_area(int type, const void __user * addr, unsigned long size) { return access_ok(type,addr,size) ? 0 : -EFAULT; } @@ -171,40 +171,64 @@ static inline int verify_area(int type, * doing multiple accesses to the same area (the user has to do the * checks by hand with "access_ok()") */ -#define __put_user(x,ptr) __put_user_nocheck((x),(ptr),sizeof(*(ptr))) -#define __get_user(x,ptr) __get_user_nocheck((x),(ptr),sizeof(*(ptr))) +#define __put_user(x,ptr) \ + __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) +#define __get_user(x,ptr) \ + __get_user_nocheck((x),(ptr),sizeof(*(ptr))) struct __large_struct { unsigned long buf[100]; }; #define __m(x) (*(struct __large_struct *)(x)) -#define __get_user_nocheck(x,ptr,size) ({ \ -long __gu_err; \ -__typeof(*(ptr)) __gu_val; \ -long __gu_addr; \ -__asm__("":"=r" (__gu_val)); \ -__gu_addr = (long) (ptr); \ -__asm__("":"=r" (__gu_err)); \ -switch (size) { \ -case 1: __get_user_asm("b"); break; \ -case 2: __get_user_asm("w"); break; \ -case 4: __get_user_asm("l"); break; \ -default: __get_user_unknown(); break; \ -} x = (__typeof__(*(ptr))) __gu_val; __gu_err; }) - -#define __get_user_check(x,ptr,size) \ -({ __typeof__(*(ptr)) __val; long __err; \ - switch(size) { \ - case 1: __err = __get_user_1(__val, ptr); break; \ - case 2: __err = __get_user_2(__val, ptr); break; \ - case 4: __err = __get_user_4(__val, ptr); break; \ - default: __get_user_unknown(); break; \ - } \ - (x) = __val; __err; }) - -#define __get_user_1(x,ptr) ({ \ -long __gu_err; \ -__typeof__(*(ptr)) __gu_val; \ -long __gu_addr = (long) (ptr); \ +#define __get_user_size(x,ptr,size,retval) \ +do { \ + retval = 0; \ + switch (size) { \ + case 1: \ + __get_user_asm(x, ptr, retval, "b"); \ + break; \ + case 2: \ + __get_user_asm(x, ptr, retval, "w"); \ + break; \ + case 4: \ + __get_user_asm(x, ptr, retval, "l"); \ + break; \ + default: \ + __get_user_unknown(); \ + break; \ + } \ +} while (0) + +#define __get_user_nocheck(x,ptr,size) \ +({ \ + long __gu_err, __gu_val; \ + __get_user_size(__gu_val, (ptr), (size), __gu_err); \ + (x) = (__typeof__(*(ptr)))__gu_val; \ + __gu_err; \ +}) + +#define __get_user_check(x,ptr,size) \ +({ \ + long __gu_err, __gu_val; \ + switch (size) { \ + case 1: \ + __get_user_1(__gu_val, (ptr), __gu_err); \ + break; \ + case 2: \ + __get_user_2(__gu_val, (ptr), __gu_err); \ + break; \ + case 4: \ + __get_user_4(__gu_val, (ptr), __gu_err); \ + break; \ + default: \ + __get_user_unknown(); \ + break; \ + } \ + \ + (x) = (__typeof__(*(ptr)))__gu_val; \ + __gu_err; \ +}) + +#define __get_user_1(x,addr,err) ({ \ __asm__("stc r7_bank, %1\n\t" \ "mov.l @(8,%1), %1\n\t" \ "and %2, %1\n\t" \ @@ -222,15 +246,12 @@ __asm__("stc r7_bank, %1\n\t" \ ".section __ex_table,\"a\"\n\t" \ ".long 1b, 0b\n\t" \ ".previous" \ - : "=&r" (__gu_err), "=&r" (__gu_val) \ - : "r" (__gu_addr) \ + : "=&r" (err), "=&r" (x) \ + : "r" (addr) \ : "t"); \ -x = (__typeof__(*(ptr))) __gu_val; __gu_err; }) +}) -#define __get_user_2(x,ptr) ({ \ -long __gu_err; \ -__typeof__(*(ptr)) __gu_val; \ -long __gu_addr = (long) (ptr); \ +#define __get_user_2(x,addr,err) ({ \ __asm__("stc r7_bank, %1\n\t" \ "mov.l @(8,%1), %1\n\t" \ "and %2, %1\n\t" \ @@ -248,15 +269,12 @@ __asm__("stc r7_bank, %1\n\t" \ ".section __ex_table,\"a\"\n\t" \ ".long 1b, 0b\n\t" \ ".previous" \ - : "=&r" (__gu_err), "=&r" (__gu_val) \ - : "r" (__gu_addr) \ + : "=&r" (err), "=&r" (x) \ + : "r" (addr) \ : "t"); \ -x = (__typeof__(*(ptr))) __gu_val; __gu_err; }) +}) -#define __get_user_4(x,ptr) ({ \ -long __gu_err; \ -__typeof__(*(ptr)) __gu_val; \ -long __gu_addr = (long) (ptr); \ +#define __get_user_4(x,addr,err) ({ \ __asm__("stc r7_bank, %1\n\t" \ "mov.l @(8,%1), %1\n\t" \ "and %2, %1\n\t" \ @@ -273,12 +291,12 @@ __asm__("stc r7_bank, %1\n\t" \ ".section __ex_table,\"a\"\n\t" \ ".long 1b, 0b\n\t" \ ".previous" \ - : "=&r" (__gu_err), "=&r" (__gu_val) \ - : "r" (__gu_addr) \ + : "=&r" (err), "=&r" (x) \ + : "r" (addr) \ : "t"); \ -x = (__typeof__(*(ptr))) __gu_val; __gu_err; }) +}) -#define __get_user_asm(insn) \ +#define __get_user_asm(x, addr, err, insn) \ ({ \ __asm__ __volatile__( \ "1:\n\t" \ @@ -296,43 +314,50 @@ __asm__ __volatile__( \ ".section __ex_table,\"a\"\n\t" \ ".long 1b, 3b\n\t" \ ".previous" \ - :"=&r" (__gu_err), "=&r" (__gu_val) \ - :"m" (__m(__gu_addr)), "i" (-EFAULT)); }) + :"=&r" (err), "=&r" (x) \ + :"m" (__m(addr)), "i" (-EFAULT)); }) extern void __get_user_unknown(void); -#define __put_user_nocheck(x,ptr,size) ({ \ -long __pu_err; \ -__typeof__(*(ptr)) __pu_val; \ -long __pu_addr; \ -__pu_val = (x); \ -__pu_addr = (long) (ptr); \ -__asm__("":"=r" (__pu_err)); \ -switch (size) { \ -case 1: __put_user_asm("b"); break; \ -case 2: __put_user_asm("w"); break; \ -case 4: __put_user_asm("l"); break; \ -case 8: __put_user_u64(__pu_val,__pu_addr,__pu_err); break; \ -default: __put_user_unknown(); break; \ -} __pu_err; }) - -#define __put_user_check(x,ptr,size) ({ \ -long __pu_err; \ -__typeof__(*(ptr)) __pu_val; \ -long __pu_addr; \ -__pu_val = (x); \ -__pu_addr = (long) (ptr); \ -__asm__("":"=r" (__pu_err)); \ -if (__access_ok(__pu_addr,size)) { \ -switch (size) { \ -case 1: __put_user_asm("b"); break; \ -case 2: __put_user_asm("w"); break; \ -case 4: __put_user_asm("l"); break; \ -case 8: __put_user_u64(__pu_val,__pu_addr,__pu_err); break; \ -default: __put_user_unknown(); break; \ -} } __pu_err; }) +#define __put_user_size(x,ptr,size,retval) \ +do { \ + retval = 0; \ + switch (size) { \ + case 1: \ + __put_user_asm(x, ptr, retval, "b"); \ + break; \ + case 2: \ + __put_user_asm(x, ptr, retval, "w"); \ + break; \ + case 4: \ + __put_user_asm(x, ptr, retval, "l"); \ + break; \ + case 8: \ + __put_user_u64(x, ptr, retval); \ + break; \ + default: \ + __put_user_unknown(); \ + } \ +} while (0) + +#define __put_user_nocheck(x,ptr,size) \ +({ \ + long __pu_err; \ + __put_user_size((x),(ptr),(size),__pu_err); \ + __pu_err; \ +}) + +#define __put_user_check(x,ptr,size) \ +({ \ + long __pu_err = -EFAULT; \ + __typeof__(*(ptr)) *__pu_addr = (ptr); \ + \ + if (__access_ok((unsigned long)__pu_addr,size)) \ + __put_user_size((x),__pu_addr,(size),__pu_err); \ + __pu_err; \ +}) -#define __put_user_asm(insn) \ +#define __put_user_asm(x, addr, err, insn) \ ({ \ __asm__ __volatile__( \ "1:\n\t" \ @@ -350,8 +375,8 @@ __asm__ __volatile__( \ ".section __ex_table,\"a\"\n\t" \ ".long 1b, 3b\n\t" \ ".previous" \ - :"=&r" (__pu_err) \ - :"r" (__pu_val), "m" (__m(__pu_addr)), "i" (-EFAULT) \ + :"=&r" (err) \ + :"r" (x), "m" (__m(addr)), "i" (-EFAULT) \ :"memory"); }) #if defined(__LITTLE_ENDIAN__) @@ -449,7 +474,7 @@ __cl_size = __clear_user(__cl_addr, __cl __cl_size; }) static __inline__ int -__strncpy_from_user(unsigned long __dest, unsigned long __src, int __count) +__strncpy_from_user(unsigned long __dest, unsigned long __user __src, int __count) { __kernel_size_t res; unsigned long __dummy, _d, _s; @@ -498,7 +523,7 @@ __sfu_res = __strncpy_from_user((unsigne /* * Return the size of a string (including the ending 0!) */ -static __inline__ long __strnlen_user(const char *__s, long __n) +static __inline__ long __strnlen_user(const char __user *__s, long __n) { unsigned long res; unsigned long __dummy; @@ -531,7 +556,7 @@ static __inline__ long __strnlen_user(co return res; } -static __inline__ long strnlen_user(const char *s, long n) +static __inline__ long strnlen_user(const char __user *s, long n) { if (!access_ok(VERIFY_READ, s, n)) return 0; @@ -539,7 +564,7 @@ static __inline__ long strnlen_user(cons return __strnlen_user(s, n); } -static __inline__ long strlen_user(const char *s) +static __inline__ long strlen_user(const char __user *s) { if (!access_ok(VERIFY_READ, s, 0)) return 0; @@ -547,9 +572,24 @@ static __inline__ long strlen_user(const return __strnlen_user(s, ~0UL >> 1); } +/* + * The exception table consists of pairs of addresses: the first is the + * address of an instruction that is allowed to fault, and the second is + * the address at which the program should continue. No registers are + * modified, so it is entirely up to the continuation code to figure out + * what to do. + * + * All the routines below use bits of fixup code that are out of line + * with the main instruction path. This means when everything is well, + * we don't even have to jump over them. Further, they do not intrude + * on our cache or tlb entries. + */ + struct exception_table_entry { unsigned long insn, fixup; }; +extern int fixup_exception(struct pt_regs *regs); + #endif /* __ASM_SH_UACCESS_H */ diff -puN include/asm-sh/unistd.h~sh-merge include/asm-sh/unistd.h --- 25/include/asm-sh/unistd.h~sh-merge 2004-01-09 21:32:26.000000000 -0800 +++ 25-akpm/include/asm-sh/unistd.h 2004-01-09 21:32:27.000000000 -0800 @@ -275,8 +275,14 @@ #define __NR_clock_gettime (__NR_timer_create+6) #define __NR_clock_getres (__NR_timer_create+7) #define __NR_clock_nanosleep (__NR_timer_create+8) +#define __NR_statfs64 268 +#define __NR_fstatfs64 269 +#define __NR_tgkill 270 +#define __NR_utimes 271 +#define __NR_fadvise64_64 272 +#define __NR_vserver 273 -#define NR_syscalls 268 +#define NR_syscalls 274 /* user-visible error numbers are in the range -1 - -124: see */ @@ -435,6 +441,8 @@ static __inline__ pid_t wait(int * wait_ * What we want is __attribute__((weak,alias("sys_ni_syscall"))), * but it doesn't work on all toolchains, so we just do it by hand */ +#ifndef cond_syscall #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall"); +#endif #endif /* __ASM_SH_UNISTD_H */ diff -puN include/linux/pci_ids.h~sh-merge include/linux/pci_ids.h --- 25/include/linux/pci_ids.h~sh-merge 2004-01-09 21:32:27.000000000 -0800 +++ 25-akpm/include/linux/pci_ids.h 2004-01-09 21:32:27.000000000 -0800 @@ -516,6 +516,7 @@ #define PCI_DEVICE_ID_MATROX_VIA 0x4536 #define PCI_VENDOR_ID_CT 0x102c +#define PCI_DEVICE_ID_CT_69000 0x00c0 #define PCI_DEVICE_ID_CT_65545 0x00d8 #define PCI_DEVICE_ID_CT_65548 0x00dc #define PCI_DEVICE_ID_CT_65550 0x00e0 @@ -1444,6 +1445,9 @@ #define PCI_DEVICE_ID_IKON_10115 0x0115 #define PCI_DEVICE_ID_IKON_10117 0x0117 +#define PCI_VENDOR_ID_SEGA 0x11db +#define PCI_DEVICE_ID_SEGA_BBA 0x1234 + #define PCI_VENDOR_ID_ZORAN 0x11de #define PCI_DEVICE_ID_ZORAN_36057 0x6057 #define PCI_DEVICE_ID_ZORAN_36120 0x6120 _