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authorIvan Kokshaysky <ink@jurassic.park.msu.ru>2005-09-22 21:06:31 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2005-09-23 08:05:16 -0700
commit12f44f46bc9c6dc79255e661b085797af395d8da (patch)
treecec3ab7b0bfd7f90fba01b6fb6ecb896eed00079
parentbfab08c097df5f6a60dd07f0f8c78c54e725780b (diff)
downloadlinux-12f44f46bc9c6dc79255e661b085797af395d8da.tar.gz
[PATCH] pci: fixup parent subordinate busnr
I believe the change that broke things is introduction of pci_fixup_parent_subordinate_busnr(). The patch here does two things: - hunk #1 should fix the problems you've seen when you boot without additional "pci" kernel options; - hunk #2 supposedly fixes boot with "pci=assign-busses" option which otherwise hangs Acer TM81xx machines as reported. Please try this with and without "pci=assign-busses". If it boots, I'd like to see 'lspci -vvx' for both cases. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--drivers/pci/probe.c18
1 files changed, 17 insertions, 1 deletions
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index c77d5b1bbff6cc..005786416bb5be 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -402,6 +402,12 @@ static void pci_enable_crs(struct pci_dev *dev)
static void __devinit pci_fixup_parent_subordinate_busnr(struct pci_bus *child, int max)
{
struct pci_bus *parent = child->parent;
+
+ /* Attempts to fix that up are really dangerous unless
+ we're going to re-assign all bus numbers. */
+ if (!pcibios_assign_all_busses())
+ return;
+
while (parent->parent && parent->subordinate < max) {
parent->subordinate = max;
pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS, max);
@@ -478,8 +484,18 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max
* We need to assign a number to this bus which we always
* do in the second pass.
*/
- if (!pass)
+ if (!pass) {
+ if (pcibios_assign_all_busses())
+ /* Temporarily disable forwarding of the
+ configuration cycles on all bridges in
+ this bus segment to avoid possible
+ conflicts in the second pass between two
+ bridges programmed with overlapping
+ bus ranges. */
+ pci_write_config_dword(dev, PCI_PRIMARY_BUS,
+ buses & ~0xffffff);
return max;
+ }
/* Clear errors */
pci_write_config_word(dev, PCI_STATUS, 0xffff);