Software ECC according to the Smart Media Specification. The original Linux implementation had byte 0 and 1 swapped.
This enables support for accessing all type of NAND flash devices. For further information see <http://www.linux-mtd.infradead.org/doc/nand.html>.
This adds an extra check when data is written to the flash. The NAND flash device internally checks only bits transitioning from 1 to 0. There is a rare possibility that even though the device thinks the write was successful, a bit could have been flipped accidentally due to device wear or something else.
This enables support for software BCH error correction. Binary BCH codes are more powerful and cpu intensive than traditional Hamming ECC codes. They are used with NAND devices requiring more than 1 bit of error correction.
Enable this option only when your board has first generation NAND chips (page size 256 byte, erase size 4-8KiB). The IDs of these chips were reused by later, larger chips.
This enables the driver for the autronix autcpu12 board to access the SmartMediaCard.
Enable the driver for NAND flash on Intel Moorestown, using the Denali NAND controller core.
Some platforms place the NAND chip size in a scratch register because (some versions of) the driver aren't able to automatically determine the size of certain chips. Set the address of the scratch register here to enable this feature. On Intel Moorestown boards, the scratch register is at 0xFF108018.
This enables the driver for the Cirrus Logic EBD7312 evaluation board to access the onboard NAND Flash.
This enables the driver for the iPAQ h1900 flash.
This enables a GPIO based NAND flash driver.
If you had to ask, you don't have one. Say 'N'.
Support for NAND flash on Amstrad E3 (Delta).
Support for NAND flash on Texas Instruments OMAP2 and OMAP3 platforms.
Enable support for Ricoh R5C852 xD card reader You also need to enable ether NAND SSFDC (SmartMedia) read only translation layer' or new expermental, readwrite 'SmartMedia/xD new translation layer'
This enables the driver for the NAND flash controller on the AMD/Alchemy 1550 SOC.
This enables the Blackfin on-chip NAND flash controller No board specific support is done by this driver, each board must advertise a platform_device for the driver to attach. This driver can also be built as a module. If so, the module will be called bf5xx-nand.
Enable the use of the BF5XX's internal ECC generator when using NAND.
If you wish to modify NAND pages and allow the Blackfin on-chip BootROM to boot from them, say Y here. This is only necessary if you are booting U-Boot out of NAND and you wish to update U-Boot from Linux' userspace. Otherwise, you should say N here. If unsure, say N.
This enables the driver for the Renesas Technology AG-AND flash interface board (FROM_BOARD4)
This enables the NAND flash driver on the PPChameleon EVB Board.
This enables the NAND flash controller on the S3C24xx and S3C64xx SoCs No board specific support is done by this driver, each board must advertise a platform_device for the driver to attach.
Enable debugging of the S3C NAND driver
Enable the use of the controller's internal ECC generator when using NAND. Early versions of the chips have had problems with incorrect ECC generation, and if using these, the default of software ECC is preferable.
NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs
Stop the clock to the NAND controller when there is no chip selected to save power. This will mean there is a small delay when the is NAND chip selected or released, but will save approximately 5mA of power when there is nothing happening.
This enables the NAND flash controller on the BCM UMI block. No board specific support is done by this driver, each board must advertise a platform_device for the driver to attach.
Enable the use of the BCM UMI block's internal CS using NAND. This should only be used if you know the external NAND CS can toggle.
This is a reimplementation of M-Systems DiskOnChip 2000, Millennium and Millennium Plus as a standard NAND device driver, as opposed to the earlier self-contained MTD device drivers. This should enable, among other things, proper JFFS2 operation on these devices.
This option allows you to specify nonstandard address at which to probe for a DiskOnChip, or to change the detection options. You are unlikely to need any of this unless you are using LinuxBIOS. Say 'N'.
By default, the probe for DiskOnChip devices will look for a DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. This option allows you to specify a single address at which to probe for the device, which is useful if you have other devices in that range which get upset when they are probed. (Note that on PowerPC, the normal probe will only check at 0xE4000000.) Normally, you should leave this set to zero, to allow the probe at the normal addresses.
By default, the probe for DiskOnChip devices will look for a DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. This option changes to make it probe between 0xFFFC8000 and 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be useful to you. Say 'N'.
On DiskOnChip devices shipped with the INFTL filesystem (Millennium and 2000 TSOP/Alon), Linux reserves some space at the end of the device for the Bad Block Table (BBT). If you have existing INFTL data on your device (created by non-Linux tools such as M-Systems' DOS drivers), your data might overlap the area Linux wants to use for the BBT. If this is a concern for you, leave this option disabled and Linux will not write BBT data into this area. The downside of leaving this option disabled is that if bad blocks are detected by Linux, they will not be recorded in the BBT, which could cause future problems. Once you enable this option, new filesystems (INFTL or others, created in Linux or other operating systems) will not use the reserved area. The only reason not to enable this option is to prevent damage to preexisting filesystems. Even if you leave this disabled, you can enable BBT writes at module load time (assuming you build diskonchip as a module) with the module parameter "inftl_bbt_write=1".
Use NAND flash attached to the CAFÉ chip designed for the OLPC laptop.
The CS553x companion chips for the AMD Geode processor include NAND flash controllers with built-in hardware ECC capabilities; enabling this option will allow you to use these. The driver will check the MSRs to verify that the controller is enabled for NAND, and currently requires that the controller be in MMIO mode. If you say "m", the module will be called cs553x_nand.
Enables support for NAND Flash / Smart Media Card interface on Atmel AT91 and AVR32 processors.
Use hardware ECC instead of software ECC when the chip supports it. The hardware ECC controller is capable of single bit error correction and 2-bit random detection per page. NB : hardware and software ECC schemes are incompatible. If you switch from one to another, you'll have to erase your mtd partition. If unsure, say Y
Use software ECC. NB : hardware and software ECC schemes are incompatible. If you switch from one to another, you'll have to erase your mtd partition.
No ECC will be used. It's not a good idea and it should be reserved for testing purpose only. If unsure, say N
This enables the driver for the NAND flash device found on PXA3xx processors
Enables support for NAND Flash interface on PA Semi PWRficient based boards
Support for NAND flash connected to a Toshiba Mobile IO Controller in some PDAs, including the Sharp SL6000x.
The simulator may simulate various NAND flash chips for the MTD nand layer.
This implements a generic NAND driver for on-SOC platform devices. You will need to provide platform-specific functions via platform_data.
These two (and possibly other) Alauda-based cardreaders for SmartMedia and xD allow raw flash access.
This enables the NAND flash controller on Orion machines. No board specific support is done by this driver, each board must advertise a platform_device for the driver to attach.
Various Freescale chips, including the 8313, include a NAND Flash Controller Module with built-in hardware ECC capabilities. Enabling this option will enable you to use this to control external NAND devices.
Enables support for NAND Flash chips wired onto Freescale PowerPC processor localbus with User-Programmable Machine support.
This enables the driver for the NAND flash controller on the MPC5121 SoC.
This enables the driver for the NAND flash controller on the MXC processors.
Driver for the NAND flash controller on the Nomadik, with ECC.
Several Renesas SuperH CPU has FLCTL. This option enables support for NAND Flash using FLCTL.
Enable the driver for NAND flash chips on Texas Instruments DaVinci processors.
This enables the NAND flash controller on the TXx9 SoCs.
Enables support for NAND Flash chips wired onto Socrates board.
This enables the driver for the NAND Flash on evaluation board based on w90p910 / NUC9xx.
Enables support for NAND Flash on JZ4740 SoC based boards.
Enables support for NAND Flash chips on the ST Microelectronics Flexible Static Memory Controller (FSMC)